Commit Graph

58273 Commits

Author SHA1 Message Date
Ian Romanick 9f2608bc46 docs: Import 9.2 release notes
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-27 16:38:57 -07:00
Fabian Bieler cd18269705 mesa/main: Check for 0 size draws after validation.
When validating draw parameters move check for 0 draw count last
(drawing with count 0 is not an error), so that other parameters (e.g.: the
primitive type) are validated and the correct errors (if applicable) are
generated.

>From the OpenGL 3.3 spec page 33 (page 48 of the PDF):
"[Regarding DrawArraysOneInstance, in terms of which other draw operations
are defined:]
If count is negative, an INVALID_VALUE error is generated."

This patch also changes the bahavior of MultiDrawElements to perform the draw
operation if some primitive's index counts are zero.

Signed-off-by: Fabian Bieler <fabianbieler@fastmail.fm>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-27 15:11:52 -07:00
Matt Turner ac74de3710 glsl: Add built-ins from ARB_shader_bit_encoding to ARB_gpu_shader5.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-27 15:06:16 -07:00
Matt Turner 4929be0b5f i965/vs: Add support for translating ir_triop_fma into MAD.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-27 15:03:30 -07:00
Matt Turner 530842127e i965/fs: Add support for translating ir_triop_fma into MAD.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-27 15:03:30 -07:00
Matt Turner e817b94a2c i965/fs: Assert that ir_expressions are usable by 3-src instructions.
MAD will be generated directly from ir_triop_fma, so this assertion
checks that all ir_expressions are usable.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-27 15:03:30 -07:00
Matt Turner d55c543c36 glsl: Add support for new fma built-in in ARB_gpu_shader5.
v2: Add constant folding support.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-27 15:03:30 -07:00
Matt Turner 6829c18609 glsl: Add new fma built-in IR and prototype from ARB_gpu_shader5.
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-27 15:03:30 -07:00
Marek Olšák adb93e3bda r300g: enable MSAA on r300-r400, be careful about using color compression
MSAA was tested by one user on RS690 and it works for him with color
compression (CMASK) disabled. Our theory is that his chipset lacks CMASK RAM.

Since we don't have hardware documentation about which chipsets actually have
CMASK RAM, I had to take a guess based on the presence of HiZ.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-27 23:18:54 +02:00
Fabio Pedretti aa3905423e configure.ac: Bump Wayland requirement to 1.2.0
Since 8d29b52 wayland 1.2.0 is required.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-08-27 08:40:40 -07:00
Roland Scheidegger bd3909f265 draw: clean up setting stream out information a bit
In particular noone is interested in the vertex count, so drop that,
and also drop the duplicated num_primitives_generated /
so.primitives_storage_needed variables in drivers. I am unable for now to figure
out if primitives_storage_needed in SO stats (used for d3d10) should
increase if SO is disabled, though the equivalent num_primitives_generated
used for OpenGL definitely should increase. In any case we were only counting
when SO is active both in softpipe and llvmpipe anyway so don't pretend there's
an independent num_primitives_generated counter which would count always.
(This means the PIPE_QUERY_PRIMITIVES_GENERATED count will still be wrong just
as before, should eventually fix this by doing either separate counting for this
query or adjust the code so it always counts this even if SO is inactive depending
on what's correct for d3d10.)

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-08-27 16:59:39 +02:00
Roland Scheidegger aff2ecf09a llvmpipe: support nested/overlapping queries for all query types
There's just no way resetting the counters is working with nested/overlapping
queries.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-08-27 16:59:01 +02:00
Roland Scheidegger 4900e625bd softpipe: support nested/overlapping queries for all query types
There's just no way resetting the counters is working with nested/overlapping
queries.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-08-27 16:58:20 +02:00
Matt Turner d8ac987f6a glsl: Disallow uniform block layout qualifiers on non-uniform block vars.
Cc: 9.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68460
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-26 23:19:14 -07:00
Kristian Lehmann cec7b5c5bc Fixed and/or order mistake, resulting in compiling llvmpipe without llvm installed
Cc: 9.2 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68544
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-08-26 22:13:45 -07:00
Ian Romanick d127a0343d i915: Optimize SEQ and SNE when two operands are uniforms
SEQ and SNE are not native i915 instructions, so they each generate at
least 3 instructions.  If both operands are uniforms or constants, we
get 5 instructions like:

                U[1] = MOV CONST[1]
                U[0].xyz = SGE CONST[0].xxxx, U[1]
                U[1] = MOV CONST[1].-x-y-z-w
                R[0].xyz = SGE CONST[0].-x-x-x-x, U[1]
                R[0].xyz = MUL R[0], U[0]

This code is stupid.  Instead of having the individual calls to
i915_emit_arith generate the moves to utemps, do it in the caller.  This
results in code like:

                U[1] = MOV CONST[1]
                U[0].xyz = SGE CONST[0].xxxx, U[1]
                R[0].xyz = SGE CONST[0].-x-x-x-x, U[1].-x-y-z-w
                R[0].xyz = MUL R[0], U[0]

This allows fs-temp-array-mat2-index-col-wr and
fs-temp-array-mat2-index-row-wr to fit in hardware limits (instead of
falling back to software rasterization).

NOTE: Without pending patches to the piglit tests, these tests will now
fail.  This is an unrelated, pre-existing issue.

v2: Copy most of the body of the commit message into comments in the
code.  Suggested by Eric.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-08-26 22:11:26 -07:00
Tom Stellard f3e86d4a68 clover: Don't use PIPE_TRANSFER_UNSYNCHRONIZED for blocking copies
CC: "9.2" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-08-26 18:27:03 -07:00
Niels Ole Salscheider ef6ed7220a st/clover: Add event to deps even if it has been triggered
The command is submitted once the event has been triggered, but it might not
have completed yet. Therefore, we have to add it to deps in order to wait on it.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-08-26 18:25:17 -07:00
Niels Ole Salscheider 4a3505d548 st/clover: Profiling support
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2013-08-26 18:25:17 -07:00
Dave Airlie 4763a032a0 tgsi_build: fix order of arguments for ind register build
This was broken when arrayid was added.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-08-27 10:41:27 +10:00
Dave Airlie 81204d0e9c tgsi: finish declaration parsing for arrays.
I previously fixed this partly in 9e8400f4c9,
however I didn't go far enough in testing it, now when I parse a TGSI shader
with arrays in it my iterator can see the ArrayID set to the proper value.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-08-27 10:41:09 +10:00
Brian Paul 92cbfded6a svga: replace 0 with PIPE_OK in a few places 2013-08-26 15:49:16 -06:00
Brian Paul 5e7ac28ebf swrast: init i0, i1 values to silence warnings
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-08-26 12:52:06 -06:00
Brian Paul ef47ab520d mesa: init dst values in COPY_CLEAN_4V_TYPE_AS_FLOAT()
to silence gcc 4.8.1 warnings.  And improve the ASSERT(0) call.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-08-26 12:52:06 -06:00
Brian Paul f91f6ef739 glsl: init limit=0 to silence uninitialized var warning
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-26 12:52:06 -06:00
Kenneth Graunke d65e3c082a i965/vs: Allocate register set once at context creation.
Now that we use a fixed set of register classes, we can set up the
register set and conflict graphs once, at context creation, rather than
on every VS compile.  This is obviously less expensive, and also what
we already do in the FS backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-26 11:21:10 -07:00
Kenneth Graunke a149f744d9 i965/vs: Move base_reg_count computation to brw_alloc_reg_set().
We're soon going to be calling brw_alloc_reg_set() from outside of the
visitor, where we don't have the precomputed "max_grf" variable handy.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-26 11:21:10 -07:00
Kenneth Graunke 7aaaa8bc8f i965/vs: Expose the payload registers to the register allocator.
For now, nothing else can get allocated over them.  That may change at
some point in the future.

This also means that base_reg_count can be computed without knowing the
number of registers used for the payload, which is required if we want
to allocate the register set once at context creation time.

See commit 551e1cd44f, which implemented
virtually identical code in the FS backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-26 11:21:10 -07:00
Kenneth Graunke 528d70d0b5 i965/vs: Use a fixed set of register classes.
Arrays, structures, and matrices use large VGRFs of arbitrary sizes.
However, split_virtual_grfs() breaks those down into VGRFs of size 1.

For reference, commit 5d90b98879 is the
analogous change to the FS backend.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-08-26 11:21:10 -07:00
Paul Berry cfe39ea14e i965: Allow C++ type safety in the use of enum brw_urb_write_flags.
(From a suggestion by Francisco Jerez)

If an enum represents a bitfield of flags, e.g.:

enum E {
  A = 1,
  B = 2,
  C = 4,
  D = 8,
};

then C++ normally prohibits statements like this:

enum E x = A | B;

because A and B are implicitly converted to ints before OR-ing them,
and an int can't be stored in an enum without a type cast.  C, on the
other hand, allows an int to be implicitly converted to an enum
without casting.

In the past we've dealt with this situation by storing flag bitfields
as ints.  This avoids ugly casting at the expense of some type safety
that C++ would normally have offered (e.g. we get no warning if we
accidentally use the wrong enum type).

However, we can get the best of both worlds if we override the |
operator.  The ugly casting is confined to the operator overload, and
we still get the benefit of C++ making sure we don't use the wrong
enum type.

v2: Remove unnecessary comment and unnecessary use of "enum" keyword.
Use static_cast.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-08-26 10:15:51 -07:00
Paul Berry 612226c43b i965: Remove redundant (and uninitialized) field vec4_generator::ctx.
We never noticed that this field was uninitialized because it is only
used in an error path that reports internal Mesa errors.

But it's silly to have it around anyway because &brw->ctx is
equivalent.

Should fix Coverity defect CID 1063351: Uninitialized pointer field
(UNINIT_CTOR) /src/mesa/drivers/dri/i965/brw_vec4_emit.cpp: 148

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-08-26 08:55:39 -07:00
Paul Berry 4bf91ca791 i965: Don't try to fall back when creating unrecognized program targets.
If brwNewProgram is asked to create a program for an unrecognized
target, don't bother falling back on _mesa_new_program().  That just
hides bugs.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

v2: Use assert() rather than _mesa_problem().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-08-26 08:55:39 -07:00
Michel Dänzer 46fd81e586 radeonsi: Also set the depth component mask bit for stencil-only exports
The stencil values come out wrong without this for some reason.

50 more little piglits.

Cc: mesa-stable@lists.freedesktop.org
2013-08-26 15:47:50 +02:00
Kenneth Graunke 7fa18774bd glsl: Add built-in function prototypes for GLSL 3.30
330.frag is a direct copy of 150.frag.
330.glsl is 150.glsl combined with ARB_shader_bit_encoding.glsl.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-08-25 20:32:39 -07:00
Kenneth Graunke 8f00409d23 glsl: Bump standalone compiler versions to 3.30.
These are necessary in order to compile the built-in functions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-08-25 20:32:39 -07:00
Kenneth Graunke 7950315583 mesa: Set query->EverBound in glQueryCounter().
glIsQuery is supposed to return false for names returned by glGenQueries
until their first use.  BeginQuery is a use, but QueryCounter is also a
use.

From the ARB_timer_query spec:
"A timer query object is created with the command

      void QueryCounter(uint id, enum target);

 [...] If <id> is an unused query object name, the
 name is marked as used [...]"

Fixes Piglit's spec/ARB_timer_query/query-lifetime.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Cc: mesa-stable@lists.freedesktop.org
2013-08-25 20:29:59 -07:00
Henri Verbeet b5ddaf9975 r600g: Implement the new float comparison instructions for Cayman as well.
I assume this should have been part of commit
7727fbb7c5. This (obviously) fixes a lot tests.

Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-08-25 13:00:02 +02:00
Ilia Mirkin bac6efe8e3 nv30: add forgotten PIPE_CAP_CUBE_MAP_ARRAY cap to list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
2013-08-25 10:47:28 +02:00
Ilia Mirkin 293fa4e559 nouveau/video: avoid overwriting base codec init with template
Commit 53e20b8b introduced the use of a template to initialize some
common fields. Move this copying of fields to before the common vp3
fields are initialized.

Reported-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-08-25 10:14:30 +02:00
Rob Clark 56ea2c4816 freedreno/a3xx: don't leak so much
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:58:01 -04:00
Rob Clark 9b9038496c freedreno/a3xx/compiler: fix SGT/SLT/etc
The cmps.f.* instruction doesn't actually seem to give a float 1.0 or
0.0 output.  It either needs a cov.u16f16 or add.s + sel.f16.  This
makes SGT/SLT/etc more similar to CMP, so handle them in trans_cmp().

This fixes a bunch of piglit tests.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark 572d4646f7 freedreno/a3xx/compiler: bit of re-arrange/cleanup
It seems there are a number of cases where instructions have limitations
about taking reading src's from const register file, so make
get_unconst() a bit easier to use.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark d63bbac3a5 freedreno/a3xx/compiler: make compiler errors more useful
We probably should get rid of assert() entirely, but at this stage it is
more useful for things to crash where we can catch it in a debugger.
With compile_error() we have a single place to set an error flag (to
bail out and return an error on the next instruction) so that will be a
small change later when enough of the compiler bugs are sorted.

But re-arrange/cleanup the error/assert stuff so we at least get a dump
of the TGSI that triggered it.  So we see some useful output in piglit
logs.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark 4c91930a25 freedreno: fix segfault when no color buffer bound
Don't crash when no color buffer bound.  Something caught when starting
to run piglit, fixes a hanful of piglit tests.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark 7eeab24344 freedreno/a3xx/compiler: cat4 cannot use const reg as src
Category 4 instructions (rsq, rcp, sqrt, etc) seem to be unable to take
a const register as src.  In these cases we need to move the src to a
temporary gpr first.

This is the second case of such a restriction, where the instruction
encoding appears to support a const src, but in fact the hw appears to
ignore that bit.  So split things out into a helper that can be re-used
for any instructions which have this limitation.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark 2effac5a67 freedreno/a3xx/compiler: use max_reg rather than file_count
Our current (rather naive) register assignment is based on mapping
different register files (INPUT, OUTPUT, TEMP, CONST, etc) based on the
max register index of the preceding file.  But in some cases, the lowest
used register in a file might not be zero.  In which case
file_count[file] != file_max[file] + 1.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark aee1ed708a freedreno/a3xx/compiler: handle saturate on dst
Sometimes things other than color dst need saturating, like if there is
a 'clamp(foo, 0.0, 1.0)'.  So for saturated dst add the extra
instructions to fix up dst.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark 8b250bb8aa freedreno/a3xx/compiler: fix CMP
The 1st src to add.s needs (r) flag (repeat), otherwise it will end up:

  add.s dst.xyzw, tmp.xxxx -1

instead of:

  add.s dst.xyzw, tmp.xyzw, -1

Also, if we are using a temporary dst to avoid clobbering one of the src
registers, we actually need to use that as the dst for the sel
instruction.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:23:32 -04:00
Rob Clark 528bee59fe freedreno/a3xx: some texture fixes
Stop hard coding bits that indicate texture type (2d/3d/cube/etc).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:21:59 -04:00
Rob Clark fd59f3ea98 freedreno: update register headers
resync w/ rnndb database

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-08-24 13:12:26 -04:00