984fd73515
radeonsi: use compute for clear_render_target when possible
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Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-02-04 18:46:25 -05:00
260ff57647
radeonsi: rename rbo, rbuffer to buf or buffer
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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-22 13:34:01 -05:00
501ff90a95
radeonsi: rename r600_resource -> si_resource
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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-22 13:32:18 -05:00
1cfbed7587
radeonsi: remove r600 from comments
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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-22 12:26:45 -05:00
1b25d340b7
radeonsi: use compute for resource_copy_region when possible
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v2: marek: fix snorm8 blits
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-01-22 12:24:35 -05:00
8daf5bb209
radeonsi: add compute_last_block to configure the partial block fields
2019-01-22 12:22:46 -05:00
4d5f8f39f3
radeonsi: move PKT3_WRITE_DATA generation into a helper function
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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-01-22 12:14:26 -05:00
54bc87469a
radeonsi: make si_cp_wait_mem more configurable
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Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-01-02 15:01:54 -05:00
d28e208213
radeonsi: don't emit redundant PKT3_NUM_INSTANCES packets
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Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2019-01-02 15:01:50 -05:00
e2b9329f17
radeonsi: move remaining perfcounter code into si_perfcounter.c
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-12-19 12:01:57 +01:00
5c841a1b1e
radeonsi: rename SI_RESOURCE_FLAG_FORCE_TILING to clarify its purpose
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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-12-19 12:01:39 +01:00
075fd5d8f2
radeonsi: add memory management stress tests for GDS
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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28 20:20:27 -05:00
d7a4fa91f0
radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB
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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-11-28 20:20:27 -05:00
9dc776f3f2
radeonsi: don't set the CB clear color registers for 0/1 clear colors on Raven2
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and add has_dcc_constant_encode.
2018-11-09 14:55:04 -05:00
99835fff08
radeonsi/gfx9: set optimal OVERWRITE_COMBINER_WATERMARK
2018-10-30 16:03:02 -04:00
77bcbe712e
radeonsi: clamp point size to the limit
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This fixes dEQP-GLES2.functional.rasterization.limits.points.
Broken by: ea039f789d
2018-10-18 16:08:56 -04:00
fcc70e4855
radeonsi: track context rolls better for the Vega scissor bug workaround
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We should get fewer context rolls with the SET_CONTEXT_REG optimization,
but it would have been for nothing if the scissor state rolled the context
anyway. Don't emit the scissor state if there is no context roll.
2018-10-16 17:23:25 -04:00
9b331e462e
radeonsi: use compute shaders for clear_buffer & copy_buffer
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Fast color clears should be much faster. Also, fast color clears on
evicted buffers should be 200x faster on GFX8 and older.
2018-10-16 17:23:25 -04:00
ea039f789d
radeonsi: use higher subpixel precision (QUANT_MODE) for smaller viewports
2018-10-16 15:28:22 -04:00
41a6c3de1f
radeonsi: don't re-upload the sample position constant buffer repeatedly
2018-10-16 15:28:22 -04:00
fedc1fda30
radeonsi: save raster config in screen, add se_tile_repeat
2018-10-16 15:28:22 -04:00
67f02cf810
radeonsi: add GDS support to CP DMA
2018-10-16 15:28:22 -04:00
0d05581578
radeonsi: rename si_gfx_* functions to si_cp_*
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and write_event_eop -> release_mem
2018-10-16 15:28:22 -04:00
6e1cf6532d
radeonsi: make si_gfx_write_event_eop more configurable
2018-10-16 15:28:22 -04:00
203ef19f48
radeonsi: split si_copy_buffer
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compute and SDMA will be added into it.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-09-10 15:19:56 -04:00
1119fe5c25
radeonsi: merge SI and CI dma_clear_buffer and remove the callback
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also use assertions for the requirements that offset and size are a multiple
of 4.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-09-10 15:19:56 -04:00
93b8b987d0
radeonsi: add a thorough clear/copy_buffer benchmark
2018-08-29 15:31:42 -04:00
5914f5bd4a
radeonsi: let internal compute dispatches tune WAVES_PER_SH
2018-08-29 15:31:42 -04:00
c5442c1165
radeonsi: add TGSI_SEMANTIC_CS_USER_DATA for reading up to 4 SGPRs with TGSI
2018-08-29 15:31:42 -04:00
c359880d8b
radeonsi: add SI_QUERY_TIME_ELAPSED_SDMA for measuring SDMA performance
2018-08-29 15:31:42 -04:00
0c5429cc73
radeonsi: add flag L2_STREAM for minimal cache usage
2018-08-29 15:31:41 -04:00
df50099834
radeonsi: use radeon_info::name
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-08-14 21:20:31 -04:00
de8d5edbc4
radeonsi: split si_clear_buffer to remove enum si_method
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Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-14 21:21:12 -04:00
4de92f2abb
radeonsi: replace CP_DMA_USE_L2 with enum si_cache_policy
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Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-14 21:21:10 -04:00
ac72a6bd0b
radeonsi: move internal TGSI shaders into si_shaderlib_tgsi.c
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Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-14 21:20:31 -04:00
0ca8294ece
radeonsi: implement EXT_window_rectangles
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-08-14 21:19:02 -04:00
4bad50ded9
radeonsi: cosmetic changes
2018-08-04 03:10:30 -04:00
726a48c94f
radeonsi: add new R600_DEBUG test "testclearbufperf"
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Signed-off-by: Darren Powell <darren.powell@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-08-02 16:09:22 -04:00
20dd75a926
radeonsi: use storage_samples instead of color_samples in most places
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and use pipe_resource::nr_storage_samples instead of
r600_texture::num_color_samples.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-07-31 18:28:41 -04:00
0866edede0
radeonsi: Add debug option to enable LLVM GlobalISel (v2)
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R600_DEBUG=gisel will tell LLVM to use GlobalISel rather than
SelectionDAG for instruction selection.
v2: mareko: move the helper to src/amd/common
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <tstellar@redhat.com>
2018-07-23 20:23:48 -04:00
0eb65b4944
radeonsi: rename si_compiler -> ac_llvm_compiler
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As precursor to moving init to common code, just rename the struct
and move it.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-07-04 05:31:32 +10:00
bd963f8430
radeonsi: rename r600_transfer -> si_transfer
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
d4755ef389
radeonsi: remove redundant si_texture::cmask_size
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cmask_buffer and surface.cmask_size can replace its role.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
2a8d1039b6
radeonsi: inline struct r600_cmask_info
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
166250f4e5
radeonsi: move CMASK size computation into ac_surface
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
2d64a68c6f
radeonsi: rename r600_surface -> si_surface
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
218e133695
radeonsi: rename r600_memory_object -> si_memory_object
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
e5df04f13d
radeonsi: remove unused r600_memory_object::offset
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The real offset is passed through resource_from_memobj.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
7bd40dc2f2
radeonsi: clean up some #includes
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Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-06-25 18:33:58 -04:00
f966929805
radeonsi: add a debug flag to zero vram allocations
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This allows to avoid having to see garbage in Dying Light loading screen
at least, which probably expects Windows/NV behavior of all allocations
being zeroed by default.
Analogous to radv flag with the same name.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-06-21 12:18:50 +03:00
Sonny Jiang
Marek Olšák
Nicolai Hähnle
Darren Powell
Tom Stellard
Dave Airlie
Grazvydas Ignotas