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radeonsi: clamp point size to the limit 

This fixes dEQP-GLES2.functional.rasterization.limits.points.
Broken by: ea039f789d

Tested-by: Jakob Bornecrantz <jakob@collabora.com>
This commit is contained in:
Marek Olšák 2018-10-17 12:26:54 -04:00
parent eae8f49fc6
commit 77bcbe712e
3 changed files with 5 additions and 3 deletions
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5
src/gallium/drivers/radeonsi/si_get.c
View File

@ -333,11 +333,12 @@ static float si_get_paramf(struct pipe_screen* pscreen, enum pipe_capf param)
switch (param) {
case PIPE_CAPF_MAX_LINE_WIDTH:
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
/* This depends on the quant mode, though the precise interactions
* are unknown. */
return 2048;
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return SI_MAX_POINT_SIZE;
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:

1
src/gallium/drivers/radeonsi/si_pipe.h
View File

@ -48,6 +48,7 @@
#define SI_BASE_VERTEX_UNKNOWN INT_MIN
#define SI_RESTART_INDEX_UNKNOWN INT_MIN
#define SI_NUM_SMOOTH_AA_SAMPLES 8
#define SI_MAX_POINT_SIZE 2048
#define SI_GS_PER_ES 128
/* Alignment for optimal CP DMA performance. */
#define SI_CPDMA_ALIGNMENT 32

2
src/gallium/drivers/radeonsi/si_state.c
View File

@ -898,7 +898,7 @@ static void *si_create_rs_state(struct pipe_context *ctx,
if (state->point_size_per_vertex) {
psize_min = util_get_min_point_size(state);
psize_max = 8192;
psize_max = SI_MAX_POINT_SIZE;
} else {
/* Force the point size to be as if the vertex output was disabled. */
psize_min = state->point_size;