Commit Graph

299 Commits

Author SHA1 Message Date
Samuel Pitoiset 741c0b1605 radv: enable TC-compat HTILE for mipmaps on GFX10+
Mipmaps+layers should be investigated and mipmaps support added
for previous gens (GFX8-9).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8124>
2021-01-27 09:19:09 +01:00
Samuel Pitoiset 27d4a15528 radv: remove unnecessary radv_image::tc_compatible_htile
Use the surface flags directly instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8579>
2021-01-20 17:18:39 +00:00
Samuel Pitoiset c28401ab43 radv: enable TC-compat HTILE for D16S8 on GFX9+
I don't know why this wasn't enabled but I think it should be.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>
2021-01-19 18:16:35 +00:00
Samuel Pitoiset cc5b6a0e89 radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+
Only GFX8 has some depth/stencil resolve failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>
2021-01-19 18:16:35 +00:00
Bas Nieuwenhuizen af1aef10f9 radv: Do not use a pipe offset for aliased sparse images.
Otherwise the offset might not match between the images that are
aliased.

Fixes: e553ea51e8 ("radv: Create sparse images.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4072
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8535>
2021-01-18 11:12:45 +00:00
Samuel Pitoiset 3c1275ccae radv: enable DCC for MSAA on GFX10+
It should work fine now.

This gives +1-2% improvements with Control MSAA (2x and 4x)
on Sienna.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8413>
2021-01-13 17:24:31 +00:00
Samuel Pitoiset 001c1105f1 radv: enable DCC for mipmaps on GFX10+
Seems to work fine.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13 13:42:04 +00:00
Samuel Pitoiset 825e2386dc radv: do not enable DCC for 3D images with mipmaps on GFX10+
This is broken for some reasons, and probably rare enough to
care for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>
2021-01-13 13:42:04 +00:00
Samuel Pitoiset 051e2bfe80 radv: allocate and initialize the FCE predicate value for CMASK too
In case we don't have DCC, we can still predicate FCE with CMASK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
2021-01-13 12:24:29 +01:00
Samuel Pitoiset 7d44ba7217 radv: enable DCC for layered color images on GFX10+
There is still some CTS failures on GFX9.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8368>
2021-01-11 15:42:22 +00:00
Bas Nieuwenhuizen e553ea51e8 radv: Create sparse images.
Disable all metadata for now.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7953>
2021-01-11 12:01:34 +00:00
Bas Nieuwenhuizen dea1c06c9b ac/surf: Prepare for 64-bit flags.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7953>
2021-01-11 12:01:34 +00:00
Samuel Pitoiset 52b6adfbfb radv: disable TC-compat HTILE in GENERAL for Detroit: Become Human
The game has invalid usage of render loops and enabling TC-compat
HTILE in GENERAL introduces rendering issues.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3063
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8359>
2021-01-11 11:15:56 +00:00
Samuel Pitoiset 00064713a3 radv: determine at creation if an image view can be fast cleared
This can be determined earlier than every time a clear is performed
by the driver, it probably saves a bunch of CPU cycles.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8370>
2021-01-11 08:31:11 +01:00
Samuel Pitoiset f40a7d3c93 radv: fix performance regression by restoring TC-compat HTILE in GENERAL
This fixes a performance regression for games (eg. Youngblood) that
declare all images as concurrent. This is likely buggy for compute
queues but this just restores the previous behaviour for now.

Fixes: f4f096805b ("radv: fix TC-compat HTILE images with DST_OPTIMAL on the compute queue")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8351>
2021-01-08 09:22:32 +00:00
Samuel Pitoiset 0ae1cf46a6 radv: fix enabling TC-compat HTILE in GENERAL for writes on GFX10+
It wasn't expected to also enable inside render loops.

Fixes: 4bb92d9145 ("radv: enable TC-compat HTILE in GENERAL on GFX10+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8351>
2021-01-08 09:22:32 +00:00
Samuel Pitoiset 20683461e3 radv: configure the texture descriptor for TC-compat CMASK on GFX10+
This was missing, it can be enabled with RADV_PERFTEST=tccompatcmask.
Note that this feature is still experimental.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8350>
2021-01-08 08:21:17 +01:00
Samuel Pitoiset 4bb92d9145 radv: enable TC-compat HTILE in GENERAL on GFX10+
GFX10+ supports compressed writes to HTILE, so it should just work
to skip decompressions when transitioning from/to GENERAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8039>
2021-01-05 12:10:11 +00:00
Samuel Pitoiset 76e33d528b radv: clean up radv_layout_is_htile_compressed()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8039>
2021-01-05 12:10:11 +00:00
Samuel Pitoiset f4f096805b radv: fix TC-compat HTILE images with DST_OPTIMAL on the compute queue
This is probably rare but can happen if someone performs a depth-stencil
copy on the compute queue. This might work (untested by CTS) but it
looks more conservative to decompress before perfoming the operation.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8039>
2021-01-05 12:10:11 +00:00
Samuel Pitoiset 9c176a7e63 Revert "radv: use 32-bit predication for skipping FCE on GFX10.3+"
This is actually wrong because we still assume 64-bit in a bunch
of places.

This reverts commit b24b3026cc.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8214>
2020-12-24 09:56:25 +01:00
Bas Nieuwenhuizen 9339ed2f85 radv: Enable DCC in the GENERAL layout on GFX10+.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Bas Nieuwenhuizen 88f392f6f8 radv: Never allow fast clears on DCC images that are not compressed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
2020-12-21 18:32:24 +00:00
Samuel Pitoiset 909e06075d radv: ignore the mutable bit for TC-compatible HTILE
All depth/stencil formats are incompatible each others, so the
mutable bit and the image format list can be ignored.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8126>
2020-12-21 17:46:03 +00:00
Samuel Pitoiset 81a6ee7a9b radv: enable TC-compat HTILE for D32_SFLOAT+MSAA on GFX10+
This was disabled due to some depth/stencil resolve CTS failures
which are now fixed.

I figured that disabling TC-compat HTILE for D32_SFLOAT+MSAA reduced
performance in Control by -11% on Vega10. In fact, the game only uses
D32_SFLOAT for depth rendering.

This gives a huge boost in Control on Navi10 (eg. +17% in MSAA4x).
Note that the game is still slower than PRO without MSAA on Navi10,
but as fast (or even a bit faster) on Vega10.

I think TC-compat HILE could also be enabled for D32_SFLOAT_S8_UINT
but it needs more testing first.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8143>
2020-12-18 07:57:03 +01:00
Samuel Pitoiset b24b3026cc radv: use 32-bit predication for skipping FCE on GFX10.3+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7897>
2020-12-07 09:30:05 +00:00
Tony Wasserka cba6ec309a radv: Fix -Wshadow warnings
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7430>
2020-11-20 09:29:19 +00:00
Bas Nieuwenhuizen a4dc4ece63 radv: Use internal drm_fourcc.h
Fixes: 0833dd7d12 "amd/common: Add support for modifiers."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3794
̀Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7619>
2020-11-15 15:30:43 +00:00
Simon Ser 1cf1ece738 radv: add img debug flag
This is similar to AMD_DEBUG=tex, but for radv.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5734>
2020-11-13 11:32:17 +01:00
Bas Nieuwenhuizen 0833dd7d12 amd/common: Add support for modifiers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6176>
2020-11-13 03:27:28 +00:00
Bas Nieuwenhuizen 9acfbe3022 radv: Do the sample check for tiling earlier.
The LINEAR optimization is not allowed for MSAA images.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7594>
2020-11-13 02:56:07 +01:00
Rhys Perry 86ef139bf4 radv: implement VK_EXT_shader_image_atomic_int64
The extension is only exposed on ACO and LLVM 11+ because of a LLVM bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
2020-11-09 18:28:59 +00:00
Bas Nieuwenhuizen 1675c83a4f radv: Fix exporting/importing multisample images.
Otherwise FMASK metadata segfaults and on import we disable it ...

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7358>
2020-11-09 12:44:54 +00:00
Bas Nieuwenhuizen 29999e6b9d radv: Fix 1D compressed mipmaps on GFX9.
Partial rollback as GFX9 really requires height = 1 to work.

The two substantial parts of the fix remaining:

1) Deal with views with multiple levels.
2) Limit the expansion to the base mip pitch/height. On GFX9 this
   is exactly equal to the surf_pitch that was used before. I've
   done some investigation to make sure that on GFX10 this always
   results in the right physical layout.

Remaining stupid question is how the actual extents for bounds
checking never end up too low when the size gets clamped, but
this change and the previous change don't change that ...

Fixes: 1fb3e1fb70 "radv: Fix mipmap extent adjustment on GFX9+."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7245>
2020-10-28 00:31:04 +00:00
Bas Nieuwenhuizen 1fb3e1fb70 radv: Fix mipmap extent adjustment on GFX9+.
With arrays we really have to use the correct size for the base
mipmap to get the right array pitch. In particular, using
surf_pitch results in pitch that is bigger than the base mipmap
and hence results in wrong pitches computed by the HW.

It seems that on GFX9 this has mostly been hidden by the epitch
provided in the descriptor but this is not something we do on
GFX10 anymore.

Now this has some draw-backs:

1. normalized coordinates don't work
2. Bounds checking uses slightly bigger bounds.

2 mostly is not an issue as we still ensure that they're within
the texture memory and not overlapping other layers/mips, but
we can't properly ignore writes.

1 is kinda dead in the water ... On the other hand I'd argue that
using normalized coords & a filter for sampling a block view of
a compressed format is extraordinarily useless.

The old method we employed already had these drawbacks for everything
except the base miplevel of the imageview.

AFAICT this is the same tradeoff AMDVLK makes and no CTS test hits
this. (once it does I think the HW is dead in the water ... Only
workaround I can think of is shader processing which is hard because
we don't know texture formats at compile time.)

I also removed the extra calculations when the image has only 1 mip
level because they ended up being a no-op in that case.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2292
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2266
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2483
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2906
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7090>
2020-10-12 21:00:00 +00:00
Rhys Perry 19561f31a8 radv: remove trailing whitespace
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7043>
2020-10-07 11:53:23 +00:00
Bas Nieuwenhuizen e893102bcf radv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>
2020-09-23 09:22:03 +00:00
Bas Nieuwenhuizen 0a84c595c2 Revert "radv: set BIG_PAGE to improve performance on GFX10.3"
This reverts commit f4d861696d.

Turns out we cannot use BIG_PAGE with GTT and we can't tell
when a buffer is spilled to GTT.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
2020-09-21 10:34:46 +00:00
Bas Nieuwenhuizen d78df70c2a radv,radeonsi: Disable compression on interop depth images
If we want to use HTILE correctly we need to communicate extra stuff
like clear colors. (Unlike DCC there is no HTILE FCE)

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
2020-09-20 23:51:58 +00:00
Marek Olšák b7a6333ee4 amd/registers: switch to new generated register definitions
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
2020-09-01 08:45:54 -04:00
Samuel Pitoiset f4d861696d radv: set BIG_PAGE to improve performance on GFX10.3
It reduces traffic between CB, DB and TCP blocks if buffers
respect a certain alignment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
2020-08-28 05:53:41 +00:00
Bas Nieuwenhuizen 50b039590e radv: Use getter instead of setter to extract value.
Oops ...

Fixes: 64768111c3 "radv: Handle slightly different image dimensions."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3417
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6337>
2020-08-16 23:40:03 +00:00
Bas Nieuwenhuizen 0980d1d5ab radv: Clean up setting the surface flags.
If we don't give the init function access to the fields we will not
accidentally start setting them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6274>
2020-08-14 10:29:44 +00:00
Bas Nieuwenhuizen d19bc94e4e radv: When importing an image, redo the layout based on the metadata.
When importing a DMA-BUF, the image layout created in vkImageCreate may
not match the imported BO's. To make this work we redo the layout based
on the metadata of the imported image.

The original patch did a delayed allocation just as for AHB, but that
does not work for images that are not imported (but e.g. exported only).

Original patch by Simon Ser <contact@emersion.fr>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2801
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6274>
2020-08-14 10:29:44 +00:00
Bas Nieuwenhuizen e362ccb20c radv: Do not consider layouts fast-clearable on compute queue.
We cannot decompress from the compute queue. While I'm pretty sure
VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL is only useful on the
graphics queue, I cannot find a VU that prevents the transition
from happening on another queue, so we need to be careful here.

This patch ensures we do the decompression on the barrier that changes
the queue ownership.

Another problem was that DCC images were considered fast-clearable
when not DCC compressed, which resulted in a mess with concurrent
queue ownership.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3387
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6252>
2020-08-10 16:24:38 +00:00
Bas Nieuwenhuizen 2fa83dc64d radv: Add forcecompress debug flag.
Enables DCC/HTILE/CMASK/FMASK when supported, not just when we think
it is beneficial.

This is helpful to detect compression bugs with CTS.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6252>
2020-08-10 16:24:38 +00:00
Bas Nieuwenhuizen ff4f6202be radv: Fix assert that is too strict.
The added assert fails on MSAA images if we disable FMASK ....

Reordered things.

Fixes: c6aadbae71 "radv: Don't use both DCC and CMASK for single sample images."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3385
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6232>
2020-08-10 09:34:49 +00:00
Bas Nieuwenhuizen c6aadbae71 radv: Don't use both DCC and CMASK for single sample images.
Fixes: c67ef7695a "radv: Use ac_surface to allocate aux surfaces."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6194>
2020-08-06 10:50:22 +00:00
Samuel Pitoiset 22c8079829 radv: do not honor a user-specified pitch on GFX 10.3
According to RadeonSI, it breaks mipmapping.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6168>
2020-08-05 12:57:44 +02:00
Samuel Pitoiset 852316494c radv: destroy the base object if VkCreateImage() failed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5868>
2020-07-15 13:53:26 +02:00