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radv: fix enabling TC-compat HTILE in GENERAL for writes on GFX10+ 

It wasn't expected to also enable inside render loops.

Fixes: 4bb92d9145 ("radv: enable TC-compat HTILE in GENERAL on GFX10+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8351>
This commit is contained in:
Samuel Pitoiset 2021-01-06 17:54:08 +01:00 committed by Marge Bot
parent 20683461e3
commit 0ae1cf46a6
1 changed files with 3 additions and 3 deletions
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6
src/amd/vulkan/radv_image.c
View File

@ -1775,11 +1775,11 @@ bool radv_layout_is_htile_compressed(const struct radv_device *device,
* the number of decompressions from/to GENERAL.
*/
if (radv_image_is_tc_compat_htile(image) &&
queue_mask == (1u << RADV_QUEUE_GENERAL)) {
queue_mask == (1u << RADV_QUEUE_GENERAL) &&
!in_render_loop) {
/* GFX10+ supports compressed writes to HTILE. */
return device->physical_device->rad_info.chip_class >= GFX10 ||
(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
!in_render_loop);
!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT);
} else {
return false;
}