Commit Graph

128487 Commits

Author SHA1 Message Date
Marek Olšák 8e1193b8d3 radeon: rename RADEON_TRANSFER_* -> RADEON_MAP_*
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
2020-09-22 03:20:54 +00:00
Marek Olšák 31765340fd gallium: rename transfer flags -> map flags in comments
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
2020-09-22 03:20:54 +00:00
Marek Olšák 3586068557 gallium: rename pipe_transfer_usage -> pipe_map_flags
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
2020-09-22 03:20:54 +00:00
Marek Olšák 22253e6b65 gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_*
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
2020-09-22 03:20:54 +00:00
Marek Olšák 44f1b1be7a radeonsi: add 16-bit ALU vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Marek Olšák 6702e542cf radeonsi: don't scalarize 16-bit vec2 ALU opcodes
prerequisite for enabling vectorization, so that we don't scalarize
and vectorize at the same time, causing an infinite loop.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Marek Olšák e823742e9f radeonsi: vectorize IO for better ALU vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Marek Olšák 98a52fecda radeonsi: implement 16-bit FS color outputs
This removes type conversions from 16 bits to 32 bits in the main function
and then back to 16 bits in the epilog.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Marek Olšák d3c63d6f60 radeonsi: set flags for FP16 in shaders
v2: remove the enablement code

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Marek Olšák c5277f035e radeonsi: don't lower pack for better 16-bit vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Daniel Schürmann 581a3516dc ac/nir: implement nir_op_[un]pack_[64/32]_*
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
2020-09-22 02:44:53 +00:00
Vinson Lee 3022cf3bac glsl: Initialize ir_constant member const_elements in all constructors.
Fix defects reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member const_elements is not
initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6770>
2020-09-21 18:29:46 -07:00
Vinson Lee a5967f308c pan/bi: Fix typo.
Fix defect reported by Coverity Scan.

Same on both sides (CONSTANT_EXPRESSION_RESULT)
pointless_expression: The expression src0_u8 || src0_u8 does not
accomplish anything because it evaluates to either of its
identical operands, src0_u8.

Fixes: 2ff53879f2 ("pan/bi: Use new packing")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6780>
2020-09-21 18:03:45 -07:00
Bas Nieuwenhuizen ade72e677b st/mesa: Deal with empty textures/buffers in semaphore wait/signal.
The actual texture might not have been created yet.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3257
CC: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6788>
2020-09-22 00:14:55 +00:00
Eric Anholt 08add9f61c turnip/kgsl: Associate fences with submits.
This fixes all the I was seeing in the multiview tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>
2020-09-21 22:51:05 +00:00
Kristian H. Kristensen e80758405c turnip: Add kgsl backend
Lacking a bit around fences and wsi integration, but there's enough
here to actually drive the GPU.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>
2020-09-21 22:51:05 +00:00
Lionel Landwerlin cc3bf00cc2 intel/compiler: fixup Gen12 workaround for array sizes
We didn't handle the case of NULL images/textures for which we should
return 0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 397ff2976b ("intel: Implement Gen12 workaround for array textures of size 1")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3522
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6729>
2020-09-21 21:20:09 +00:00
Adam Jackson 54b9013e4c wsi/x11: Create a present queue for VK_PRESENT_MODE_FIFO_RELAXED_KHR
This activates the target_msc computation that we'd otherwise be using
if we were just FIFO; otherwise we'd always set target_msc = 0 and it'd
act like IMMEDIATE.

Fixes: 77d2562793 "wsi/x11: Hook up VK_PRESENT_MODE_FIFO_RELAXED_KHR"
Fixes: mesa/mesa#3512
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6804>
2020-09-21 15:48:22 -04:00
Thong Thai 26a83bef7b gallium/auxiliary/vl: Include src region in scale_y calculation
Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3521
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6736>
2020-09-21 18:59:36 +00:00
Thong Thai 9a4daac0bb frontends/va: Enabled packed headers for H.264 encoder
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
2020-09-21 18:45:35 +00:00
Thong Thai 7b9414f23f radeon: Pass HEVC encode crop parameters to the encoder
Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2351
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
2020-09-21 18:45:35 +00:00
Thong Thai 245f619411 gallium: Parse packed HEVC SPS encode header for crop parameters
The crop / conformance window parameters are set by ffmpeg but they only
seem to be made available in packed headers. This commit copies the H265
header parsing code from st/omx (planning in the future to move this
code to a common place to be shared by the different state trackers) in
order to grab the crop parameters

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
2020-09-21 18:45:35 +00:00
Gert Wollny 0a3f92bcc6 r600/sfn: Fix typo in comment
Thanks Stanislav Jakúbek for ponting it out.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
2020-09-21 17:16:54 +00:00
Gert Wollny 07cb38f0d2 r600/sfn: Fix component count for fdph
The second parameter has four components, and this is the one that would
be copied when splitting constants.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
2020-09-21 17:16:54 +00:00
Gert Wollny eb3199db3e r600/sfn: make number of source components a local variable
There is no need to keep that value as a member and it irritates
Coverity.

Fixes: 688680decc
  r600/nir: fetch sources and split uniforms before emittting alu instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
2020-09-21 17:16:54 +00:00
Krunal Patel d78e7b7aee gallium/auxiliary/vl: Odd Dimensions are failing
Issue: While running the tast for odd resolutions there are green lines
observed in the dumped image. The resolution is 321x241, the extra 1 pixel
data is missing in the image. The reason for this is in the post
processing when we adjust the size of height and width we are
dividing it by 2.

Fix: To resolve this issue we first need to align it to 2 and then divide
by 2 to get the required values. Once we do this we will have proper data
in the dumped image and missing pixel data will be available.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6795>
2020-09-21 15:52:36 +00:00
Samuel Pitoiset 05b6612b4e radv: do not lower UBO/SSBO access to offsets
Use nir_lower_explicit_io instead of lowering to offsets. Extra
(useless) additions are removed by lowering load_vulkan_descriptor
to vec2(src.x, 0).

fossils-db (Navi):
Totals from 18236 (13.21% of 138013) affected shaders:
SGPRs: 1172766 -> 1168278 (-0.38%); split: -0.89%, +0.50%
VGPRs: 940156 -> 952232 (+1.28%); split: -0.08%, +1.37%
SpillSGPRs: 30286 -> 31109 (+2.72%); split: -0.78%, +3.50%
SpillVGPRs: 1893 -> 1909 (+0.85%)
CodeSize: 87910396 -> 88113592 (+0.23%); split: -0.35%, +0.58%
Scratch: 819200 -> 823296 (+0.50%)
MaxWaves: 205535 -> 202102 (-1.67%); split: +0.05%, -1.72%
Instrs: 17052527 -> 17113484 (+0.36%); split: -0.32%, +0.67%
Cycles: 670794876 -> 669084540 (-0.25%); split: -0.38%, +0.13%
VMEM: 5274728 -> 5388556 (+2.16%); split: +3.10%, -0.94%
SMEM: 1196146 -> 1165850 (-2.53%); split: +2.06%, -4.60%
VClause: 381463 -> 399217 (+4.65%); split: -1.08%, +5.73%
SClause: 666216 -> 631135 (-5.27%); split: -5.44%, +0.18%
Copies: 1292720 -> 1289318 (-0.26%); split: -1.28%, +1.01%
Branches: 467336 -> 473028 (+1.22%); split: -0.67%, +1.89%
PreSGPRs: 766459 -> 772175 (+0.75%); split: -0.53%, +1.28%
PreVGPRs: 819746 -> 825327 (+0.68%); split: -0.05%, +0.73%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
2020-09-21 15:37:11 +00:00
Samuel Pitoiset 3808fa40b4 radv: add a helper for loading meta descriptors
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
2020-09-21 15:37:11 +00:00
Michel Dänzer 0836e90418 ci: Don't create test-docs job if the pages one exists in the pipeline
It's redundant in that case.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:04 +00:00
Michel Dänzer efec576405 ci: Prevent pages job from running in pre-merge pipelines
Since pre-merge pipelines run in the "mesa" namespace now, the rule
would have created the job if the source branch was named "master" (and
the job might have updated the public website).

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:04 +00:00
Michel Dänzer 8cb450f769 ci: Always use CI_PROJECT_NAMESPACE instead of CI_PROJECT_PATH
And always check it first.

Cleanup for consistency.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:04 +00:00
Michel Dänzer 208876b709 ci: Add "is for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:04 +00:00
Michel Dänzer 0fcb8b33c5 ci: Add "is pre-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:04 +00:00
Michel Dänzer b47f1bbff9 ci: Add "is post-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Michel Dänzer 22a7c252dc ci: Add "is forked branch" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Michel Dänzer 24f5329e2a ci: Add "is forked branch or pre-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Michel Dänzer a33026ee7c ci: Add "is post-merge pipeline, not for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Michel Dänzer f79ae94538 ci: Add "is pre-merge pipeline for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Michel Dänzer ac56d66992 ci: Add "is master branch of main project" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Michel Dänzer c3ae82be24 ci: Add "is scheduled pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
2020-09-21 15:13:03 +00:00
Samuel Pitoiset 2b99e15d0a radv: fix transform feedback crashes if pCounterBufferOffsets is NULL
From the Vulkan 1.2.154 spec:
    "If pCounterBufferOffsets is NULL, then it is assumed the
     offsets are zero."

Fix new CTS
dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.

CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
2020-09-21 15:02:02 +00:00
Rhys Perry d2c18b7bf3 aco: use bit vectors for liveness sets
This seems to be much faster than hash sets. When compiling pipelines from
5 games, live_var_analysis takes about a third the time it used to and
fossilize-replay is ~1.77% faster.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6733>
2020-09-21 13:47:28 +00:00
Rhys Perry ec2185c598 aco: keep track of temporaries' regclasses in the Program
A future change will switch the liveness sets to bit vectors, which don't
contain regclass information.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6733>
2020-09-21 13:47:28 +00:00
Pierre-Eric Pelloux-Prayer f007115e3b radeonsi: change vendor name to AMD
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
2020-09-21 14:15:03 +02:00
Pierre-Eric Pelloux-Prayer b73e165a04 radeonsi: reduce PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE value
The new value (64 MB) is a compromise:
- the old value was very large (max_alloc & 0xffffffff) and caused https://gitlab.freedesktop.org/mesa/mesa/-/issues/3301
- amdgpu-pro allows 512MB, nvidia 64MB

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
2020-09-21 14:15:03 +02:00
Pierre-Eric Pelloux-Prayer 1826367333 radeonsi: move GL vendor workaround to drirc
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
2020-09-21 14:14:57 +02:00
Pierre-Eric Pelloux-Prayer fc6df020e3 gallium: add PIPE_CAP_MAX_TEXTURE_MB
Allows driver to override the default value (1024) from mesa.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
2020-09-21 14:14:48 +02:00
Rhys Perry 2228835fb5 radv,aco: fix reading primitive ID in FS after TES
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3530
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6760>
2020-09-21 11:54:53 +00:00
Boris Brezillon b1c3f63b8d panfrost: decode: Misc formatting improvements
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
2020-09-21 07:35:45 -04:00
Boris Brezillon 6b92303772 panfrost: Avoid copying job descriptors around when we can
Job descriptors are written section by section and are never modified
after them been emitted. Let's avoid copying things around by allocating
descriptors upfront and letting the scoreboard logic only write the
header section.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
2020-09-21 07:35:45 -04:00