Commit Graph

1589 Commits

Author SHA1 Message Date
Eric Anholt 272f9cfe6a dri: Use DRM_FORMAT_* instead of defining our own copy.
We have only two defines that aren't from DRM_FORMAT_*: SARGB and
SABGR.  Keep only those as __DRI_IMAGE_FOURCC and garbage collect the
rest.

While this header is also used from the X server, the X server doesn't
use any __DRI_IMAGE enums.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-09-11 13:05:10 -07:00
Eric Anholt c18b1f0e71 uapi: Update drm_fourcc.h
Taken from drm-misc-next 268de6530aa1 ("drm: mst: Fix query_payload
ack reply struct")

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-09-11 13:04:53 -07:00
Anuj Phogat cb18046073 intel: Add few Ice Lake brand strings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-09-10 15:59:30 -07:00
Lionel Landwerlin 341034a73d intel: update product names for WHL
Documentation list all of those as "UHD".

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111629
BSpec: 33266
Acked-by: Tapani Pälli <tapani.palli@intel.com>
2019-09-10 19:21:38 +03:00
Heinrich Fink 8c933c9d96 headers: Add GL_MESA_EGL_sync token to GL
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-09-08 08:01:55 +00:00
Heinrich Fink c9a3f4fe40 include: sync GL headers with registry
Integrating headers from upstream registry [0] master branch. Effective
GL registry commit integrated:

9d534f9312e56c72df763207e449c6719576fd54

Keeping the following quirks local to Mesa:

- glext.h: BUILDING_MESA guard (see !1492)

- glxext.h: glXQueryGLXPbufferSGIX: 'int' return type (Mesa) vs while
'void' (GL registry)

- glxext.h: GLX_RENDERER_ID_MESA is still expected by some mesa tests,
even though its token has been removed from the spec (see
docs/specs/MESA_query_renderer.spec)

- glxext.h: glXGetTransparentIndexSUN / PFNGLXGETTRANSPARENTINDEXSUNPROC
argument pTransparentIndex has type 'unsigned long *' (Mesa) vs. 'long
*' (GL registry)

[0] https://github.com/KhronosGroup/OpenGL-Registry

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-09-05 09:26:15 +02:00
Jordan Justen cfbde3282d
pci_id_driver_map: Support preferring iris over i965
This adds the ability for intel devices that:

 * Only load on i965
 * Only load on iris
 * First attempt i965, and try iris next
 * First attempt iris, and try i965 next

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-08-28 13:38:34 -07:00
Marek Olšák 6229b5a058 radeonsi/gfx10: finish up Navi14, add PCI ID
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-08-27 16:16:08 -04:00
Adam Jackson 3dd299c3d5 glx: Sync <GL/glxext.h> with Khronos
Minor fixups required to keep the prototypes matching and to remove
mention of retired enums.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-08-22 13:29:04 -04:00
Kevin Strasser 4861d2a395 gbm: Add buffer handling and visuals for fp16 formats
Define and set a new loader cap DRI_LOADER_CAP_FP16, indicating that gbm can
handle fp16 formats.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser a427c20080 dri: Add fp16 formats
Add dri formats for RGBA ordered 64 bpp IEEE 754 half precision floating
point. Leverage existing offscreen render support for
MESA_FORMAT_RGBA_FLOAT16 and MESA_FORMAT_RGBX_FLOAT16.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser 5a747306ce dri: Add config attributes for color channel shift
The existing mask attributes can only support up to 32 bpp. Introduce
per-channel SHIFT attributes that indicate how many bits, from lsb towards
msb, the bit field is offset. A shift of -1 will indicate that there is no
bit field set for the channel.

As old loaders will still be looking for masks, we set the masks to 0 for
any formats wider than 32 bpp.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-08-21 18:36:57 +00:00
Kevin Strasser d07a56dbc0 drm-uapi: Update headers for fp16 formats
From drm-next commit 88ab9c76d191ad8645b483f31e2b394b0f3e280e

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-08-21 18:36:57 +00:00
Rob Herring c45c2d7960 panfrost: Sync UAPI header from kernel
Sync the panfrost_drm.h UAPI header with the latest from the kernel.
This adds madvise ioctl and GPU feature params.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-08-19 19:33:20 -05:00
Marek Olšák aafc95ceb6 radeonsi: add support for Renoir
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-08-14 17:31:04 -04:00
Eric Engestrom d0916edfcb EGL: sync headers with Khronos
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-08-14 21:48:23 +01:00
Daniel Stone bd08a83b09 dri_interface: add DRI2_BufferDamage interface
Add a new DRI2_BufferDamage interface to support the
EGL_KHR_partial_update extension, informing the driver of an overriding
scissor region for a particular drawable.

Based on a commit originally authored by:
Harish Krupo <harish.krupo.kps@intel.com>
renamed extension, retargeted at DRI drawable instead of context,
rewritten description

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-08-13 14:40:14 +02:00
Jason Ekstrand 8aef89cc2d vulkan: Update the XML and headers to 1.1.119
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-08-12 14:56:33 +00:00
Tomeu Vizoso 19afd41e65 panfrost: Mark BOs as NOEXEC
Unless a BO has the EXECUTABLE flag, mark it as NOEXEC.

v2: - Rework version detection (Alyssa).

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-08-08 07:42:52 +02:00
Eric Engestrom 9668d7f539 introduce c11_compat.h to provide C11 things in C99
Right now, all it does is provide the new standard `static_assert()` name.

Fixes: fbf7c38da3 ("egl/wayland: use bitset.h for `formats` bit set")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Tested-by: Bhushan Shah <bshah@kde.org>
2019-08-04 11:14:25 +01:00
Marek Olšák 7708540363 amd: add support for Arcturus
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-07-29 17:52:54 -04:00
Lionel Landwerlin 0d3a532a33 vulkan: Bump headers to 1.1.117
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-29 21:26:07 +00:00
Lionel Landwerlin 161b5f00db include/vulkan: bump vk_android_native_buffer
Taken off https://android.googlesource.com/platform/frameworks/native/+/refs/tags/android-9.0.0_r45/vulkan/include/vulkan/vk_android_native_buffer.h

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-29 21:26:07 +00:00
Jason Ekstrand 256e6c2d94 vulkan: Update the XML and headers to 1.1.116
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-24 12:55:40 -05:00
Lionel Landwerlin 6271d16320 vulkan: bump headers & registry to 1.1.114
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-07-09 00:09:36 +03:00
Eric Engestrom c314ba2c26 scons: s/HAVE_NO_AUTOCONF/HAVE_SCONS/
Back when autotools and scons were the two build systems, it kinda made
sense to call scons "not autoconf", but autoconf's been gone for a while
now and other build systems have been added (android.mk and meson), so
the name really doesn't make any sense anymore.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-07-04 16:41:23 +01:00
Andres Gomez 4000428ada vulkan: Update headers to 1.1.113
Some headers were not dragged in the last update(s).

Fixes: 465ec0b145 ("vulkan: Update the XML and headers to 1.1.113")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-07-04 10:37:52 +00:00
Nicolai Hähnle 8845a23698 amd: add NAVI10 PCI IDs
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-07-03 15:51:13 -04:00
Jason Ekstrand 465ec0b145 vulkan: Update the XML and headers to 1.1.113
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-07-02 22:28:44 +00:00
Marek Olšák 8ab9f3a857 include: update GL headers from the registry
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2019-06-21 19:00:52 -04:00
Anuj Phogat e334a595e4 intel/icl: Add new ICL PCI-IDs
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-06-21 08:38:08 -07:00
Tomeu Vizoso 6f60fec48f panfrost: Adapt to constant name change in UABI
We hadn't updated the kernel header after the driver got into mainline.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
2019-06-18 15:26:08 +02:00
Guido Günther 7a5b19346a etnaviv: drm: Move uapi header
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2019-06-05 08:58:05 +00:00
Jason Ekstrand 8339e3f010 vulkan: Update the XML and headers to 1.1.110
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-06-04 17:30:51 +00:00
Marek Olšák b257956021 ac: treat Mullins as Kabini, remove the enum
it's the same design
2019-05-27 15:10:51 -04:00
Eric Anholt e5db87b00b freedreno: Restore msm_drm.h to a pristine "make headers_install" copy.
This diverged back in f1374805a8 ("drm-uapi: use local files, not system
libdrm") to point at drm-uapi's copy, which we don't need now that we're
actually in drm-uapi.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-05-14 11:51:57 -07:00
Eric Anholt 18d11cb4dc freedreno: Move msm_drm.h to the same spot as other DRM uapi.
The new location matches other drivers, and has a README about the rules
for updating it.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-05-14 11:51:55 -07:00
Jason Ekstrand b464504777 vulkan: Update the XML and headers to 1.1.108
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-13 17:20:33 -05:00
Chris Wilson 8b7e19dbc5 drm-uapi: Update i915_drm.h for I915_CONTEXT_PARAM_RECOVERABLE
Pull i915_drm.h to include

kernel commit ba4fda620a5f7db521aa9e0262cf49854c1b1d9c
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Feb 18 10:58:21 2019 +0000

    drm/i915: Optionally disable automatic recovery after a GPU reset

for improved resilience in handling GPU hangs.
2019-05-08 17:21:07 -07:00
Andre Heider 8b13aac966 st/nine: skip position checks in SetCursorPosition()
For HW cursors, "cursor.pos" doesn't hold the current position of the
pointer, just the position of the last call to SetCursorPosition().

Skip the check against stale values and bump the d3dadapter9 drm version
to expose this change of behaviour.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
2019-04-20 13:06:29 +02:00
Jason Ekstrand 7f113c07b2 vulkan: Update the XML and headers to 1.1.106
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-04-15 13:25:43 +00:00
Qiang Yu 64eaf60ca7 drm-uapi: add lima_drm.h
Acked-by: Eric Anholt <eric@anholt.net>
Signed-of-by: Qiang Yu <yuq825@gmail.com>
2019-04-11 09:57:53 +08:00
Jian-Hong Pan 7295487c6d intel: Fix the description of Coffeelake pci-id 0x3E98
According to Intel website [1], the description of chipset 8086:3E98 is
Intel(R) UHD Graphics 630.  Besides, xserver also mentions it as
"Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)" in commit d3a26bbf
(DRI2: Add another Coffeelake PCI ID) [2].

This patch modifies the description to sync with xserver.

[1]: https://ark.intel.com/content/www/us/en/ark/products/134896/intel-core-i5-9600k-processor-9m-cache-up-to-4-60-ghz.html
[2]: d3a26bbf61

Fixes: commit 44f1dcf9b3 "i965: Add a new CFL PCI ID."
Signed-off-by: Jian-Hong Pan <jian-hong@endlessm.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
2019-04-10 12:31:00 -07:00
Anuj Phogat 82f6a746e8 intel: Add support for Comet Lake
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-01 14:07:40 -07:00
Anuj Phogat dce13e58b0 intel: Add Elkhart Lake PCI-IDs
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-27 19:34:48 +00:00
Bas Nieuwenhuizen 42ea88c673 vulkan: Update the XML and headers to 1.1.104
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-18 14:48:41 +00:00
Tomeu Vizoso 27b0661e30 panfrost: Adapt to uapi changes
Two ioctls had wrong DRM_IO* flags.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2019-03-14 15:24:27 +01:00
Tomeu Vizoso bfbad30543 panfrost: Set bo->size[0] in the DRM backend
So we can unmap it later.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-13 07:35:25 +01:00
Christian Gmeiner 076a7095bb st/dri: allow direct UYVY import
Push this format to the pipe driver unchanged.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-11 22:19:11 +01:00
Tomeu Vizoso 756f7b9989 panfrost: Add backend targeting the DRM driver
This backend interacts with the new DRM driver for Midgard GPUs which is
currently in development.

When using this backend, Panfrost has roughly on-par functionality as
when using the non-DRM driver from Arm.

Alyssa Rosenzweig: To do so, we implement additional routines for
runtime GPU version detection and fencing. We cleanup some duplicate
code interfering with the new driver. We fix a long-standing memory leak
which is aggravated on the new driver. Finally, we implement BO
import/export in a way compatible with the new driver. These changes are
squashed to preserve bisectability given the hard-to-track ABI shifts in
the nondrm module

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-03-10 19:09:23 +00:00