Commit Graph

88040 Commits

Author SHA1 Message Date
Kenneth Graunke 08b5713068 anv: Handle patch primitives.
v2: Use anv_pipeline_has_stage rather than tess_info != NULL.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:27:10 -08:00
Kenneth Graunke 5297267a1c nir: Add a pass to lower TES patch_vertices intrinsics to a constant.
In Vulkan, we always have both the TCS and TES available in the same
pipeline, so we can simply use the TCS OutputVertices execution mode
value as the TES PatchVertices built-in.

For GLSL, we handle this in the linker.  But we could use this pass
in the case when both TCS and TES are linked together, if we wanted.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:21:53 -08:00
Kenneth Graunke 944e8b08cd spirv: Silence unsupported tessellation capability warnings.
...when the capability bit is set.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:21:38 -08:00
Kenneth Graunke 1e5b09f42f spirv: Tidy some repeated if checks by using a switch statement.
Iago suggested tidying this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:21:31 -08:00
Kenneth Graunke bb04b84114 spirv: Add tessellation varying and built-in support.
We need to:
- handle the extra array level for per-vertex varyings
- handle the patch qualifier correctly
- assign varying locations

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:21:28 -08:00
Kenneth Graunke 23710e17f8 spirv: Handle tessellation execution modes.
v2: Use info->tess.
v3: Handle more things in either TCS/TES.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com> [v1]
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:21:24 -08:00
Kenneth Graunke 5edc338162 compiler: Merge shader_info's tcs and tes structs.
Annoyingly, SPIR-V lets you specify all of these fields in either the
TCS or TES, which means that we need to be able to store all of them
for either shader stage.  Putting them in a union won't work.

Combining both is an easy solution, and given that the TCS struct only
had a single field, it's pretty inexpensive.

This patch renames the combined struct to "tess" to indicate that it's
for tessellation in general, not one of the two stages.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:21:21 -08:00
Kenneth Graunke 195bf8f027 genxml: Rename 3DSTATE_HS::Enable to "Function Enable".
"Function Enable" is what the other stages use.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 13:20:33 -08:00
Lionel Landwerlin 860d91ec5b anv: set input_slots_valid on brw_wm_prog_key
With shaders using a lot of inputs/outputs, like this (from Gtk+) :

layout(location = 0) in vec2 inPos;
layout(location = 1) in float inGradientPos;
layout(location = 2) in flat int inRepeating;
layout(location = 3) in flat int inStopCount;
layout(location = 4) in flat vec4 inClipBounds;
layout(location = 5) in flat vec4 inClipWidths;
layout(location = 6) in flat ColorStop inStops[8];

layout(location = 0) out vec4 outColor;

we're missing the programming of the input_slots_valid field leading
to an assert further down the backend code.

v2: Use valid slots of the geometry or vertex stage (Jason)

v3: Use helper to find correct vue map (Jason)

v4: Set the valid slots off the previous stages (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 18:16:45 +00:00
Lionel Landwerlin 4b44ca7225 anv: add helper to get vue map for fragment shader
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 18:14:36 +00:00
Lionel Landwerlin 59fe3796a8 anv: add get_.*_prog_data for tesselation stages
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 18:14:33 +00:00
Lionel Landwerlin 6122b4ee96 anv: make get_.*_prog_data take a const pipeline
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 18:14:09 +00:00
Vinson Lee 01d80bed1f nir: Fix anonymous union initialization with older GCC.
Fix this build error with GCC 4.4.7.

  CC     nir/nir_opt_copy_prop_vars.lo
nir/nir_opt_copy_prop_vars.c: In function ‘copy_prop_vars_block’:
nir/nir_opt_copy_prop_vars.c:765: error: unknown field ‘deref’ specified in initializer
nir/nir_opt_copy_prop_vars.c:765: warning: missing braces around initializer
nir/nir_opt_copy_prop_vars.c:765: warning: (near initialization for ‘(anonymous).<anonymous>’)
nir/nir_opt_copy_prop_vars.c:765: warning: initialization from incompatible pointer type

Fixes: 62332d139c ("nir: Add a local variable-based copy propagation pass")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 23:25:32 -08:00
Samuel Iglesias Gonsálvez 17eac30e90 docs: add Vulkan Float64 capability support for anv driver
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-10 06:42:44 +01:00
Dave Airlie ada66480b2 radv/ac: add support for multi sample image coords
This just adds the nir->llvm support, enabling
the extension causes some failures on llvm 3.9 at least,
but this code seems fine.

NIR passes the sampler in src[1].x, and we LLVM/SI requires
it as the last parameters in the coords (coord[2] for 2D,
coord[3] for 2DArray).

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-01-10 12:59:31 +10:00
Boyan Ding 41b1d9a558 glsl: Do not allow scalar types in vector relational functions
According to OpenGL Shading Language 4.50 spec, Section 8.7 "Vector
Relational Functions", functions of this type do not operate on scalar
types, so remove scalar types from signature definitions to make the
behavior consistent with glslangValidator and other drivers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
2017-01-09 17:58:33 -08:00
Thomas Hindoe Paaboel Andersen 5b4fa21d53 nir: remove duplicated foreach loop
The foreach loop was called both in the else case and right after. The
indentation seems to indicate that the extra call was from a previous
version with an else section with out curly brackets.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 17:04:47 -08:00
Kenneth Graunke 2bae2fa094 i965: Fix number of slots in SSO mode when there are no user varyings.
We want vue_map->num_slots to be one more than the final slot.

When assigning fixed slots, built-in slots, and non-SSO user varyings,
we do slot++.  This leaves "slot" as one past the most recently assigned
slot.  But for SSO user varyings, we computed slot based on the varying
location value...and left it at that slot value.

To work around this inconsistency, I made num_slots be "slot + 1" if
separate and "slot" otherwise.  The problem is...if there are no user
varyings in SSO mode...then we would have done slot++ when assigning
built-ins, so it would be off by one.  This resulted in loops from 0
to vue_map->num_slots hitting a bonus BRW_VARYING_SLOT_PAD at the end.

This used to break the SIMD8 VS/TES backends, but I fixed that in
commit 480d6c1653.  It's probably safe
at this point, but we should fix it anyway.

To fix this, do slot++ in all cases.  For SSO mode, we overwrite slot
for every varying, so this increment only matters on the last varying.
Because we process varyings in order, this will set slot to 1 more
than the highest assigned slot.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-01-09 16:52:16 -08:00
Kenneth Graunke 203c128781 spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.
vtn_ssa_value() can produce variable loads, and the cursor might
be after a return statement, causing nir_builder assert failures
about not inserting instructions after a jump.

This fixes:
dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_if
dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_switch

Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 16:52:02 -08:00
Marek Olšák 230b756f86 mesa: set GLSL 1.20 for the fixed-function fragment shader
This fixes broken depth texturing after:

commit 22639a6e19
Author: Timothy Arceri <timothy.arceri@collabora.com>
Date:   Mon Nov 21 00:29:29 2016 +1100

    st/mesa: get Version from gl_program rather than gl_shader_program

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-01-10 01:03:32 +01:00
Bas Nieuwenhuizen 8bc39e251b radv: Create single RADV_DEBUG env var.
Also changed RADV_SHOW_QUEUES to a no compute queue option. That
would make more sense later when the compute queue is established,
but the transfer queue still experimental.

v2: Don't include the trace flag.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:44:14 +01:00
Bas Nieuwenhuizen 8cb60c7dd3 ac/debug: Dump indirect buffers.
This is for handling chained command buffers and secondary command
buffers. It doesn't handle the trace id for secondary command buffers
yet, but I don't think that is possible in general with just writes,
as we could call a secondary command buffer multiple times.

I think this is good enough for now, as the most useful case is the
chaining when we grow an IB.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:44:08 +01:00
Bas Nieuwenhuizen 97dfff5410 radv: Dump command buffer on hang.
v2:
  - Now use the filename specified by RADV_TRACE_FILE env var.
  - Use the same var to enable tracing.

I thought we could as well always set the filename explicitly
instead of having some arbitrary defaults, and at that point
we don't need a separate feature enable.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:44:03 +01:00
Bas Nieuwenhuizen 0ef1b4d5b1 ac/debug: Move IB decode to common code.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:43:59 +01:00
Bas Nieuwenhuizen b838f64237 ac/debug: Move sid_tables.h generation to common code.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:43:54 +01:00
Jason Ekstrand 1c5dcecd51 relnotes: Claim OpenGL 4.5 rather than 4.4
Acked-by: Matt Turner <mattst88@gmail.com>
2017-01-09 10:55:57 -08:00
Jason Ekstrand 5b4aeb331a mesa: Bump the version to 17.0
Acked-by: Matt Turner <mattst88@gmail.com>
2017-01-09 10:55:39 -08:00
Marek Olšák cac74a9bcc radeonsi: fix the Witcher 2 black transitions
v2: do it properly

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98238

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-09 12:01:30 +01:00
Marek Olšák 5b85a6b3f7 radeonsi: set si_shader_context::input_decls for ranged decls correctly
This has no effect because no code uses those members with ranged decls.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-09 12:01:30 +01:00
Marek Olšák 6f356d15be radeonsi: cleanly communicate whether si_shader_dump should check R600_DEBUG
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-09 12:01:30 +01:00
Iago Toral Quiroga 030e5f07a5 isl: render target cube maps should be handled as 2D images, not cubes
This fixes layered rendering Vulkan CTS tests with cube (arrays). We
also do this in the GL driver, see this code from gen8_depth_state.c
for example:

case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_CUBE_MAP:
   /* The PRM claims that we should use BRW_SURFACE_CUBE for this
    * situation, but experiments show that gl_Layer doesn't work when we do
    * this.  So we use BRW_SURFACE_2D, since for rendering purposes this is
    * equivalent.
    */
   surftype = BRW_SURFACE_2D;
   depth *= 6;
   break;

So I guess we simply forgot to port this workaround to Vulkan.

v2: tweak the conditions so the special case is cube texture sampling
    rather than anything else (Jason)

Fixes:
dEQP-VK.geometry.layered.cube*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 11:43:07 +01:00
Iago Toral Quiroga 566a0c43f0 anv: don't skip the VUE header if we are reading gl_Layer in a fragment shader
This is the same we do in the GL driver: the hardware provides gl_Layer
in the VUE header, so when the fragment shader reads it we can't skip it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 11:43:07 +01:00
Samuel Iglesias Gonsálvez 0449c93638 anv: enable shaderFloat64 feature
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 10:44:07 +01:00
Samuel Iglesias Gonsálvez 465204695f anv: enable float64 feature on supported platforms
v2:
- Remove image_ms_array initialization (Jason)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 10:44:07 +01:00
Samuel Iglesias Gonsálvez 88c8121ec9 spirv: enable SpvCapabilityFloat64 only to supported platforms
v2 (Jason):
- Use nir_spirv_supported_extensions to check if the feature is enabled.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 10:44:07 +01:00
Juan A. Suarez Romero c2acf97fcc nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes
So far, input_reads was a bitmap tracking which vertex input locations
were being used.

In OpenGL, an attribute bigger than a vec4 (like a dvec3 or dvec4)
consumes just one location, any other small attribute. So we mark the
proper bit in inputs_read, and also the same bit in double_inputs_read
if the attribute is a dvec3/dvec4.

But in Vulkan, this is slightly different: a dvec3/dvec4 attribute
consumes two locations, not just one. And hence two bits would be marked
in inputs_read for the same vertex input attribute.

To avoid handling two different situations in NIR, we just choose the
latest one: in OpenGL, when creating NIR from GLSL/IR, any dvec3/dvec4
vertex input attribute is marked with two bits in the inputs_read bitmap
(and also in the double_inputs_read), and following attributes are
adjusted accordingly.

As example, if in our GLSL/IR shader we have three attributes:

layout(location = 0) vec3  attr0;
layout(location = 1) dvec4 attr1;
layout(location = 2) dvec3 attr2;

then in our NIR shader we put attr0 in location 0, attr1 in locations 1
and 2, and attr2 in location 3 and 4.

Checking carefully, basically we are using slots rather than locations
in NIR.

When emitting the vertices, we do a inverse map to know the
corresponding location for each slot.

v2 (Jason):
- use two slots from inputs_read for dvec3/dvec4 NIR from GLSL/IR.

v3 (Jason):
- Fix commit log error.
- Use ladder ifs and fix braces.
- elements_double is divisible by 2, don't need DIV_ROUND_UP().
- Use if ladder instead of a switch.
- Add comment about hardware restriction in 64bit vertex attributes.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 10:42:22 +01:00
Samuel Iglesias Gonsálvez 3551a2d3ad isl: fix VA64 support for double and dvecN vertex attributes
We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits
to avoid conversions. From the BDW PRM, Volume 2d, page 586
(VERTEX_ELEMENT_STATE):

     "When SourceElementFormat is set to one of the *64*_PASSTHRU
     formats, 64-bit components are stored in the URB without any
     conversion. In this case, vertex elements must be written as 128
     or 256 bits, with VFCOMP_STORE_0 being used to pad the output
     as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red
     component into the URB, Component 1 must be specified as
     VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE)
     in order to output a 128-bit vertex element, or Components 1-3 must
     be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
     element. Likewise, use of R64G64B64_PASSTHRU requires Component 3
     to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
     element."

v2,v3 (Jason):
- Don't delete unused formats.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Juan A. Suarez Romero 1c9483f48e anv/pipeline: get map for double input attributes
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez cc4ff6c2a0 spirv: add support for doubles to OpSpecConstant
v2 (Jason):
- Fix indent in radv change
- Add vtn_u64_literal() helper to take 64 bits (Jason)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez fc1708948b spirv/nir: add (un)packDouble2x32() translation
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez c332432bae spirv/nir: implement DF conversions
SPIR-V does not have special opcodes for DF conversions. We need to identify
them by checking the bit size of the operand and the result.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez 27cf6a369f nir: add nir_type_conversion_op()
This function returns the nir_op corresponding to the conversion between
the given nir_alu_type arguments.

This function lacks support for integer-based types with bit_size != 32
and for float16 conversion ops.

v2:
- Improve readiness of the code and delete cases that don't happen now (Jason)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez 3a571fcc43 nir: add nir_get_nir_type_for_glsl_type()
v2 (Jason):
- Refactor nir_get_nir_type_for_glsl_type() to avoid using unneeded helpers (Jason)

v3:
- Use return directly (Jason)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez 59944a77ae spirv: add support for doubles on OpComposite{Insert,Extract}
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez e6bebb9982 spirv: Enable double floating points when copying variables in _vtn_variable_copy()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez 9d71cfeff8 spirv: add double support to _vtn_block_load_store()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez 0cd0c32c06 spirv: add double support to _vtn_variable_load_store
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez 8076c8b59f spirv: add double support to SpvOpCompositeExtract
v2 (Jason):
- Add asserts.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez a966387883 spirv: fix SpvOpSpecConstantOp with SpvOpVectorShuffle working with double-based vecs
We need to pick two 32-bit values per component to perform the right shuffle operation.

v2 (Jason):
- Add assert to check matching bit sizes (Jason)
- Simplify the code to pick components (Jason)

v3:
- Switch on bit_size once (Jason)
- Add comment to explain the constant value for unused components (Erik)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Samuel Iglesias Gonsálvez ec686ff62c spirv: add DF support to SpvOp*ConstantComposite
v2 (Jason):
- Add assert.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00