Commit Graph

152839 Commits

Author SHA1 Message Date
Zack Rusin 71a749bc7b svga: Don't try to build x86/x64 assembly on different arch's
svga used to use vmx backdoor directly to send logs to the host.
This functionality has been implemented in vmwgfx 2.17, but
to make sure we still work with old kernels the functionality
to use the backdoor directly has been kept.

There's no reason to port that code to arm since vmwgfx
implements it and arm64 (or other new platforms) would
depend on vmwgfx versions a lot newer than 2.17, so everywhere
but on x86/x64 it's fine to assume vmwgfx always support the host
logging ioctls.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16061>
2022-04-26 00:33:25 +00:00
Alyssa Rosenzweig 2ca8b014d1 pan/bi: Implement pack_uvec[24]_to_uint
This maps nicely to Mali's weirdo MKVEC, so implement it rather than
scalarizing. The scalarization wants an extract implemented which we don't have.
Fixes dEQP-VK.glsl.builtin.function.pack_unpack.*

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16120>
2022-04-26 00:18:19 +00:00
Alyssa Rosenzweig 94b01ddcdd nir: Use u_worklist to back nir_block_worklist
u_worklist is nir_block_worklist, suitably generalized. All we need to do is
define the macros to translate between the APIs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16046>
2022-04-25 23:50:57 +00:00
Alyssa Rosenzweig 04a2c6efb1 util: Add a generic worklist implementation
Models a double-ended queue of elements from an a list. Based on NIR's worklist
data structure. This is useful in most backend compilers for data flow analysis.

Using this data structure has several advantages for backends:

* Simplicity, avoids open-coding a worklist data structure.
* Performance, the data structure is lighter weight than e.g sets
* Correctness, e.g. sets are nondeterministic and can cause random bugs.

Using a worklist approach at all is good for performance of liveness analysis
to avoid performing excess walks over the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16046>
2022-04-25 23:50:57 +00:00
Samuel Pitoiset 148dba95b8 radv: add an SQTT workaround for chips with disabled RBs
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16133>
2022-04-25 22:58:20 +00:00
Mike Blumenkrantz 76b2b6ebe9 vk/cache: unbreak vk_pipeline_cache_create with flags
long ago I fixed this in individual drivers

now I fix it in all drivers

Fixes: 591da98779 ("vulkan: Add a common VkPipelineCache implementation"

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16149>
2022-04-25 22:22:56 +00:00
Jason Ekstrand 1755730362 nir: Lower all bit sizes of usub_borrow
It's not clear why this is restricted to 32-bit besides that being the
only bit size where GLSL has an intrinsic for this.  All drivers that
set this probably want it lowered for all bit sizes as far as I can
tell.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6353
Fixes: 8a3e344180 ("nir/opt_algebraic: Fix some expressions with ambiguous bit sizes")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16146>
2022-04-25 21:27:09 +00:00
Vinson Lee 7898721cce panfrost: Fix memory leaks on unit test failures.
Change ASSERT_EQ to EXPECT_EQ to avoid aborting before freeing memory.

Fix defects reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable tiled going out of scope leaks the storage it points to.
leaked_storage: Variable linear going out of scope leaks the storage it points to.
leaked_storage: Variable ref going out of scope leaks the storage it points to.

Fixes: bb6c14a697 ("panfrost: Unit test u-interleaved tiling routines")
Suggested-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16127>
2022-04-25 20:18:42 +00:00
Mike Blumenkrantz f5bc062ffd vulkan: bump layer api versions to current vk header version
should probably try to keep these in sync? maybe?

cc: mesa-stable

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16138>
2022-04-25 19:56:39 +00:00
Michel Zou dbceb561b0 meson: call run_command with check=true
This avoids a warning in meson since the default value will change:
WARNING: You should add the boolean check kwarg to the run_command call.
         It currently defaults to false,
         but it will default to true in future releases of meson.
         See also: https://github.com/mesonbuild/meson/issues/9300

It's probably best to use the new default (true) that the old (false)

Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15776>
2022-04-25 18:43:50 +00:00
Eric Engestrom 1ecb440705 meson: replace deprecated dep.get_pkgconfig_variable(...) with dep.get_variable(pkgconfig : ...)
The former is deprecated since meson 0.56, while the latter is available since meson 0.51, and we currently require meson 0.53+.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16012>
2022-04-25 18:10:58 +00:00
Pavel Ondračka e01f86c67b r300: set PIPE_BIND_CONSTANT_BUFFER for const_uploader
Fixes constant uploads with nine.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5966
CC: mesa-stable
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16125>
2022-04-25 18:04:21 +00:00
Cristian Ciocaltea a5a40f24ac virgl/ci: Update checksums for some virgl iris traces
A few trace tests started to fail recently due to invalid checksums.

A visual inspection of the images didn't reveal a regression, hence
let's just update the expected checksums to match the actual values.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16141>
2022-04-25 16:50:32 +00:00
Cristian Ciocaltea 7f8a0010ce virgl/ci: Rename virgl-lava-* jobs to virgl-iris-*
Rename 'virgl-lava-*' jobs to a more descriptive 'virgl-iris-*'.

Suggested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16141>
2022-04-25 16:50:32 +00:00
Alyssa Rosenzweig 4e111c259c panvk: Lower shared memory
Copy the code. Fixes workgroup tests, now compute kernels should work properly
on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16123>
2022-04-25 16:29:31 +00:00
Alyssa Rosenzweig 179d9e3511 panvk: Handle empty shaders gracefully
Fixes dEQP-VK.spirv_assembly.instruction.compute.shader_default_output.int.uninitialized

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16123>
2022-04-25 16:29:31 +00:00
Alyssa Rosenzweig c9b33fe7dc pan/bi: Implement fquantize2f16
Implement as f2f32(f2f16(x)) with the conversions in flush-to-zero mode.
Accessing flush-to-zero mode on Bifrost is nontrivial: it is specified
per-clause, rather than per-instruction. I've opted to pipe support for ftz
clauses through the scheduler. This solution has two nice properties:

* It uses the native hardware for flushing subnormals, avoiding extra lowering.
* It's "smart" about scheduling around FTZ requirements, meaning we get good
code generated even for a shader that e.g. quantizes a vector.

With an unrelated scheduler fix, the *V2F32_TO_V2F16/+F16_TO_F32 operation fits
in a single tuple, minimizing the overhead of the special FTZ clause.

We'll have to do something a bit different for Valhall (FLUSH.f32), but we'll
worry about when we actually have PanVK brought up on Valhall.

Fixes dEQP-VK.spirv_assembly.instruction.compute.opquantize.*

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16123>
2022-04-25 16:29:31 +00:00
Alyssa Rosenzweig dfcb2f0699 panvk: Consider primitive restart in index buffer walks
Fixes:

dEQP-VK.pipeline.input_assembly.primitive_restart.index_type_uint32.line_strip

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16140>
2022-04-25 16:10:41 +00:00
Alyssa Rosenzweig 68c05c660b panvk: Respect line width
Fixes:

dEQP-VK.pipeline.input_assembly.primitive_topology.index_type_uint16.line_list

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16140>
2022-04-25 16:10:41 +00:00
Erik Faye-Lund d217fb9b0a vulkan: do not depend on alignof(void)
alignof(void) is a non-standard GCC extension, and it doesn't compile on
MSVC. But since the Windows CI has been disabled due to stability
issues, a breakage snuk in nevertheless.

Since alignof(char) works the same as alignof(void), let's pass char
instead of void here. That hides the GCC weirdness without doing any
functional changes.

Fixes: 591da98779 ("vulkan: Add a common VkPipelineCache implementation")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16134>
2022-04-25 15:34:38 +00:00
Erico Nunes d0b594a4d3 ci: put lima farm back online
There was an issue with the network router in the lab, which
should be resolved now.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16135>
2022-04-25 15:01:49 +00:00
Italo Nicola 5f6a43cde6 mesa/st: call pipe->link_shader even if ir loaded from cache when linking
Previously, if the shader was already cached, the pipe->link_shader hook
wouldn't be called, and the gallium driver wouldn't know that shaders
were being linked.

This helps VirGL, because sometimes the guest shader cache can be hit,
while the host shader cache would be missed. VirGL uses this hook to
make the host immediately link shaders, instead of lazily linking them
when a draw call happens, which can degrade performance.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15927>
2022-04-25 14:06:19 +00:00
Marek Olšák e94f89189b radeonsi/ci: add polaris11 baseline
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:16 +00:00
Marek Olšák 4a982aa542 winsys/amdgpu: fix a mutex deadlock when we fail to create pipe_screen
Fixes: 2eb067db0f - winsys/amdgpu: add a new winsys for the new kernel driver

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:16 +00:00
Marek Olšák fe4ec76115 radeonsi: fail to create pipe_screen if LLVM doesn't support the GPU
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:16 +00:00
Marek Olšák 12ab3e6853 radeonsi: remove an obsolete comment about LLVM 14
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:16 +00:00
Marek Olšák b8a6bbc6c5 ac/llvm: don't create the target machine if the LLVM processor is unsupported
If a processor is unsupported, LLVM chooses "tahiti", which hangs
everything except gfx6. Check for support manually.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:15 +00:00
Marek Olšák fc0e6fdcce ac/llvm: remove unused LLVM helpers
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:15 +00:00
Lionel Landwerlin fe413962b4 anv: skip acceleration structure in binding table emission
With mutable descriptor types, we can end up in a situation where a
binding can be, for instance, both a UBO and an acceleration
structure.

While we can promote the UBO to a binding table entry and the shader
can use it, this isn't true of acceleration structures that have no
surface state. In that case just skip the entry. The shader is already
compiled to use the descriptor entry.

In the non mutable case, the entry will not be created by
anv_nir_apply_pipeline_layout.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 63e91148b7 ("anv: Enable VK_VALVE_mutable_descriptor_type")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15969>
2022-04-25 13:19:28 +00:00
Mike Blumenkrantz ce02eeecf4 zink: fix group memory barrier emission
same as glslang

cc: mesa-stable

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16108>
2022-04-25 12:50:03 +00:00
Konstantin Seurer 4080f18163 radv: Fix lowering ignore_ray_intersection
Fixes dEQP-VK.ray_tracing_pipeline.misc.report_intersection_result

Fixes: c3d82a9 ("radv: Add pass to lower anyhit shader into an intersection shader.")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16056>
2022-04-25 12:16:46 +00:00
Lionel Landwerlin b7828f56ba anv: fix acceleration structure descriptor template writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d258b0bf0e ("anv: Add support for binding acceleration structures")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16058>
2022-04-25 11:01:56 +00:00
Lionel Landwerlin ace22edd30 anv: remove unused enum
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16058>
2022-04-25 11:01:56 +00:00
Samuel Pitoiset 51ea72e621 radv: remove redundant VK_PIPELINE_STAGE_2_TRANSFER_BIT for CP DMA idle
They are equivalent.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15943>
2022-04-25 10:40:59 +00:00
Samuel Pitoiset 591e3296cd radv: clarify why STAGE_2_CLEAR_BIT needs to wait for CP DMA to be idle
To clarify that other clear operations like vkCmdFillBuffer() are
implicitly synchronized. So, STAGE_2_CLEAR_BIT is only needed for
vkCmdUpdateBuffer() in some rare cases (GFX10+ dGPUs with GTT BOs).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15943>
2022-04-25 10:40:59 +00:00
Lionel Landwerlin 107acf5a4a intel: fixup number of threads per EU on XeHP
Computations for indexing in-memory data structures for ray queries
depend on this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4f9141607f ("intel: Add device info for DG2")
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15925>
2022-04-25 10:06:02 +00:00
Samuel Pitoiset 4ebb5391ac nir: mark XFB varyings as unmoveable to prevent them to be remapped
XFB varyings are considered as always active IO to prevent them to
be removed or compacted. Though, if the NIR linker doesn't mark XFB
varyings as unmoveable it still possible to remap other varyings to
the same location/component.

Fixes KHR-Single-GL46.enhanced_layouts.xfb_override_qualifiers_with_api
with Zink and a bunch of other dEQP XFB tests.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6301
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri  <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16092>
2022-04-25 07:56:27 +00:00
Samuel Pitoiset 26f74f17d9 nir: fix marking XFB varyings as always active IO
Components need to be handled, otherwise if a shader has two XFB
varyings at the same location, only one will be marked as always active.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri  <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16092>
2022-04-25 07:56:27 +00:00
Samuel Pitoiset 6873da0e42 aco: fix load_barycentric_at_{sample,offset} on GFX6-7
The computation was wrong.

Fixes dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.*
with Zink on GFX6 (Pitcairn).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16099>
2022-04-25 07:17:39 +00:00
Samuel Pitoiset 9662f9bcdc radv/ci: update the flakes list for GFX9 chips
Fixed since "ac/surface: fix an addrlib race condition on gfx9".

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16093>
2022-04-25 08:18:40 +02:00
Mike Blumenkrantz a6a4bf0f1e glsl/nir: set new_style_shadow for sparse tex ops as necessary
this needs the sparse result type, which is not the ir type

Fixes: f4a972b748 ("glsl/nir: convert sparse ir_texture to nir")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16097>
2022-04-24 15:56:05 +00:00
Mike Blumenkrantz 5f0ac8ac19 aux/trace: make get_sparse_texture_virtual_page_size useful
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16097>
2022-04-24 15:56:05 +00:00
Mike Blumenkrantz 272f6ede0d mesa/st: clamp GL_RENDERBUFFER to GL_TEXTURE_2D for sparse queries
this is a legal query that cts uses, so don't just abort

Fixes: b1c32a6c8c ("mesa: add ARB_sparse_texture query in glGetInternalformativ")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16097>
2022-04-24 15:56:05 +00:00
Konstantin Seurer e4a6f09d12 radv: Clean up the accel-struct build shaders
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer be57b085be radv: Build accaleration structures using LBVH
This sorts the leaf nodes along a morton curve before
creating the internal nodes. For reference:
https://developer.nvidia.com/blog/thinking-parallel-part-iii-tree-construction-gpu/

Ray query cts:
Test run totals:
  Passed:        22418/23426 (95.7%)
  Failed:        0/23426 (0.0%)
  Not supported: 1008/23426 (4.3%)
  Warnings:      0/23426 (0.0%)
  Waived:        0/23426 (0.0%)

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer 5d9ef0efb5 radv: Add the fuchsia radix sort
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer 9c020b525b radv: Format radv_acceleration_structure.c
This is the result of running clang-format on the entire file.
Although this is not related to this MR, I decided to include
the formatting changes so I do not have to deal with them if
I work on this file in the future.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer 49383fe39e radv: Make fill_buffer_shader non-static
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer 2a004866fb radv: Use VAs in radv_meta_buffer.c
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:32 +02:00
Konstantin Seurer 8cb92ce94e ci: Always install glslangValidator for build jobs
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15648>
2022-04-24 16:03:12 +02:00