Commit Graph

140682 Commits

Author SHA1 Message Date
Dave Airlie c25a5a832a intel/isl: add levels and minimum array element to null fill
gen4/5 needs these to avoid gpu hangs around matching depth/null
surfaces

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
2021-06-08 12:35:43 +10:00
Dave Airlie cb152e79f2 intel/isl: convert null surface fill to a struct.
Suggested by Jason, pre-convert this to a struct so it can
be expanded for gen4/5 crocus support

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
2021-06-08 12:35:40 +10:00
Dave Airlie 6989afea58 intel/isl: decrease isl_format_layouts size by 36k
This drops
-0000000000011e90 R isl_format_layouts
+0000000000008f48 R isl_format_layouts

I think that's about 36k.

Thanks to Jason for suggesting PACKED

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11232>
2021-06-08 11:52:25 +10:00
Yiwei Zhang 93f67055c4 venus: forward the host renderer hardware info
Some game engines rely on the real hardware info to adjust default
graphics quality and other attributes.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11175>
2021-06-07 23:54:52 +00:00
Caio Marcelo de Oliveira Filho c8a7bd0dc8 nir: Rename WORK_GROUP (and similar) to WORKGROUP
Be consistent with other usages in Vulkan and SPIR-V, and the recently
added workgroup_size field.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho a71a780598 nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho 43a6a2151b compiler: Rename SYSTEM_VALUE_LOCAL_GROUP_SIZE to SYSTEM_VALUE_WORKGROUP_SIZE
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho 430d2206da compiler: Rename local_size to workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Emma Anholt 4b9e52e818 i915g: Make sure we don't try to texture from the const file.
It's an invalid value for the texture coordinate source, and this becomes
more common if we enable nir-to-tgsi.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11227>
2021-06-07 22:24:11 +00:00
Emma Anholt 1945c1f526 ci/i915g: Fix incorrect expectation.
I think this was an edit failure on my part when fixing up the
expectations for merge.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11227>
2021-06-07 22:24:11 +00:00
Timur Kristóf 18d48c01c2 radv: Assert that there is no GS copy shader when the pipeline has NGG.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
2021-06-07 22:05:42 +00:00
Timur Kristóf 7e664a5383 radv: Don't generate GS copy shader when the pipeline has NGG.
Previously the code used radv_pipeline_has_ngg but that always
returned false because the pipeline->shaders was all NULL at the
time when the GS copy shader was created.

Fixes: ca783612e7
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
2021-06-07 22:05:42 +00:00
Timur Kristóf 93b1089d19 radv: Remove duplicate code for getting GS info.
This was my mistake for forgetting to delete this code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
2021-06-07 22:05:42 +00:00
Alejandro Piñeiro 50907105f9 v3d/simulator: get rid of has_gca wrapper
We can assume that it is always present on 3.3 and below. In fact,
recent updates of the simulator will remove it, so this change would
be needed soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11040>
2021-06-07 21:52:20 +00:00
Alejandro Piñeiro 646a8338b1 v3d/simulator: hw mem is now an v3d_size_t, typedef to uint32_t
It would be really awesome to be able to write this so it would work
with old and new versions of the simulator, but I was not able to do
that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11040>
2021-06-07 21:52:20 +00:00
Jason Ekstrand c9bbf75195 ttn: Stop manually managing system_values_read
There's no point in duplicating all the ops here.  The caller should run
nir_gather_info if they want system_values_read.  Hand-rolling it all in
tgsi_to_nir is just asking for bugs.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11222>
2021-06-07 21:04:35 +00:00
Andres Gomez 996a6564cf ci: update some radv trace checksums
After 7d23ea20a0 ("radv: don't allocate DCC predicate if the image doesn't use DCC")
some checksums for the radv driver remained to be updated.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11223>
2021-06-07 20:45:55 +00:00
Rob Clark da4bd551a3 frontend/dri: Fix fence-fd logic
We can't ask for a fence fd if we don't pass PIPE_FLUSH_FENCE_FD.  Also
don't leak fences.

Fixes: abec42c9a3 ("gallium/dri: implement EGL_KHR_mutable_render_buffer")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
2021-06-07 20:14:25 +00:00
Rob Clark 964efdfba9 egl+libsync: Add check for valid fence-fd
Debugging fd mix-ups (ie. where, possibly via close()ing the original
fd, etc, you end up with something that is a valid fd but not a valid
*fence* fd) can be difficult.  Fortunately we can use the FILE_INFO
ioctl, which will return an error if the fd is not a fence fd.

For android, we instead use the libsync API, which does a similar thing
on modern kernels, but has a fallback path for older android kernels.

Note that the FILE_INFO ioctl has existed upstream since at least prior
to destaging of sync_file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
2021-06-07 20:14:25 +00:00
Rob Clark bfeff2c687 egl: zero is a valid fd
We shouldn't be using RETURN_EGL_EVAL() for eglDupNativeFenceFDANDROID()
return, as (while perhaps unlikely) zero is a valid fd.  The error case
for EGL_NO_NATIVE_FENCE_FD_ANDROID is already handled in egl_dri2.c
(dri2_dup_native_fence_fd()) so just use RETURN_EGL_SUCCESS() instead.

Also fix ret type.

Fixes: 0201f01dc4 ("egl: add EGL_ANDROID_native_fence_sync")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
2021-06-07 20:14:25 +00:00
Kenneth Graunke a588cda75a iris: Add a BO_ALLOC_SMEM flag for allocating from system memory
Most allocations will want to be in device local memory (if it exists),
so we default to LMEM in the absence of a flag.  However, some buffers
are expected to be read/written from the CPU multiple times, and we may
want to explicitly place those buffers in system memory.

This patch adds the infrastructure for deciding on the allocation,
and sets the flags, but does not actually hook up the flag to do
anything, as the kernel infrastructure for LMEM support hasn't landed.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke ab49063f44 iris: Only use SET/GET_TILING when exporting/importing BOs
In the past, we tracked bo->tiling_mode and bo->stride, and used
GEM_{GET,SET}_TILING on all buffers we allocated.  This made more sense
in the old days (long before iris even existed) when we used GTT maps to
detile resources.  However, that support is now gone, and we never used
it in iris anyway.  We don't need to do this in most cases anymore.

We are trying to deprecate these kernel APIs.  They have many issues.
One is having a global tiling mode for a buffer when userspace may
want to suballocate multiple resources with different tiling modes
from the same object.  Another is...what if processes want to interpret
the data differently, and hot-swap the tiling mode out from under
another process?  Another is the fundamental race conditions.  There
are many reasons not to use these APIs.

Unfortunately, there is still one case where it's used: when importing
and exporting DMABUFs, we have to communicate the tiling somehow.  The
right way to do that is using modifiers, but those didn't always exist,
and aren't always enabled (maybe aren't even commonly enabled).  So we
use GET/SET_TILING as a poor-man's IPC mechanism of sorts.

This patch stops calling those APIs in general but continues doing so
for imported/exported objects when we don't have modifiers.

We eliminate iris_bo_alloc_tiled entirely.  There is now only one!

One small behavioral change snuck in: iris_memobj_create_from_handle
now aligns the virtual address to 64K rather than 1B when modifiers
aren't present.  This should be harmless, and lets us delete a whole
bunch of code.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke 32c5d6d1dc iris: Add an alignment parameter to iris_bo_alloc()
This is rarely useful, but after the next patch removes tiling tracking,
this would literally be the only difference between iris_bo_alloc and
iris_bo_alloc_tiled, so we may as well add it.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke 539494e767 iris: Add a flags argument to iris_bo_alloc()
Based on a patch by Rafael Antognolli.

We already had a flags parameter, but omitted it from the simple alloc
interface because most callers were passing 0.  However, we'll want to
use it for selecting between device local memory and system memory, and
possibly mmap cacheability modes, in the future.  At that point, many
more callers will want to specify, so I think we should include flags
in iris_bo_alloc() as well.

A few places used the iris_bo_alloc_tiled() function simply to pass
flags, so this patch converts them to use iris_bo_alloc() instead now
it does everything they want.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Jason Ekstrand 9e0fd49858 intel/fs/ra: Fix payload node setup for SIMD16 on Gen4-5
Since 40e1d798c6, we are now using physical register numbers for
everything which makes it all simpler.  In particular, we no longer need
the special case for setting up the payload for SIMD16 on Gen4-5.  This
fixes a pile of piglit tests on ILK and similar.

Fixes: 40e1d798c6 "intel/fs: Use ra_alloc_contig_reg_class()..."
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11221>
2021-06-07 16:52:19 +00:00
Roman Stratiienko 8621bd8d5e android: Add scripts to build using meson
How to use:
- For GALLIUM drivers:
1. Add gallium drivers into your board.mk file:
board.mk:
    BOARD_MESA3D_USES_MESON_BUILD := true
    BOARD_MESA3D_GALLIUM_DRIVERS := lima panfrost v3d

2. Add the following packages into your device.mk file:
device.mk:
    PRODUCT_PACKAGES += \
        libEGL_mesa \
        libGLESv1_CM_mesa \
        libGLESv2_mesa \
        libgallium_dri \
        libglapi

- For VULKAN drivers:
1. Add single vulkan driver into your board.mk file:
board.mk:
    BOARD_MESA3D_USES_MESON_BUILD := true
    BOARD_MESA3D_VULKAN_DRIVERS := freedreno broadcom

2. Add the following package configuration into your device.mk file:
device.mk:
    PRODUCT_PACKAGES += \
       vulkan.freedreno
    PRODUCT_PROPERTY_OVERRIDES += \
       ro.hardware.vulkan=freedreno

- To build 'libgbm' set definition in the board.mk:
    BOARD_MESA3D_BUILD_LIBGBM := true
  And add a package to the device.mk:
    PRODUCT_PACKAGES += libgbm

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10183>
2021-06-07 16:04:15 +00:00
Roman Stratiienko 016e932cda meson: egl: Do not build platform_drm for Android
'platform_android' wasn't designed to coexist with 'platform_drm' within
single build, therefore a lot of conflicts appears during compile-time.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10183>
2021-06-07 16:04:15 +00:00
Erik Faye-Lund 45814b58c1 docs: update master -> main in edit-links
Since the move from master to main, our "Edit on GitLab" links on
docs.mesa3d.org has been pointing to the wrong branch.

Let's fix this, so we don't confuse users who want to contribute
changes.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11160>
2021-06-07 14:45:39 +00:00
Erik Faye-Lund eea4c98f6d st/pbo: use correct type for images and textures
Not all hardware can treat float, uint and sint samplers and images the
same way, so we need to respect the format-types here.

This has the added benefit of making sure sint and uint data doesn't
get copied through a float, which might mess with signaling nan
encodings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11164>
2021-06-07 12:13:32 +00:00
Erik Faye-Lund baf4b05aad zink: use a macro for spir-v versions
Instead of repeating constants over and over, let's use a macro for the
SPIR-V version definition instead.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund 263ec2fd2a zink: only enable vote if we can support it
We can only support subgroup vote if we have support for SPIR-V 1.3 or
later.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund 990ed280d0 zink: calculate spir-v version based on vk version
This moves the previous check up to the screen-creation, making it
possible to enable features based on the SPIR-V version.

The reason we want to be able to do this, is so we can force specific
SPIR-V versions, in order to work around bugs in tools.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund cae50a52e2 zink: allow to specify any spir-v version to nir_to_spirv
This will hopefully helps making it easier to override the SPIR-V
version we emit, in case some drivers or tools have issues with too
recent SPIR-V versions.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund fb83477a58 zink: rename spirv_15 bool to spirv_1_4_interfaces
To make it a bit easier to follow what's going on here, rename the
"spirv_15" boolean to "spirv_1_4_interfaces", and add a comment about
what it's all about.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund 28c842e4b7 zink: limit images we mark as cube-compatible
The Vulkan spec says the following:

> If imageType is VK_IMAGE_TYPE_2D and flags contains
> VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT, extent.width and extent.height
> must be equal and arrayLayers must be greater than or equal to 6

This makes a lot of sense, as these are also requirements for being able
to create cubemaps from them in the first place.

Let's thread a bit more careful, and only set this bit in these cases.
This matters in the new case of setting this flag on 2D array textures.
In the other cases, this should already be the case.

I haven't seen this trigger any issues, I just realized this while
reading the Vulkan-spec.

Fixes: 1887ff2ebb ("zink: mark 2d-arrays as cube-compatible")
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11081>
2021-06-07 11:47:17 +00:00
Iago Toral Quiroga 6f504b5fc6 v3dv: fix incorrect render area setup
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4875
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11158>
2021-06-07 11:25:22 +00:00
Iago Toral Quiroga 4886773fc0 v3dv: implement VK_KHR_descriptor_update_template
Relevant tests:
dEQP-VK.binding_model.*.with_template.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11213>
2021-06-07 11:10:49 +00:00
Iago Toral Quiroga a48cb7534d v3dv: refactor descriptor updates
Make helper functions for all descriptor types and have them handle
all of the descriptor update so we can reuse them later to implement
template updates.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11213>
2021-06-07 11:10:49 +00:00
Tony Wasserka 3c390e2eb6 aco/scheduler: Move cursor handling state to dedicated interfaces
This clarifies the semantics of the index variables compared to the previous
version, which used the same variables in a slightly different way depending
on whether they were used for downwards moves or upwards ones.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10885>
2021-06-07 12:09:39 +02:00
Tony Wasserka 81761a311e aco/scheduler: Clean up register demand tracking
Refactoring total_demand and total_demand_clause to cover non-overlapping
instruction intervals makes the code easier to follow and allows the register
demand to be updated more efficiently in some cases.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10885>
2021-06-07 12:09:39 +02:00
Marcin Ślusarz 2ebf4e984b intel/disasm: remove useless space after "("
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11070>
2021-06-07 08:46:11 +00:00
Marcin Ślusarz daba2894ff intel/disasm: decode/describe more send messages
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11070>
2021-06-07 08:46:11 +00:00
Pierre-Eric Pelloux-Prayer a57e90bfea winsys/amdgpu: use int16 for buffer_indices_hashlist
int16 allows to correctly store the indices of 32k buffers; this
seems sufficient and is twice smaller than regular int.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>
2021-06-07 07:38:35 +00:00
Pierre-Eric Pelloux-Prayer a981105d90 winsys/amdgpu: reduce amdgpu_cs size
buffer_indices_hashlist is only used by the current
amdgpu_cs_context (= amdgpu_cs.csc).

So store a single 16k int array instead of 2, and switch
the owner when flushing the cs.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>
2021-06-07 07:38:35 +00:00
Pierre-Eric Pelloux-Prayer 74c67f2b72 amdgpu/winsys: remove amdgpu_cs_has_chaining
Store this property in admgpu_cs instead of using a function.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>
2021-06-07 07:38:35 +00:00
Pierre-Eric Pelloux-Prayer 1bd64d8cfb winsys/amdgpu: don't read bo->u.slab.entry after pb_slab_free
Otherwise the pb_slabs might be freed by another thread in between.

Valgrind example:

==676841== Invalid read of size 1
==676841==    at 0x6B0A8B3: get_slab_wasted_size (amdgpu_bo.c:659)
==676841==    by 0x6B0AD7D: amdgpu_bo_slab_destroy (amdgpu_bo.c:684)
==676841==    by 0x6ACF94F: pb_destroy (pb_buffer.h:259)
==676841==    by 0x6ACF94F: pb_reference_with_winsys (pb_buffer.h:282)
==676841==    by 0x6ACF94F: radeon_bo_reference (radeon_winsys.h:754)
==676841==    by 0x6ACF94F: si_replace_buffer_storage (si_buffer.c:274)
==676841==    by 0x6957036: tc_call_replace_buffer_storage (u_threaded_context.c:1554)
                            [...]
==676841==    by 0x4ECCDEE: clone (clone.S:95)
==676841==  Address 0x27879945 is 5 bytes inside a block of size 208 free'd
==676841==    at 0x48399AB: free (vg_replace_malloc.c:538)
==676841==    by 0x6B0E8BD: amdgpu_bo_slab_free (amdgpu_bo.c:863)
==676841==    by 0x6B89D4A: pb_slabs_reclaim_locked (pb_slab.c:84)
==676841==    by 0x6B89D4A: pb_slab_alloc (pb_slab.c:130)
==676841==    by 0x6B0EE7F: amdgpu_bo_create (amdgpu_bo.c:1429)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4736
Fixes: 965c6445ad ("winsys/amdgpu,radeonsi: add HUD counters for how much memory is wasted by slabs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11010>
2021-06-07 07:38:35 +00:00
Pierre-Eric Pelloux-Prayer cd9be8741f radeonsi: dirty msaa_config on rs->multisample_enable change
si_emit_msaa_config uses si_get_num_coverage_samples, and
si_get_num_coverage_samples depends on old_rs->multisample_enable.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4613
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11182>
2021-06-07 09:21:45 +02:00
Iago Toral Quiroga 017a150984 v3dv: expose VK_KHR_storage_buffer_storage_class
This extension is basically only wrapping SPV_KHR_storage_buffer_storage_class
which is entirely implemented in the SPIR-V frontend.

Relevant CTS tests:
dEQP-VK.glsl.opaque_type_indexing.ssbo_storage_buffer_decoration.*
dEQP-VK.spirv_assembly.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11184>
2021-06-07 06:09:01 +00:00
Iago Toral Quiroga 71b2ae66c2 v3dv: document VK_KHR_relaxed_block_layout as implemented
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11184>
2021-06-07 06:09:01 +00:00
Steve Pronovost 29e3a11d78 d3d12: Add mechanism for D3D12 Adapter Selection
This add a simple mechanism to select which GPU adapter the d3d12
driver should be using. A new environment variable is introduced.

MESA_D3D12_DEFAULT_ADAPTER_NAME

This represent a substring to search for in the GPU descrition,
for example "NVIDIA" or "INTEL", or "NVIDIA GeForce RTX 3090",
etc...

GPU are searched in order and the first one to include the substring
becomes a match. If no match is found, we default to the first
enumerated GPU.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10710>
2021-06-07 02:22:34 +00:00