354474b9e5
mesa/st: consider NumUniformBlocks instead of num_ubos when binding
...
This is the number of uniform blocks at linking time, not after
finalizing shaders.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4734 >
2020-05-05 09:17:51 +00:00
8471f7a5fa
compiler/glsl: explicitly store NumUniformBlocks
...
It's not great to use shader_info for this information, because it
might have gone through lowering of uniforms to UBOs, which can change
the number of UBOs. So let's make sure we know the size of the
UniformBlocks array from when the shader was linked instead.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4734 >
2020-05-05 09:17:51 +00:00
8059f206da
glsl: rename has_implicit_uint_to_int_conversion to *_int_to_uint_*
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There is no uint to int implicit conversion in glsl, this is just
a typo in the name of this function. The correct one would be:
has_implicit_int_to_uint_conversion.
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4884 >
2020-05-05 08:18:14 +00:00
403eb507f5
driconf: add force_integer_tex_nearest option
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And enable it for "GRID Autosport" and "DIRT: Showdown" games.
CC: 20.1 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1258
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4647 >
2020-05-05 09:40:29 +02:00
12fb7d7008
mesa: add gl_coontext::ForceIntegerTexNearest
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Some applications incorrectly use GL_LINEAR* values for integers texture.
copyimage.c already implemented a tolerance for such app in prepare_target_err.
This commit adds a boolean that will treat GL_LINEAR* filters as
GL_NEAREST for integer textures.
CC: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4647 >
2020-05-05 09:40:29 +02:00
90d9f9a37e
aco: remove unecessary p_split_vector with v2b reg class
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Should be fine now that RA take full registers for v2b if it's
not an SDWA instruction.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4879 >
2020-05-05 08:50:10 +02:00
Joshua Ashton
b0cb38f360
vulkan: Update Vulkan XML and headers to 1.2.140
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Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878 >
2020-05-05 00:28:00 +00:00
Joshua Ashton
785803a2e5
turnip: Remove RANGE_SIZE usage
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These were removed from the latest Vulkan headers
https://github.com/KhronosGroup/Vulkan-Docs/issues/1230
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878 >
2020-05-05 00:28:00 +00:00
Joshua Ashton
24f9aea770
radv: Remove RANGE_SIZE usage
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These were removed from the latest Vulkan headers
https://github.com/KhronosGroup/Vulkan-Docs/issues/1230
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878 >
2020-05-05 00:28:00 +00:00
Joshua Ashton
c4d11ea3c4
anv: Remove RANGE_SIZE usage
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These were removed from the latest Vulkan headers
https://github.com/KhronosGroup/Vulkan-Docs/issues/1230
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4878 >
2020-05-05 00:27:59 +00:00
5779694698
android: iris: add iris_seqno.{c,h} to Makefile.sources
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Fixes the following undefined symbol building errors:
ld.lld: error: undefined symbol: iris_seqno_init
>>> referenced by iris_batch.c:187 (external/mesa/src/gallium/drivers/iris/iris_batch.c:187)
>>> iris_batch.o:(iris_init_batch) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_iris_intermediates/libmesa_pipe_iris.a
Fixes: e31b703c
2020-05-04 22:33:04 +02:00
c4cdef64ad
ac/surface: fix MSAA crash with FORCE_SWIZZLE_MODE on gfx9
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Fixes: 3dc2ccc14cCloses : #2884
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4862 >
2020-05-04 20:03:15 +00:00
1dcf291e3b
pan/bit: Add IMATH packing tests
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
8fcc23bf28
pan/bit: Factor out identity swizzle helper
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
36e4ffa382
pan/bit: Use swizzle helper for round
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
118d53bf93
pan/bit: Remove test names
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We already have the disasm which is authoritative.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
52cdaaacbb
pan/bit: Interpret v4i8 ops
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
66163614db
pan/bit: Interpret IMATH
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
1799435df0
pan/bi: Don't schedule <32-bit IMATH to FMA
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The ops don't exist.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
2925e88996
pan/bi: Add SUB.v2i16/SUB.v4i8 opcodes to disasm
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Like their ADD counterparts. Only on ADD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
10c18c6f69
pan/bi: Pack ADD IADD/ISUB for 8/16/32
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
a463b2c2ed
pan/bi: Pack FMA IADD/ISUB 32
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
cf3c3563e0
pan/bi: Use IMATH for nir_op_iadd
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
1a94daef58
pan/bi: Rename BI_ISUB to BI_IMATH
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We'll use this for iadd, etc too which share similar characteristics.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890 >
2020-05-04 18:45:15 +00:00
5c81f51c3c
freedreno/ir3: Define the bindful uniform/nonuniform desc modes for cat6 a6xx.
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These come from the disasm tests, and fix our disasm of blob's
uniform/nonuniform cat6 operands. We also now include human-readable names
for all the modes we know about (though bindless gets distinguished by its
.baseN, like Connor's original disasm).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857 >
2020-05-04 11:15:50 -07:00
97b21110b8
freedreno/ir3: Sync some new changes from envytools.
...
With this I also brought in a few new control flow instruction disasm
tests that I'd made back when I wrote the disasm test, but which were too
far from correct to include until now.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857 >
2020-05-04 11:14:46 -07:00
1e5b0c92c5
freedreno/ir3: Add some more tests of cat6 disasm.
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I put these together from traces I had while trying to do LDC for GL.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4857 >
2020-05-04 11:14:46 -07:00
b97cc41aa2
Revert "ac: reassociate FP expressions for inexact instructions for radeonsi"
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This reverts commit cf2f3c2753cf2f3c2753https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4837 >
2020-05-04 11:51:37 -04:00
5f01869f74
pan/bit: Add ICMP tests
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
9bc684cad8
pan/bit: Add more 16-bit fmod tests
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Swizzles and more abs.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
041ba62e87
pan/bit: Add swizzles to round tests
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
35c806e701
pan/bi: Don't pack ICMP on FMA
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
5cbdf29b7e
pan/bi: Pack ADD ICMP 16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
5bd4172280
pan/bi: Pack ADD ICMP 32
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
336d5128f9
pan/bi: Structify ADD ICMP 16
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
fdf154d24a
pan/bi: Pack ADD.DISCARD
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
7a9b9859e7
pan/bi: Handle discard/branch in get_component_count
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No dest requires special handling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:16 -04:00
8ab5c97895
pan/bi: Fuse conditions into discard_if
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
201a11a13a
pan/bi: Add float-only mode to condition fusing
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Useful for discards.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
7d867f787f
pan/bi: Emit discard (not if)
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
c9ab73296c
pan/bi: Handle discard_if in NIR->BIR naively
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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
6627b20de3
pan/bi: Unwrap BRANCH into CONDITIONAL class
...
We can simplify the IR considerably and unify more conditions, which
gives conditional discard for free.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
6e5d207293
pan/bi: Remove BI_GENERIC
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Goofy.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
20cb039457
pan/bi: Structify DISCARD
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
5c03340fd1
pan/bi: Fix DISCARD ops in disasm
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
31a41bb6a6
pan/bi: Disable CSEL4 emit for now
...
We need proper scheduling for 4-src ops to work, so for now disable
condition fusing so we cap at 3-src at a performance penalty. A bit of a
hack but I'd rather not build hacks into a scheduler that will be
rewritten soon anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
e14e3065a9
pan/bi: Fix incorrectly flipped swizzle
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
8415b3d552
pan/bi: Fix missing swizzle
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
c9634894a6
pan/bi: Fix double-abs flipping
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
ef9b4b3a0b
pan/bi: Set clause type for gl_FragCoord.z
...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4883 >
2020-05-04 11:08:15 -04:00
Erik Faye-Lund
Danylo Piliaiev
Pierre-Eric Pelloux-Prayer
Samuel Pitoiset
Joshua Ashton
Mauro Rossi
Marek Olšák
Alyssa Rosenzweig
Eric Anholt