Commit Graph

69 Commits

Author SHA1 Message Date
Marek Olšák b419c651fb gallium/pb_bufmgr_cache: limit the size of cache
This should make a machine which is running piglit more responsive at times.
e.g. streaming-texture-leak can easily eat 600 MB because of how fast it
creates new textures.
2014-09-01 20:17:48 +02:00
Andreas Boll 36771dc60f winsys/radeon: fix nop packet padding for hawaii
The initial firmware for hawaii does not support type3 nop packet.
Detect the new hawaii firmware with query RADEON_INFO_ACCEL_WORKING2.
If the returned value is 3, then the new firmware is used.

This patch uses type2 for the old firmware and type3 for the new firmware.

It fixes the cases when the old firmware is used and the user wants to
manually enable acceleration.
The two possible scenarios are:
 - the kernel has no support for the new firmware.
 - the kernel has support for the new firmware but only the old firmware
   is available.

Additionaly this patch disables GPU acceleration on hawaii if the kernel
returns a value < 2. In this case the kernel hasn't the required fixes
for proper acceleration.

v2:
 - Fix indentation
 - Use private struct radeon_drm_winsys instead of public struct radeon_info
 - Rename r600_accel_working2 to accel_working2

v3:
 - Use type2 nop packet for returned value < 3

v4:
 - Fail to initialize winsys for returned value < 2

Cc: mesa-stable@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Jérôme Glisse <jglisse@redhat.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-12 12:16:06 -04:00
Marek Olšák 0e229b8c5a radeonsi: always prefer SWITCH_ON_EOP(0) on CIK
The code is rewritten to take known constraints into account, while always
using 0 by default.

This should improve performance for multi-SE parts in theory.

A debug option is also added for easier debugging. (If there are hangs,
use the option. If the hangs go away, you have found the problem.)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

v2: fix a typo, set max_se for evergreen GPUs according to the kernel driver
2014-08-09 23:41:15 +02:00
Michel Dänzer 07c65b85ea r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-07-23 18:55:50 +09:00
Michel Dänzer 37d43ebb28 winsys/radeon: Use separate caching buffer managers for VRAM and GTT
Should reduce overhead because the caching buffer manager doesn't need to
consider buffers of the wrong type.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-07-23 15:43:04 +09:00
Tom Stellard 81385f7596 winsys/radeon: Query the kernel for the number of SEs and SHs per SE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-07-21 10:00:09 -04:00
Bruno Jiménez 03aab2af16 radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS
v2:
    Add RADEON_INFO_ACTIVE_CU_COUNT as a define, as suggested by
    Tom Stellard

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-06-13 10:59:30 -04:00
Samuel Li aad669b1e9 radeonsi: add support for Mullins asics.
v2: name defaults to kabini for older llvm
v3: fix llvm version check

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-05-02 17:30:27 -04:00
Tom Stellard 0a41054b7f radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
Igor Gnatenko:
  v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)

Bruno Jiménez:
  v3: Convert the frequency to MHz from kHz after getting it in
  'do_winsys_init'

Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-04-29 15:25:50 -07:00
Marek Olšák 6dd045ef40 r600g: disable async DMA on R700
Cc: 10.0 10.1 mesa-stable@lists.freedesktop.org
2014-04-25 01:33:12 +02:00
Marek Olšák 3b0b44f7de winsys/radeon: fix a race condition in initialization of radeon_winsys::screen
Create the screen in the winsys while the mutex is locked.
This also results in a nice code cleanup!

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10 20:50:17 +02:00
Marek Olšák ac330d4130 winsys/radeon: fix a race condition between winsys_create and winsys_destroy
This also hides the reference count from drivers.

v2: update the reference count while the mutex is locked in winsys_create

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10 20:50:17 +02:00
Marek Olšák 7c57b01564 winsys/radeon: fix a race condition between 2 calls to radeon_winsys_create
This fixes random crashes of: piglit/glx-multithread-shader-compile.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10 20:50:17 +02:00
Marek Olšák b5ebfc33b8 winsys/radeon: remove unused radeon_info variables, move backend_map
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10 20:50:17 +02:00
Marek Olšák 34564c8753 winsys/radeon: remove definitions already present in radeon_drm.h
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-10 20:50:17 +02:00
Marek Olšák fb5cf3490e r600g,radeonsi: add a bunch of useful queries for the HUD 2014-04-09 01:45:16 +02:00
Brian Paul e4a5a9fd2f gallium/pipebuffer: change pb_cache_manager_create() size_factor to float
Requested by Marek.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
2014-02-14 09:56:55 -07:00
Thomas Hellstrom 8af358d8bc gallium/pipebuffer: Add a cache buffer manager bypass mask
In some situations, it may be desirable to bypass the cache at buffer
creation but to insert the buffer in the cache at buffer destruction.
One such situation is where we already have a kernel representation of a
buffer that we want to use, but we also want to insert it in the cache when
it's freed up.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
2014-02-14 08:21:44 -07:00
Thomas Hellstrom c9e9b1862b pipebuffer, winsys: Add a size match parameter to the cached buffer manager
In some situations it's important to restrict the sizes of buffers that the
cached buffer manager is allowed to return

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
2014-02-14 08:21:44 -07:00
Christian König cbdd052577 radeon/winsys: add VCE support v4
v2: add fw version query
v3: add README.VCE
v4: avoid error msg when kernel doesn't support it

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-13 11:11:24 +01:00
José Fonseca fd33a6bcd7 gallium: Use C11 thread abstractions.
Note that PIPE_ROUTINE now returns an int.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2014-01-23 12:55:55 +00:00
Marek Olšák 346b6abab9 radeonsi: calculate NUM_BANKS for DB correctly on CIK
NUM_BANKS is not constant on CIK.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-06 18:40:42 +01:00
Marek Olšák bf3c361113 radeonsi: set correct pipe config for Hawaii in DB
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-01-06 18:40:42 +01:00
Alex Deucher f5778f152b radeonsi: add support for Hawaii asics (v2)
Update additional register fields.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15 08:51:09 -05:00
Christian König 3d3a0b9b67 winsys/radeon: make radeon_drm_winsys_create public
Otherwise OpenGL/VDPAU interop won't work as expected.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-10-26 12:13:36 +02:00
Christian König 21a57f9040 winsys/radeon: cleanup CS offloading
Using atomic function for ncs is superfluous since it is
protected by a mutex anyway. Also lock the mutex only once
while retrieving the next CS for submission.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-10-21 10:20:18 +02:00
Christian König 4871128e58 radeon/winsys: keep screen pointer in winsys v2
Only create one screen for each winsys instance.
This helps with buffer sharing and interop handling.

v2: rebased and some minor cleanup

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-25 19:41:31 +02:00
Christian König 01a0dbcb96 winsys/radeon: share winsys between different fd's
Share the winsys between different fd's if they point to the same device.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-22 10:33:20 +02:00
Christian König 0653c66ef4 winsys/radeon: remove cs_queue_empty
Waiting for an empty queue is nonsense and can lead to deadlocks if we have
multiple waiters or another thread that continuously sends down new commands.

Just post the cs to the queue and immediately wait for it to finish.

This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-22 10:33:20 +02:00
Christian König f7ccb84aa1 winsys/radeon: fix killing the CS thread
Kill the thread only after we checked that it's not used any more, not before.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-09-22 10:33:20 +02:00
Alex Deucher c88783047e r600g: disable GPUVM by default
Cayman and trinity systems still seem to suffer from
stability problems with GPUVM.  This also fixes compute
on these asics.  It can still be enabled for testing
by setting env var RADEON_VA=true.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=65958

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
CC: "9.2" <mesa-stable@lists.freedesktop.org>
CC: "9.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-08-09 10:51:25 -04:00
Alex Deucher f29f206c93 radeonsi: initial support for CIK chips
Add the infrastructure to differentiate them.
Just treat them like SI for now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28 15:15:28 -04:00
Alex Deucher 5b3f1ea933 radeonsi: rename SI chip class from TAHITI to SI
Covers the entire family.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-28 15:15:20 -04:00
Alex Deucher 761320b197 winsys/radeon: add env var to disable VM on Cayman/Trinity
Set env var RADEON_VA=0 to disable VM on Cayman/Trinity.
Useful for debugging.

Note: this is a candidate for the 9.1 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-06-10 18:02:57 -04:00
Alex Deucher 4045c3d060 radeonsi: add support for hainan chips
Note: this is a candidate for the 9.1 branch

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-05-14 10:51:10 -04:00
Jerome Glisse abb96fdea7 winsys/radeon: consolidate tracing into winsys v2
This move the tracing timeout and printing into winsys and add
an debug environement variable for it (R600_DEBUG=trace_cs).

Lot of file touched because of winsys API changes.

v2: Do not write lockup file if ib uniq id does not match last one

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-04-25 18:36:31 -04:00
Marek Olšák 817723baf8 winsys/radeon: use query_value for timestamp, remove query_timestamp 2013-04-16 13:56:47 +02:00
Marek Olšák 05fa3595e0 r600g: add a query returning the amount of time spent during bo_map sync. 2013-04-16 13:56:47 +02:00
Christian König f91e4d2c9d radeon/winsys: add uvd ring support to winsys v3
Separated from UVD patch for clarity.

v2: sync with next tree for 3.10
v3: as pointed out by Andreas Bool check for drm minor >= 32

http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
2013-04-11 17:10:01 +02:00
Marek Olšák 8ddae684af r600g: add a driver query returning the amount of requested VRAM and GTT memory 2013-03-26 01:28:19 +01:00
Alex Deucher 83e4407f44 radeonsi: add support for Oland chips
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Note: this is a candidate for the 9.1 branch
2013-02-04 15:43:21 -05:00
Jerome Glisse 6c064fd749 radeon/winsys: add dma ring support to winsys v3
Add ring support, you can create a cs for each ring. DMA ring is
bit special regarding relocation as you must emit as much relocation
as there is use of the buffer.

v2: - Improved comment on relocation changes
    - Use a single thread to queue cs submittion this simplify driver
      code while not impacting performances. Rational for this is that
      you have to wait for all previous submission to have completed
      so there was never a case while we could have 2 different thread
      submitting a command stream at the same time. This code just
      consolidate submission into one single thread per winsys.
v3: - Do not use semaphore for empty queue signaling, instead use
      cond var. This is because it's tricky to maintain an even number
      of call to semaphore wait and semaphore signal (the number of
      cs in the stack would for instance make that number vary).

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-01-28 11:30:35 -05:00
Marek Olšák 3f584c211a r300g: random hyperz cleanups 2013-01-14 03:11:42 +01:00
Jerome Glisse ca474f98f2 radeon/winsys: move radeon family/class identification to winsys
Upcoming async dma support rely on winsys knowing about GPU families.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-01-07 11:06:07 -05:00
Marek Olšák 12dcbd5954 r300g: enable Hyper-Z by default on r500
I fixed the only known bugs on r500 with 0222b2bd41.
Now there are no piglit regressions with Hyper-Z and all apps I tested seem
to work.

To summarize how it works:
- Only one process can use it at a time. This is a hardware limitation.
- The first process to clear a zbuffer gets the exclusive access to use
  Hyper-Z.
- Compositors don't use any zbuffer, so they won't steal it, but some web
  browsers do, so make sure there's no web browser running if you want your
  game to use Hyper-Z.
- There's no need to restart an app which couldn't get the access to Hyper-Z.
  Just quit the app which took it, the driver can turn it on for the other app
  in the middle of rendering.
- If an app gets the access to Hyper-Z, it prints "radeon: Acquired Hyper-Z"
  to stdout.

r300-r400:
  Hyper-Z will be enabled by default on r300-r400 once sufficient testing is
  done with piglit and Lightsmark at least.
  Be sure to set the env var RADEON_HYPERZ and run piglit with parameters: -c 0
2012-12-02 18:07:26 +01:00
Christian König 73dd82061e winsys/radeon: create only one winsys for each fd
Fixing problems with GLAMOR.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-09-04 10:51:38 +02:00
Marek Olšák 44f14ebd7b r600g: implement timestamp query and get_timestamp hook
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-15 19:20:58 +02:00
Marek Olšák 2f14202f52 configure.ac: bump libdrm_radeon requirement to 2.6.38 2012-08-15 19:20:57 +02:00
Marek Olšák 6e7756db14 r600g: enable streamout by default on r7xx and DRM 2.17.0
Now that it's in Linus's tree.

Has anyone had a chance to test streamout on Cayman recently?
2012-06-17 18:28:32 +02:00
Michel Dänzer 88a2e2388b radeonsi: Initial tiling support.
Largely based on the corresponding Evergreen support in r600g.
2012-05-16 18:30:50 +02:00