radeon/winsys: add VCE support v4
v2: add fw version query v3: add README.VCE v4: avoid error msg when kernel doesn't support it Signed-off-by: Christian König <christian.koenig@amd.com>
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The software may implement third party technologies (e.g. third party
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libraries) that are not licensed to you by AMD and for which you may need
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to obtain licenses from other parties. Unless explicitly stated otherwise,
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these third party technologies are not licensed hereunder. Such third
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party technologies include, but are not limited, to H.264, MPEG-2, MPEG-4,
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AVC, and VC-1.
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For MPEG-2 Intermediate Products: ANY USE OF THIS PRODUCT IN ANY MANNER OTHER
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THAN PERSONAL USE THAT COMPLIES WITH THE MPEG-2 STANDARD IS EXPRESSLY
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PROHIBITED WITHOUT A LICENSE UNDER APPLICABLE PATENTS IN THE MPEG-2 PATENT
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PORTFOLIO, WHICH LICENSES IS AVAILABLE FROM MPEG LA, LLC, 6312 S. Fiddlers
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Green Circle, Suite 400E, Greenwood Village, Colorado 80111 U.S.A.
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WARRANTY DISCLAIMER: THE SOFTWARE IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
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KIND. AMD DISCLAIMS ALL WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
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BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
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PARTICULAR PURPOSE, TITLE, NON-INFRINGEMENT, THAT THE SOFTWARE WILL RUN
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UNINTERRUPTED OR ERROR-FREE OR WARRANTIES ARISING FROM CUSTOM OF TRADE OR
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COURSE OF USAGE. THE ENTIRE RISK ASSOCIATED WITH THE USE OF THE SOFTWARE IS
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ASSUMED BY YOU. Some jurisdictions do not allow the exclusion of implied
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warranties, so the above exclusion may not apply to You.
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LIMITATION OF LIABILITY AND INDEMNIFICATION: AMD AND ITS LICENSORS WILL NOT,
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UNDER ANY CIRCUMSTANCES BE LIABLE FOR ANY PUNITIVE, DIRECT, INCIDENTAL,
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INDIRECT, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING FROM USE OF THE SOFTWARE OR
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THIS AGREEMENT EVEN IF AMD AND ITS LICENSORS HAVE BEEN ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGES. In no event shall AMD's total liability to You
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for all damages, losses, and causes of action (whether in contract, tort
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(including negligence) or otherwise) exceed the amount of $100 USD. You agree
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to defend, indemnify and hold harmless AMD and its licensors, and any of their
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directors, officers, employees, affiliates or agents from and against any and
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all loss, damage, liability and other expenses (including reasonable
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attorneys' fees), resulting from Your use of the Software or violation of the
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terms and conditions of this Agreement.
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U.S. GOVERNMENT RESTRICTED RIGHTS: The Software is provided with "RESTRICTED
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RIGHTS." Use, duplication, or disclosure by the Government is subject to the
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restrictions as set forth in FAR 52.227-14 and DFAR252.227-7013, et seq., or
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its successor. Use of the Software by the Government constitutes
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acknowledgement of AMD's proprietary rights in them.
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EXPORT RESTRICTIONS: The Software may be subject to export restrictions as
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stated in the Software License Agreement.
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@ -99,6 +99,10 @@
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#define RADEON_CS_RING_UVD 3
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#endif
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#ifndef RADEON_CS_RING_VCE
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#define RADEON_CS_RING_VCE 4
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#endif
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#ifndef RADEON_CS_END_OF_FRAME
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#define RADEON_CS_END_OF_FRAME 0x04
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#endif
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@ -538,6 +542,12 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui
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cs->cst->cs.num_chunks = 3;
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break;
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case RING_VCE:
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cs->cst->flags[0] = 0;
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cs->cst->flags[1] = RADEON_CS_RING_VCE;
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cs->cst->cs.num_chunks = 3;
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break;
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default:
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case RING_GFX:
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cs->cst->flags[0] = 0;
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@ -97,10 +97,18 @@
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#define RADEON_INFO_RING_WORKING 0x15
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#endif
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#ifndef RADEON_INFO_VCE_FW_VERSION
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#define RADEON_INFO_VCE_FW_VERSION 0x1b
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#endif
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#ifndef RADEON_CS_RING_UVD
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#define RADEON_CS_RING_UVD 3
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#endif
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#ifndef RADEON_CS_RING_VCE
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#define RADEON_CS_RING_VCE 4
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#endif
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static struct util_hash_table *fd_tab = NULL;
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/* Enable/disable feature access for one command stream.
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@ -341,13 +349,23 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
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ws->info.r600_has_dma = TRUE;
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}
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/* Check for UVD */
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/* Check for UVD and VCE */
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ws->info.has_uvd = FALSE;
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ws->info.vce_fw_version = 0x00000000;
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if (ws->info.drm_minor >= 32) {
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uint32_t value = RADEON_CS_RING_UVD;
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if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
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"UVD Ring working", &value))
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ws->info.has_uvd = value;
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value = RADEON_CS_RING_VCE;
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if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
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NULL, &value) && value) {
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if (radeon_get_drm_value(ws->fd, RADEON_INFO_VCE_FW_VERSION,
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"VCE FW version", &value))
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ws->info.vce_fw_version = value;
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}
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}
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/* Get GEM info. */
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@ -149,6 +149,7 @@ enum ring_type {
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RING_GFX = 0,
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RING_DMA,
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RING_UVD,
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RING_VCE,
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RING_LAST,
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};
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@ -180,6 +181,7 @@ struct radeon_info {
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uint32_t drm_patchlevel;
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boolean has_uvd;
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uint32_t vce_fw_version;
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uint32_t r300_num_gb_pipes;
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uint32_t r300_num_z_pipes;
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