r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
parent
37d43ebb28
commit
07c65b85ea
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@ -59,7 +59,7 @@ static struct pipe_query *r300_create_query(struct pipe_context *pipe,
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q->num_pipes = r300screen->info.r300_num_gb_pipes;
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q->buf = r300->rws->buffer_create(r300->rws, 4096, 4096, TRUE,
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RADEON_DOMAIN_GTT);
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RADEON_DOMAIN_GTT, 0);
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if (!q->buf) {
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FREE(q);
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return NULL;
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@ -907,7 +907,7 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render,
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r300->vbo = rws->buffer_create(rws,
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MAX2(R300_MAX_DRAW_VBO_SIZE, size),
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R300_BUFFER_ALIGNMENT, TRUE,
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RADEON_DOMAIN_GTT);
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RADEON_DOMAIN_GTT, 0);
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if (!r300->vbo) {
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return FALSE;
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}
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@ -103,7 +103,7 @@ r300_buffer_transfer_map( struct pipe_context *context,
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/* Create a new one in the same pipe_resource. */
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new_buf = r300->rws->buffer_create(r300->rws, rbuf->b.b.width0,
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R300_BUFFER_ALIGNMENT, TRUE,
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rbuf->domain);
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rbuf->domain, 0);
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if (new_buf) {
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/* Discard the old buffer. */
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pb_reference(&rbuf->buf, NULL);
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@ -185,7 +185,7 @@ struct pipe_resource *r300_buffer_create(struct pipe_screen *screen,
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rbuf->buf =
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r300screen->rws->buffer_create(r300screen->rws, rbuf->b.b.width0,
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R300_BUFFER_ALIGNMENT, TRUE,
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rbuf->domain);
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rbuf->domain, 0);
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if (!rbuf->buf) {
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FREE(rbuf);
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return NULL;
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@ -1042,7 +1042,7 @@ r300_texture_create_object(struct r300_screen *rscreen,
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/* Create the backing buffer if needed. */
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if (!tex->buf) {
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tex->buf = rws->buffer_create(rws, tex->tex.size_in_bytes, 2048, TRUE,
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tex->domain);
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tex->domain, 0);
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if (!tex->buf) {
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goto fail;
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@ -107,11 +107,14 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
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{
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struct r600_texture *rtex = (struct r600_texture*)res;
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struct pb_buffer *old_buf, *new_buf;
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enum radeon_bo_flag flags = 0;
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switch (res->b.b.usage) {
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case PIPE_USAGE_STAGING:
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case PIPE_USAGE_DYNAMIC:
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case PIPE_USAGE_STREAM:
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flags = RADEON_FLAG_GTT_WC;
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/* fall through */
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case PIPE_USAGE_STAGING:
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/* Transfers are likely to occur more often with these resources. */
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res->domains = RADEON_DOMAIN_GTT;
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break;
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@ -120,6 +123,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
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default:
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/* Not listing GTT here improves performance in some apps. */
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res->domains = RADEON_DOMAIN_VRAM;
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flags = RADEON_FLAG_GTT_WC;
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break;
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}
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@ -129,6 +133,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
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res->b.b.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT |
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PIPE_RESOURCE_FLAG_MAP_COHERENT)) {
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res->domains = RADEON_DOMAIN_GTT;
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flags = 0;
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}
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/* Tiled textures are unmappable. Always put them in VRAM. */
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@ -140,7 +145,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
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/* Allocate a new resource. */
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new_buf = rscreen->ws->buffer_create(rscreen->ws, size, alignment,
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use_reusable_pool,
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res->domains);
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res->domains, flags);
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if (!new_buf) {
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return false;
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}
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@ -1027,6 +1027,8 @@ static void *r600_texture_transfer_map(struct pipe_context *ctx,
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r600_init_temp_resource_from_box(&resource, texture, box, level,
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R600_RESOURCE_FLAG_TRANSFER);
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resource.usage = (usage & PIPE_TRANSFER_READ) ?
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PIPE_USAGE_STAGING : PIPE_USAGE_STREAM;
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/* Create the temporary texture. */
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staging = (struct r600_texture*)ctx->screen->resource_create(ctx->screen, &resource);
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@ -816,12 +816,14 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
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for (i = 0; i < NUM_BUFFERS; ++i) {
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unsigned msg_fb_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
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STATIC_ASSERT(sizeof(struct ruvd_msg) <= FB_BUFFER_OFFSET);
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if (!rvid_create_buffer(dec->ws, &dec->msg_fb_buffers[i], msg_fb_size, RADEON_DOMAIN_VRAM)) {
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if (!rvid_create_buffer(dec->ws, &dec->msg_fb_buffers[i], msg_fb_size,
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RADEON_DOMAIN_VRAM, 0)) {
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RVID_ERR("Can't allocated message buffers.\n");
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goto error;
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}
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if (!rvid_create_buffer(dec->ws, &dec->bs_buffers[i], bs_buf_size, RADEON_DOMAIN_GTT)) {
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if (!rvid_create_buffer(dec->ws, &dec->bs_buffers[i], bs_buf_size,
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RADEON_DOMAIN_GTT, 0)) {
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RVID_ERR("Can't allocated bitstream buffers.\n");
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goto error;
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}
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@ -830,7 +832,7 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
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rvid_clear_buffer(dec->ws, dec->cs, &dec->bs_buffers[i]);
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}
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if (!rvid_create_buffer(dec->ws, &dec->dpb, dpb_size, RADEON_DOMAIN_VRAM)) {
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if (!rvid_create_buffer(dec->ws, &dec->dpb, dpb_size, RADEON_DOMAIN_VRAM, 0)) {
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RVID_ERR("Can't allocated dpb.\n");
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goto error;
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}
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@ -191,7 +191,7 @@ static void rvce_destroy(struct pipe_video_codec *encoder)
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struct rvce_encoder *enc = (struct rvce_encoder*)encoder;
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if (enc->stream_handle) {
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struct rvid_buffer fb;
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rvid_create_buffer(enc->ws, &fb, 512, RADEON_DOMAIN_GTT);
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rvid_create_buffer(enc->ws, &fb, 512, RADEON_DOMAIN_GTT, 0);
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enc->fb = &fb;
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enc->session(enc);
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enc->feedback(enc);
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@ -233,7 +233,7 @@ static void rvce_begin_frame(struct pipe_video_codec *encoder,
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if (!enc->stream_handle) {
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struct rvid_buffer fb;
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enc->stream_handle = rvid_alloc_stream_handle();
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rvid_create_buffer(enc->ws, &fb, 512, RADEON_DOMAIN_GTT);
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rvid_create_buffer(enc->ws, &fb, 512, RADEON_DOMAIN_GTT, 0);
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enc->fb = &fb;
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enc->session(enc);
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enc->create(enc);
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@ -265,7 +265,7 @@ static void rvce_encode_bitstream(struct pipe_video_codec *encoder,
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enc->bs_size = destination->width0;
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*fb = enc->fb = CALLOC_STRUCT(rvid_buffer);
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if (!rvid_create_buffer(enc->ws, enc->fb, 512, RADEON_DOMAIN_GTT)) {
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if (!rvid_create_buffer(enc->ws, enc->fb, 512, RADEON_DOMAIN_GTT, 0)) {
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RVID_ERR("Can't create feedback buffer.\n");
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return;
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}
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@ -390,7 +390,7 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
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cpb_size = cpb_size * 3 / 2;
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cpb_size = cpb_size * enc->cpb_num;
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tmp_buf->destroy(tmp_buf);
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if (!rvid_create_buffer(enc->ws, &enc->cpb, cpb_size, RADEON_DOMAIN_VRAM)) {
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if (!rvid_create_buffer(enc->ws, &enc->cpb, cpb_size, RADEON_DOMAIN_VRAM, 0)) {
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RVID_ERR("Can't create CPB buffer.\n");
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goto error;
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}
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@ -61,11 +61,13 @@ unsigned rvid_alloc_stream_handle()
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/* create a buffer in the winsys */
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bool rvid_create_buffer(struct radeon_winsys *ws, struct rvid_buffer *buffer,
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unsigned size, enum radeon_bo_domain domain)
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unsigned size, enum radeon_bo_domain domain,
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enum radeon_bo_flag flags)
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{
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buffer->domain = domain;
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buffer->flags = flags;
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buffer->buf = ws->buffer_create(ws, size, 4096, false, domain);
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buffer->buf = ws->buffer_create(ws, size, 4096, false, domain, flags);
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if (!buffer->buf)
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return false;
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@ -91,7 +93,8 @@ bool rvid_resize_buffer(struct radeon_winsys *ws, struct radeon_winsys_cs *cs,
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struct rvid_buffer old_buf = *new_buf;
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void *src = NULL, *dst = NULL;
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if (!rvid_create_buffer(ws, new_buf, new_size, new_buf->domain))
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if (!rvid_create_buffer(ws, new_buf, new_size, new_buf->domain,
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new_buf->flags))
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goto error;
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src = ws->buffer_map(old_buf.cs_handle, cs, PIPE_TRANSFER_READ);
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@ -191,7 +194,7 @@ void rvid_join_surfaces(struct radeon_winsys* ws, unsigned bind,
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/* TODO: 2D tiling workaround */
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alignment *= 2;
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pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM);
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pb = ws->buffer_create(ws, size, alignment, bind, RADEON_DOMAIN_VRAM, 0);
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if (!pb)
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return;
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@ -44,6 +44,7 @@
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struct rvid_buffer
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{
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enum radeon_bo_domain domain;
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enum radeon_bo_flag flags;
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struct pb_buffer* buf;
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struct radeon_winsys_cs_handle* cs_handle;
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};
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@ -53,7 +54,8 @@ unsigned rvid_alloc_stream_handle(void);
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/* create a buffer in the winsys */
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bool rvid_create_buffer(struct radeon_winsys *ws, struct rvid_buffer *buffer,
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unsigned size, enum radeon_bo_domain domain);
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unsigned size, enum radeon_bo_domain domain,
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enum radeon_bo_flag flags);
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/* destroy a buffer */
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void rvid_destroy_buffer(struct rvid_buffer *buffer);
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@ -2697,7 +2697,7 @@ static void si_set_border_colors(struct si_context *sctx, unsigned count,
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sctx->border_color_table =
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si_resource_create_custom(&sctx->screen->b.b,
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PIPE_USAGE_STAGING,
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PIPE_USAGE_DYNAMIC,
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4096 * 4 * 4);
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}
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@ -477,6 +477,10 @@ const struct pb_vtbl radeon_bo_vtbl = {
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radeon_bo_get_base_buffer,
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};
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#ifndef RADEON_GEM_GTT_WC
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#define RADEON_GEM_GTT_WC (1 << 2)
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#endif
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static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
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pb_size size,
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const struct pb_desc *desc)
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@ -497,6 +501,10 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
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args.size = size;
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args.alignment = desc->alignment;
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args.initial_domain = rdesc->initial_domains;
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args.flags = 0;
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if (rdesc->flags & RADEON_FLAG_GTT_WC)
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args.flags |= RADEON_GEM_GTT_WC;
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if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE,
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&args, sizeof(args))) {
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@ -504,6 +512,7 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
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fprintf(stderr, "radeon: size : %d bytes\n", size);
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fprintf(stderr, "radeon: alignment : %d bytes\n", desc->alignment);
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fprintf(stderr, "radeon: domains : %d\n", args.initial_domain);
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fprintf(stderr, "radeon: flags : %d\n", args.flags);
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return NULL;
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}
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@ -784,7 +793,8 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
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unsigned size,
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unsigned alignment,
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boolean use_reusable_pool,
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enum radeon_bo_domain domain)
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enum radeon_bo_domain domain,
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enum radeon_bo_flag flags)
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{
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struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
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struct radeon_bomgr *mgr = radeon_bomgr(ws->kman);
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@ -798,13 +808,20 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
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/* Additional criteria for the cache manager. */
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desc.base.usage = domain;
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desc.initial_domains = domain;
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desc.flags = flags;
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/* Assign a buffer manager. */
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if (use_reusable_pool) {
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if (domain == RADEON_DOMAIN_VRAM)
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provider = ws->cman_vram;
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else
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if (domain == RADEON_DOMAIN_VRAM) {
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if (flags & RADEON_FLAG_GTT_WC)
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provider = ws->cman_vram_gtt_wc;
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else
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provider = ws->cman_vram;
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} else if (flags & RADEON_FLAG_GTT_WC) {
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provider = ws->cman_gtt_wc;
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} else {
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provider = ws->cman_gtt;
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}
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} else {
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provider = ws->kman;
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}
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@ -42,6 +42,7 @@ struct radeon_bo_desc {
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struct pb_desc base;
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unsigned initial_domains;
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unsigned flags;
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};
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struct radeon_bo {
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@ -606,7 +606,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
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/* Create a fence, which is a dummy BO. */
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fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE,
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RADEON_DOMAIN_GTT);
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RADEON_DOMAIN_GTT, 0);
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/* Add the fence as a dummy relocation. */
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cs->ws->base.cs_add_reloc(rcs, cs->ws->base.buffer_get_cs_handle(fence),
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RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT,
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@ -424,7 +424,9 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
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pipe_mutex_destroy(ws->cs_stack_lock);
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ws->cman_vram->destroy(ws->cman_vram);
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ws->cman_vram_gtt_wc->destroy(ws->cman_vram_gtt_wc);
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ws->cman_gtt->destroy(ws->cman_gtt);
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ws->cman_gtt_wc->destroy(ws->cman_gtt_wc);
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ws->kman->destroy(ws->kman);
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if (ws->gen >= DRV_R600) {
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radeon_surface_manager_free(ws->surf_man);
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@ -642,9 +644,15 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
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ws->cman_vram = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
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if (!ws->cman_vram)
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goto fail;
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ws->cman_vram_gtt_wc = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
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if (!ws->cman_vram_gtt_wc)
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goto fail;
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ws->cman_gtt = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
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if (!ws->cman_gtt)
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goto fail;
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ws->cman_gtt_wc = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
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if (!ws->cman_gtt_wc)
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goto fail;
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if (ws->gen >= DRV_R600) {
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ws->surf_man = radeon_surface_manager_new(fd);
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@ -701,8 +709,12 @@ fail:
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pipe_mutex_unlock(fd_tab_mutex);
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if (ws->cman_gtt)
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ws->cman_gtt->destroy(ws->cman_gtt);
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if (ws->cman_gtt_wc)
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ws->cman_gtt_wc->destroy(ws->cman_gtt_wc);
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if (ws->cman_vram)
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ws->cman_vram->destroy(ws->cman_vram);
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if (ws->cman_vram_gtt_wc)
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ws->cman_vram_gtt_wc->destroy(ws->cman_vram_gtt_wc);
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if (ws->kman)
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ws->kman->destroy(ws->kman);
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if (ws->surf_man)
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@ -58,7 +58,9 @@ struct radeon_drm_winsys {
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struct pb_manager *kman;
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struct pb_manager *cman_vram;
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struct pb_manager *cman_vram_gtt_wc;
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struct pb_manager *cman_gtt;
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struct pb_manager *cman_gtt_wc;
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struct radeon_surface_manager *surf_man;
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uint32_t num_cpus; /* Number of CPUs. */
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@ -65,6 +65,10 @@ enum radeon_bo_domain { /* bitfield */
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RADEON_DOMAIN_VRAM_GTT = RADEON_DOMAIN_VRAM | RADEON_DOMAIN_GTT
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};
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enum radeon_bo_flag { /* bitfield */
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RADEON_FLAG_GTT_WC = (1 << 0)
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};
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enum radeon_bo_usage { /* bitfield */
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RADEON_USAGE_READ = 2,
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RADEON_USAGE_WRITE = 4,
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@ -287,7 +291,8 @@ struct radeon_winsys {
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unsigned size,
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unsigned alignment,
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boolean use_reusable_pool,
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enum radeon_bo_domain domain);
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enum radeon_bo_domain domain,
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enum radeon_bo_flag flags);
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struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
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struct pb_buffer *buf);
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