Commit Graph

93764 Commits

Author SHA1 Message Date
Jason Ekstrand 604eda3712 nir/spirv: Rework the way pointers get dereferenced
This has the advantage of moving all of the "extend an access chain"
code into one place.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:54 -07:00
Jason Ekstrand 4c21e6b7f8 nir/spirv: Break variable creation out into a helper
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:53 -07:00
Jason Ekstrand 2e92d6a392 nir/spirv: Remove unneeded parameters from pointer_to_offset
Everyone now calls it with stop_at_matrix = false.  Since we're now
always walking all the way to the end of the access chain, the type
returned is just the same as ptr->type;

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:53 -07:00
Jason Ekstrand 6d30f33307 nir/spirv: Simplify matrix loads/stores
Instead of handling all of the complexity at the end, we choose to
decorate types a bit more cleverly.  When we have a row-major matrix
type, we give it the stride of a single vector and give it's array
element type (which represents a column) the actual matrix stride.

Previously, we were using stop_at_matrix and handling everything from
matrix on down as special cases but now we walk the access chain all the
way to the end and then load.  Even though this looks like it may lead
to a significant functional change, it doesn't.  The reason why we
needed to do stop_at_matrix before was to handle row-major properly
since the offsets and strides would be all out-of-order.  Now that row
major matrix types have the small stride on the matrix and the large
stride on the vector, offsetting to a single column of a row-major
matrix works fine.  The load/store code simply picks up on the fact that
the stride isn't the type size and does multiple loads.  The generated
code from these methods should be the same.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:53 -07:00
Jason Ekstrand 00c47e111c nir/spirv: Use the correct stride for non-32-bit vectors
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:53 -07:00
Jason Ekstrand 415e198d48 nir/spirv: Wrap access chains in a new vtn_pointer data structure
The vtn_pointer structure provides a bit better abstraction than passing
access chains around directly.  For one thing, if the pointer just
points to a variable, we don't need the access chain at all.  Also,
pointers know what their dereferenced type is so we can avoid passing
the type in a bunch of places.  Finally, pointers can, in theory, be
extended to the case where you don't actually know what variable is
being referenced.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:52 -07:00
Jason Ekstrand 06b5eeda17 nir/spirv: Rename some things from access_chain to pointer
We're about to add a vtn_pointer data structure and this will prevent
some rename churn in the next commit.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:52 -07:00
Jason Ekstrand 4e0280d37d nir/spirv: Split up Uniform and UniformConstant storage classes
We were originally handling them together because I was rather unclear
on the distinction.  However, keeping them combined keeps the confusion.
Split them up so that it's more clear from the code how we expect the
two storage classes to be used.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:52 -07:00
Jason Ekstrand 32a60dbef3 nir/spirv: Add a storage_class_to_mode helper
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:52 -07:00
Jason Ekstrand a10d887ad1 nir/spirv: Use the type from the deref for atomics
Previously, we were using the type of the variable which is incorrect.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:51 -07:00
Jason Ekstrand cc577ca377 nir/spirv: Move a "}"
It's closing a "{" at the begining of a switch case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2017-07-05 15:26:51 -07:00
Jason Ekstrand 0673bbfd9b i965: Move surface resolves back to draw/dispatch time
This is effectively a revert of 388f02729b
though much code has been added since.  Kristian initially moved it to
try and avoid locking problems with meta-based resolves.  Now that meta
is gone from the resolve path (for good this time, we hope), we can move
it back.  The problem with having it in intel_update_state was that the
UpdateState hook gets called by core mesa directly and all sorts of
things will cause a UpdateState to get called which may trigger resolves
at inopportune times.  In particular, it gets called by _mesa_Clear and,
if we have a HiZ buffer in the INVALID_AUX state, causes a HiZ resolve
right before the clear which is pointless.  By moving it back to
try_draw_prims time, we know it will only get called right before a draw
which is where we want it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-07-05 14:22:40 -07:00
Vinson Lee 95731b7ccc mesa: Avoid set comprehension.
Fix build error on CentOS 6.9 with Python 2.6.

  GEN    main/format_fallback.c
  File "./main/format_fallback.py", line 42
    names = {fmt.name for fmt in formats}
                        ^
SyntaxError: invalid syntax

Fixes: a1983223d8 ("mesa: Add _mesa_format_fallback_rgbx_to_rgba() [v2]")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2017-07-05 12:48:26 -07:00
Bas Nieuwenhuizen 860a8e6b99 ac/nir: Move VS position exports before param exports.
According to Nicolai the SX can already start work when all
the position exports are done, so do those first.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-07-05 20:23:00 +02:00
Bas Nieuwenhuizen 3d527ba19b radv: Always set depthbuffer using image format instead of iview format.
We have some cases where changing between depth and stencil only aspect
was causing hangs.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2017-07-05 20:23:00 +02:00
Bas Nieuwenhuizen 7c7196e35c radv: Disable depth & stencil tests when the depthbuffer doesn't support it.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2017-07-05 20:23:00 +02:00
Tomasz Figa 0ede0f9dff egl: android: Fix potential use of unitialized variable
If dri2_setup_extensions() fails, the "err" variable would not be assigned
causing the error path to access an unitialized variable. Fix it by
assigning an error message.

Fixes: 2c341f2bda ("egl: refactor dri2_create_screen() into three separate functions")
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 18:49:22 +01:00
Tomasz Figa 50a8a7377a intel: common: Fix link failure with standalone Android build
Some reshuffle in the Makefiles under src/intel resulted in Android
libraries being no longer linked with code using
src/intel/common/gen_debug.h that contains references to functions
exported by those libraries (namely ALOGW macro, which is currently
resolved into a call to __android_log_print() from cutils).

Fix the build by taking into account ANDROID_CFLAGS and ANDROID_LIBS for
affected module on Android NDK builds.

Fixes: d5b355ce5f ("i965: Move intel_debug.h to intel/common/gen_debug.h")
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 18:49:21 +01:00
Mauro Rossi b7ee56b599 Android: generate symlinks for all enabled gallium drivers
Current post install command relies on GALLIUM_TARGET_DRIVERS variable,
however variable needs to be initialized in src/gallium/Android.mk
in order that all enabled gallium drivers symlinks are correctly generated.

At the moment due to sorting of INC_DIRS and variable set with svga (vmwgfx)
only vmwgfx_dri.so and virtio_gpu_dri.so symlinks are generated.

Fixes: a3d98ca62f ("Android: use symlinks for driver loading")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 15:10:42 +01:00
Tomeu Vizoso 79827f50e2 android: build imx-drm winsys
Add Android.mk for winsys/imx/drm.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 15:10:31 +01:00
Rob Herring 77c446711b android: add etnaviv driver build support
Add etnaviv to Android makefiles.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-07-05 15:10:31 +01:00
Nicolai Hähnle c2065ed687 st/glsl_to_nir: fix edgeflag passthrough
We have to mark the additional shader input as used, otherwise it will
be eliminated, and we have to setup its index correctly.

This is a bit of a hack, but so is everything surrounding edgeflag
passthrough.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:12 +02:00
Nicolai Hähnle 8a4cd79d00 st/mesa: use pipe_shader_type_from_mesa
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-07-05 12:27:12 +02:00
Nicolai Hähnle c7ecbd1153 tgsi_from_mesa: add tgsi_get_gl_frag_result_semantic
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:11 +02:00
Nicolai Hähnle fb1c4e3d47 tgsi_from_mesa: add pipe_shader_type_from_mesa
So... the pipe_ prefix doesn't really fit into a TGSI header; on the
other hand, the return type has the pipe_ prefix.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:11 +02:00
Nicolai Hähnle 497b95fdf6 tgsi,st/mesa: move varying slot to semantic mapping into a helper for VS
We will use this helper in radeonsi's NIR path.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:11 +02:00
Nicolai Hähnle d91f97f91d ddebug: handle some cases of non-TGSI shaders
NIR shaders are not captured properly in pipelined mode currently. This
would require shader cloning, which requires linking all the Gallium
drivers against NIR. We can always do that later.

v2: avoid immediate crashes in pipelined mode

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
2017-07-05 12:27:11 +02:00
Nicolai Hähnle 10e1d2d9aa glsl_to_nir: zero-initialize var->data.descriptor_set
This is convenient for backends that support both Vulkan and OpenGL while
lowering samplers to derefs with nir_lower_samplers_as_deref.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-07-05 12:27:10 +02:00
Nicolai Hähnle 9a81d032c1 glsl: add glsl_base_type_is_integer
We will use this from radeonsi/nir, which we want to keep as pure C code.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-07-05 12:27:10 +02:00
Nicolai Hähnle 34df9525f6 nir: add NIR_PRINT environment variable
Reviewed-by: Rob Clark <robdclark@gmail.com>
2017-07-05 12:27:07 +02:00
Nicolai Hähnle 3628efedf2 glsl/blob: add valgrind checks that written data is defined
Undefined data will eventually trigger a valgrind error while computing
its CRC32 while writing it into the disk cache, but at that point, it is
basically impossible to track down where the undefined data came from.

With this change, finding the origin of undefined data becomes easy.

v2: remove duplicate VALGRIND_CFLAGS (Emil)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 12:26:10 +02:00
Nicolai Hähnle 210ebd4b9c glsl: explicitly zero out padding to gl_shader_variable bitfield
Otherwise, the padding bits remain undefined, which leads to valgrind
errors when storing the gl_shader_variable in the disk cache.

v2: use rzalloc instead of an explicit padding member variable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-07-05 12:25:49 +02:00
Nicolai Hähnle f4f7096c1d glsl: simplify add_uniform_to_shader::visit_field
Each field gets a distinct name, so we should never hit the case where
the name already exists in the parameter list.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-07-05 12:25:49 +02:00
Nicolai Hähnle 727e8ba133 glsl: look for multiple variables simultaneously with find_assignment_visitor
Save some passes over the IR.

v2: redesign to make the users of find_assignments more readable
v3:
- fix missing !
- add some comments and make the num_found check more explicit (Timothy)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-07-05 12:25:21 +02:00
Marek Olšák a2b02c4948 gallium/radeon: fix VDPAU breakage, need VRAM with WC 2017-07-05 01:14:48 +02:00
Ilia Mirkin 1e73fc6b1a a5xx: enable polygon offset clamps
This is already set and emitted by the code.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin def1b94c33 a5xx: implement logicop support
The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin abe8740e33 a5xx: enable polygon mode selection
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin 8108b56023 a5xx: disable ARB_depth_clamp for now
We need to figure out how to implement it properly. Right now it doesn't
work at all.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin 5d9d1df183 a5xx: fix clip_halfz support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin 02379b68f6 a5xx: improve 3d texture sampling
At least the first level works now. Eventually the later levels stop
working, there appears to be some alignment issue. But this improves the
situation immensely.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin c0f1efe04d a5xx: remove one of the MIPFILTER_LINEAR bits
It doesn't appear to do what we want. Removing this bit makes
lodclamp-between as well as a number of dEQP tests pass, with no visible
ill effect.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin f1fc619bd8 a5xx: enable formats newly added to the headers
This enables S3TC, BPTC, ETC2, and ASTC texture decoding. Additionally
this enables RGB32 texture buffer objects, as well as 11_11_10_FLOAT and
10_10_10_2 vertex formats (and related extensions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin b68e22d5e2 a5xx: include color swap when decoding vertices
This fixes support for BGRA vertex formats

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin 5fdcddbeb4 a5xx: update headers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Marek Olšák 156832ee2b gallium/radeon: attempt to fix a compiler failure in radeon_winsys.h
trivial.
2017-07-04 22:40:35 +02:00
Marek Olšák 0591df025b winsys/amdgpu: use 128KB BOs for suballocations of up to 64KB BOs
This decreases the number of BOs, but might also increase memory usage.
It's better for small textures.

The gameplay is on the far right:
https://people.freedesktop.org/~mareko/suballoc.svg

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák c784015643 gallium/radeon: allow suballocating textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák 23446eedd1 gallium/radeon: generalize the function for in-place texture reallocation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák 91f72975ac gallium/radeon: add radeon_winsys::buffer_is_suballocated
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00