Commit Graph

94047 Commits

Author SHA1 Message Date
Sinclair Yeh 56a6e890f3 drivers/svga: Connect driver-side fence_* functions
Connect fence_get_fd, fence_create_fd, and fence_server_sync.
Return PIPE_CAP_NATIVE_FENCE_FD capability based on what the
winsys reports

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-17 10:09:25 -06:00
Sinclair Yeh 4da543e30a winsys/svga/drm: Create winsys interface for Fence FD
The new interfaces will be used to enable
EGL_ANDROID_native_fence_sync.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-17 10:09:25 -06:00
Sinclair Yeh 2431cccad1 winsys/svga/drm: Prepare to support fence fd
Make the fields and flags available.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-17 10:09:25 -06:00
Sinclair Yeh 65175df601 drivers/svga, winsys/svga/drm: Thread through timeout for fence_finish
The timeout parameter is required to implement
EGL_ANDROID_native_fence_sync.

v2
* Replaced default timeout from 0 to PIPE_TIMEOUT_INFINITE
* Add more documentation to the new timeout parameter

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-17 10:09:25 -06:00
Brian Paul 9ee86d6db7 svga: whitespace clean-up in svga_winsys.h
Trivial.
2017-07-17 10:09:25 -06:00
Brian Paul 6f4923bd38 svga: add some const qualifiers
Trivial.
2017-07-17 10:06:01 -06:00
Brian Paul 589f546256 svga: add comment about 'extra' constant locations
Trivial.
2017-07-17 10:06:00 -06:00
Jason Ekstrand c5700ed72e anv/image: Add INPUT_ATTACHMENT to the list of required usages
From the Vulkan 1.0.53 spec VU for vkCreateImageView:

    "image must have been created with a usage value containing at least
    one of VK_IMAGE_USAGE_SAMPLED_BIT, VK_IMAGE_USAGE_STORAGE_BIT,
    VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
    VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT, or
    VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT"

We were missing VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT from out list.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2017-07-17 08:18:46 -07:00
Jason Ekstrand cbdfd1daa2 anv: Stop leaking the no_aux sampler surface state
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2017-07-17 08:18:46 -07:00
Jason Ekstrand bd41564746 anv/cmd_buffer: Properly handle render passes with 0 attachments
We were early returning and never created the NULL surface state.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: James Legg <jlegg@feralinteractive.com>
Cc: mesa-stable@lists.freedesktop.org
2017-07-17 08:18:46 -07:00
Marek Olšák c62809171c radeonsi/gfx9: add VM fault dmesg parser support
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:57:34 -04:00
Marek Olšák 9f320e0a38 radeonsi: automatically resize shader compiler thread queues when they are full
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:57:29 -04:00
Marek Olšák 4cae274116 radeonsi: prevent a deadlock in util_queue_add_job with too many GL contexts
If the queue is full, util_queue_add_job will wait while bo_fence_lock is
held.

It pb_slab wants to reuse a buffer, it will lock the pb_slab mutex and
try to check BO fence busyness, but it has to wait for bo_fence_lock to get
released. Both bo_fence_lock and pb_slab mutex are locked now.

When the CS thread unreferences and releases a suballocated buffer,
it will try to lock the pb_slab mutex and has to wait. The CS thread
can't finish its job in order to free a queue slot and unblock
util_queue_add_job ==> deadlock.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:57:25 -04:00
Marek Olšák 59ad769770 util/u_queue: add an option to resize the queue when it's full
Consider the following situation:
  mtx_lock(mutex);
  do_something();
  util_queue_add_job(...);
  mtx_unlock(mutex);

If the queue is full, util_queue_add_job will wait for a free slot.
If the job which is currently being executed tries to lock the mutex,
it will be stuck forever, because util_queue_add_job is stuck.

The deadlock can be trivially resolved by increasing the queue size
(reallocating the queue) in util_queue_add_job if the queue is full.
Then util_queue_add_job becomes wait-free.

radeonsi will use it.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:57:20 -04:00
Marek Olšák 465bb47d6f radeonsi: expose ARB_timer_query unconditionally
clock_crystal_freq is always non-zero now.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:57:17 -04:00
Marek Olšák 3d1a576fa6 ac/gpu_info: if clock crystal frequency is 0, print an error and set 1
During bring-up, this is often 0. Prevent automatic disablement of
ARB_timer_query and demotion of the OpenGL version to 3.2 by setting
a non-zero frequency. Print an error message instead.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:56:59 -04:00
Marek Olšák d0963ef084 radeonsi/gfx9: don't read back non-existent register SRBM_STATUS2
It looks like there is no way to monitor SDMA busyness on GFX9.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:56:56 -04:00
Marek Olšák 5fb80a1e84 radeonsi: prevent a crash with DBG_CHECK_VM and u_threaded_context
by setting PIPE_CONTEXT_DEBUG in the caller

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:56:51 -04:00
Marek Olšák ddbd2f4c54 ac/surface/gfx9: flags.texture currently refers to TC-compatible HTILE
This should lead to better MSAA performance on GFX9.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:56:46 -04:00
Marek Olšák ffa7ec9e22 radeonsi: simplify computation of tessellation offchip buffers
This is overly cautious, but better safe than sorry.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:55:07 -04:00
Marek Olšák facfab28fe radeonsi/gfx9: add workarounds to avoid VGPR indexing completely
For inputs and outputs, indirect indexing is lowered by the GLSL compiler.
For temporaries, use alloca and disable the "promote-alloca" pass.

In the future, we could switch all codepaths to alloca permanently and
just rely on the "promote-alloca" pass.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák 93391ac478 radeonsi: emit param exports after position exports
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák 9d9ffc8475 radeonsi: move building parameter exports into a separate function
Both loops now look simple.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák 4e30fb4ecc radeonsi: don't use info.num_inputs when it's unused
For clarity. It's only used by color interpolation.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák f8d6dd9b3d radeonsi: add si_build_fs_interp helper
This is much simpler.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák 4560f2b90a radeonsi: merge si_llvm_get_amdgpu_target into ac_get_llvm_target
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák c351037d6c gallivm: inline gallivm_init_llvm_targets
there is only one user.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák ece0c0439f radeonsi: don't call gallivm_init_llvm_targets
It's for initializing the native (x86) target.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák d308460586 gallium/radeon: reallocate suballocated buffers when exported
This should fix exports of suballocated buffers.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Marek Olšák 5b555854cc gallium/radeon: flush the context after in-place texture realloc before export
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 10:50:39 -04:00
Mark Thompson 63dcfed81f st/va: Fix scaling list ordering for H.265
Mesa here requires the scaling lists in diagonal scan order, but
VAAPI passes them in raster scan order.  Therefore, rearrange the
elements when copying.

v2: Move scan tables to vl_zscan.c.
    Fix type in size assertion.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-07-17 15:24:56 +01:00
Emil Velikov 4168c162c5 radv: advertise v6 of the wayland surface extension
Jason updated the Khronos spec to explicitly state that Wayland surfaces
must support VK_PRESENT_MODE_MAILBOX_KHR.

ANV did so since day one (back in 2015)

Cc: mesa-stable@lists.freedesktop.org
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-17 15:24:48 +01:00
Emil Velikov 43c188f970 anv: advertise v6 of the wayland surface extension
Jason updated the Khronos spec to explicitly state that Wayland surfaces
must support VK_PRESENT_MODE_MAILBOX_KHR.

ANV did so since day one (back in 2015)

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-17 15:24:32 +01:00
Emil Velikov 647b5a18df i965: use strtol to convert the integer deviceID override
One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE
variable. A few symbolic names or a numerical value for the actual
device ID is accepted.

At the same time we're using strtod (string to double) to convert the
string to a decimal numeral. A seeming thinko, made by the original
commit that introduces the code in libdrm_intel and got here with the
import.

Fixes: 514db96c11 ("i965: Import libdrm_intel.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-07-17 15:23:49 +01:00
Marek Olšák f9d5611617 gallium/u_blitter: don't use TXF for scaled blits
There seems to be a rounding difference with F2I vs nearest filtering.
The precise problem in the rounding is unknown.

This fixes an incorrect output with OpenMAX encoding.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 15:47:30 +02:00
Lionel Landwerlin 59adde0eab anv: ensure device name contains terminating character
v2: Use sizeof() (Chris)

CID: 1415113
Reported-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-07-17 14:36:38 +01:00
Lionel Landwerlin f03f893cb8 i965: miptree: silence coverity warning
This probably can't happen, but we're better off with initialized
variables.

CID: 1415114
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-07-17 14:36:38 +01:00
Marek Olšák 0d190913bf mesa: flag _NEW_TEXTURE_OBJECT for GL_TEXTURE_LOD_BIAS_EXT
Only the compatibility profile can set it.
It was done incorrectly when we split _NEW_TEXTURE.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-17 15:27:14 +02:00
Kenneth Graunke 32c79cdacc meta: Actually initialize ImmutableLevels to 1.
Otherwise, ImmutableLevels is 0, which is an illegal value.  Later,
_mesa_meta_setup_sampler will use _mesa_texture_parameteriv to set

   texObj->MaxLevel = CLAMP(params[0], texObj->BaseLevel,
                            texObj->ImmutableLevels - 1);

which turns into a completely bogus CLAMP(value, 0, -1)...where the
upper bound is smaller than the lower bound.  This ends up being -1
today due to the way CLAMP is implemented, which is a bogus MaxLevel.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-07-17 01:37:51 -07:00
Kenneth Graunke 6374288b62 dri: Make classic drivers allow __DRI_CTX_FLAG_NO_ERROR.
Grigori recently added EGL_KHR_create_context_no_error support,
which causes EGL to pass a new __DRI_CTX_FLAG_NO_ERROR flag to
drivers when requesting an appropriate context mode.

driContextSetFlags() will already handle it properly for us, but the
classic drivers all have code to explicitly balk at unknown flags.  We
need to let it through or they'll fail to create a no_error context.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Grigori Goronzy <greg@chown.ath.cx>
2017-07-17 01:37:51 -07:00
Samuel Pitoiset c745beaf10 ddebug: fix parsing of the pipelined mode
Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-17 10:28:45 +02:00
Dave Airlie 9ee67467c9 radv: predicate cmask eliminate when using DCC.
When using DCC some clear values don't require a cmask eliminate
step. This patch adds support for black and black with alpha 1,
there are other values, but I don't have access to a comprehensive list.

This works by setting the cmask eliminate predicate when doing the
fast clear, and later when doing the cmask elimination making sure
the draws are predicated.

This increases the fps on Sascha Willems deferred.

Tonga: 580fps->670fps on a Tonga PRO card.
Polaris 730->850fps

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-17 01:44:43 +01:00
Dave Airlie 8eed291c2c radv/clear: add r32g32b32a32 fast clear support (v2)
We can only fast clear 128-bit images if the r/g/b channels
are the same, and we are using DCC.

For DCC we'll bail out on translate if this isn't true,
and we catch cmask clears explicitly.

v2: remove 64-bit block (Bas), add uint32 as well.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-17 01:44:25 +01:00
Dave Airlie acf1e132af amd/addrlib: fix typo in api name.
This fixes the misspelling of ALIGNMENTS in addrlib.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-17 01:44:14 +01:00
Dave Airlie f8d5b377c8 radv: set cb base tile swizzles for MRT speedups (v4)
This patch uses addrlib to workout the tile swizzles according
to the surface index. It seems to produce the same values as
amdgpu-pro for the deferred test.

v2: don't apply swizzle to CMASK. the eg docs don't mention
it, and we clearly don't align cmask for that.
v3: disable surf index for dedicated images, as these will
most likely be shared, and I don't think the metadata has
space for this info in it yet.
v4: update for shareable images, rename combined_swizzle
to tile_swizzle

This gets the deferred demo from 730->950fps on my rx480.
(dcc cmask elim predication patches get it further)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-17 01:43:41 +01:00
Dave Airlie b86f86f55c radv: allow clear merging for depth/stencil with no care stencil
Some of the Sascha Willems demos pick a D32/S8 format for the depth
buffer, then do a LOAD_OP_CLEAR/LOAD_OP_DONT_CARE on it, which means
we don't get to merge the undefined->depth and clear htile transitions.

This add the stencil aspect to the pending clears if there is a depth
clear pending and the stencil aspect is don't care.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-17 01:16:59 +01:00
Bas Nieuwenhuizen 373f707fbb radv: Remove NV dedicated alloc extension.
To not confuse apps in thinking it might be faster.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
2017-07-15 20:10:43 +02:00
Bas Nieuwenhuizen 515da29360 radv: Use the KHR dedicated alloc for the WSI.
NV isn't valid for external images anymore.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes: 6ddc64b93e "radv: Add support for VK_KHR_dedicated_allocation."
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
2017-07-15 20:10:25 +02:00
Jason Ekstrand b70829708a radv: Implement VK_KHR_external_memory
This effectively reverts commit 43a171878bb4b5aedb36a.  Technically,
VK_KHR_get_memory_requirements2 and VK_KHR_dedicated_allocation are
required for the KHR version but this at least restores the removed
functionality.  This patch builds but has received zero testing.

Acked-by: Dave Airlie <airlied@redhat.com>
2017-07-15 08:59:38 -07:00
Bas Nieuwenhuizen 6ddc64b93e radv: Add support for VK_KHR_dedicated_allocation.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Dave Airlie <airlied@redhat.com>
2017-07-15 08:59:38 -07:00