Commit Graph

99788 Commits

Author SHA1 Message Date
Brian Paul 79cafa0df3 mesa: shrink gl_vertex_array
Inspired by Marek's earlier patch, but goes a little further.
Sort fields from largest to smallest.  Use bitfields.

Reduced from 48 bytes to 32.  Also reduces size of gl_vertex_array_object
from 4144 to 3632

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-29 21:15:52 -07:00
Marek Olšák f96a69f916 mesa: replace GLenum with GLenum16 in common structures (v4)
v2: - fix glGet*
    - also use GLenum16 for DrawBuffers
v3: - rebase to top of tree (BrianP) and incorporate Ian's suggestions
v4: - fix a GLenum16 bug in VBO/save code, add some STATIC_ASSERT()s

gl_context = 152432 -> 136840 bytes
vbo_context = 22096 -> 20608 bytes

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2018-01-29 21:15:52 -07:00
Brian Paul 94843e6056 mesa: fix incorrect size/error test in _mesa_GetUnsignedBytevEXT()
get_value_size() returns -1 for an error.  The similar check in
_mesa_GetUnsignedBytei_vEXT() is correct.

Found by chance.  There are apparently no Piglit tests which exercise
glGetUnsignedBytei_vEXT() or glGetUnsignedBytevEXT().

Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-29 21:15:52 -07:00
Neha Bhende e4ca1d6456 svga: Check rasterization state object before checking poly_stipple_enable
Sometimes rasterization state object could be empty. This is causing
segfault on hw8,9,10 for some traces.

This patch fixes enemy_territory_quake_wars_high,
enemy_territory_quake_wars_low, etqw-demo, lightsmark2008, quake1
glretrace crashes on hw 8,9,10.

Tested with mtt-glretrace and mtt-piglit.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-01-29 21:04:49 -07:00
Neha Bhende d4a5e14fae svga: Adjust alpha for S3TC_DXT1_EXT RGB formats
According to spec, S3TC_DXT1_EXT RGB formats are supposed to be
opaque. Correspoding svga formats are not handling it so explicitly
setting it to 1.0.
This fixes piglit test spec@ext_texture_compression_s3tc@s3tc-targeted
Note: This test is testcase for freedesktop bug 100925

Tested with mtt-piglit and mtt-glretrace on 8,9,10,11 and 15

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-01-29 21:04:49 -07:00
Gert Wollny 6a7d1ca2c4 mesa/st/glsl_to_tgsi: Mark first write as unconditional when appropriate
In the register lifetime estimation if the first write is unconditional or
conditional but not within a loop then this is an unconditional dominant
write in the sense of register life time estimation.
Add a test case and record the write accordingly.

Fixes: 807e2539e5 ("mesa/st/glsl_to_tgsi: Add
tracking of ifelse writes in register merging")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104803
Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2018-01-29 21:04:49 -07:00
Roland Scheidegger 3c7aa242f5 mesa: skip validation of legality of size/type queries for format queries
The size/type query is always legal (if we made it that far).
Removing this causes a difference for GL_TEXTURE_BUFFER - the reason is that
these parameters are valid only with GetTexLevelParameter() if gl 3.1 is
supported, but not if only ARB_texture_buffer_object is supported.
However, while the spec says that these queries return "the same information
as querying GetTexLevelParameter" I believe we're not expected to return just
zeros here. By definition, these pnames are always valid (unlike for the
GetTexLevelParameter() function which would return an error without GL 3.1).
The spec is a bit inconsistent there and open to interpretation - while
mentioning the "same information as querying GetTexLevelParameter" is
returned, it also mentions that 0 is returned for size/type if the
target/format is not supported - implying correct results to be returned
if it is supported, regardless that GetTexLevelParameter would return
an error. (Also, the bit about this returning the same as
GetTexLevelParameter also includes querying stencil type, which isn't
even possible with GetTexLevelParameter.)

This breaks some piglit arb_internalformat_query2 tests (which I believe to
be wrong).

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>§
2018-01-30 01:28:47 +01:00
Roland Scheidegger 21fe02d1d3 mesa: restrict formats being supported by target type for formatquery
The code just considered all formats as being supported if they were either
a valid fbo or texture format.
This was quite awkward since then the query would return "supported" for
e.g. GL_RGB9E5 or compressed formats and target RENDERBUFFER (albeit the driver
could still refuse it in theory). However, when then querying for instance the
internalformat sizes, it would just return 0 (due to the checks being more
strict there).
It was also a problem for texture buffer targets, which have a more restricted
list of formats which are allowed (and again, it would return supported but
then querying sizes would return 0).
So only take validation of formats into account which make sense for a given
target.
Can also toss out some special checks for rgb9e5 later, since we'd never get
there if it wasn't supported in the first place.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2018-01-30 01:28:47 +01:00
Roland Scheidegger 272e7e1bd5 mesa: (trivial) add TODO comment for default results for internal queries 2018-01-30 01:28:47 +01:00
Roland Scheidegger 09dc4f9012 mesa: remove misleading gles checks for formatquery
Testing for gles there is just confusing - this is about target being
supported, if it was valid at all was already determined earlier
(in _legal_parameters). It didn't make sense at all in any case, since
it would only have said false there for gles for 2d but not 2d arrays etc.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2018-01-30 01:28:47 +01:00
Rafael Antognolli e7ecc5e160 i965: Emit PIPE_CONTROL with ISP bit on older platforms.
Emit it on all platforms since gen7.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-01-29 14:52:07 -08:00
Rafael Antognolli fa21ddf7b1 anv/cmd_buffer: Emit PIPE_CONTROL with ISP bit on older platforms.
Emit it on all platforms since gen7.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-01-29 14:52:07 -08:00
Timothy Arceri 2b4afaef1c st/glsl_to_nir: remove dead io after conversion to nir
This fixes an assert in nir_lower_var_copies() for some bioshock
shaders where an unused clipdistance array has no size.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 09:14:36 +11:00
Timothy Arceri 327c1a7fb3 radeonsi/nir: add support vs double inputs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 09:08:47 +11:00
Timothy Arceri 44067d6f0d radeonsi: pass input_idx to declare_nir_input_vs()
This make it consistent with declare_nir_input_fs() and will allow
us to support doubles.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 09:08:47 +11:00
Timothy Arceri cf75ee3ab1 radeonsi: add bitcast_inputs() helper
Will be used in a following patch to help support doubles.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 09:08:47 +11:00
Timothy Arceri 96cfd4bd7e radeonsi/nir: fix num_inputs for doubles in vs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 09:08:47 +11:00
Timothy Arceri 09cd484d61 nir: partially revert c2acf97fcc
c2acf97fcc changed the use of double_inputs_read to be
inconsitent with its previous meaning. Here we re-enable the
gather info code that was removed as the modified code from
c2acf97fcc now uses the double_inputs member rather than
double_inputs_read.

This change allows us to use double_inputs_read with gallium
drivers without impacting double_inputs which is used by i965.

We also make use of the compiler option vs_inputs_dual_locations
to allow for the difference in behaviour between drivers that handle
vs inputs as taking up two locations for doubles, versus those that
treat them as taking a single location.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2018-01-30 09:08:47 +11:00
Timothy Arceri 5b8de4bdff nir: add vs_inputs_dual_locations compiler option
Allows nir drivers to either use a single or dual locations for
vs double inputs.

i965 uses dual locations for both OpenGL and Vulkan drivers, for
now gallium OpenGL drivers only use a single location.

The following patch will also make use of this option when
calling nir_shader_gather_info().

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2018-01-30 09:08:47 +11:00
Timothy Arceri f63e05ae9e compiler: tidy up double_inputs_read uses
First we move double_inputs_read into a vs struct in the union,
double_inputs_read is only used for vs inputs so this will
save space and also allows us to add a new double_inputs field.

We add the new field because c2acf97fcc changed the behaviour
of double_inputs_read, and while it's no longer used to track
actual reads in i965 we do still want to track this for gallium
drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-30 09:08:47 +11:00
Dave Airlie f6cc15dccd radv/gfx9: fix block compression texture views. (v2)
This ports a fix from amdvlk, to fix the sizing for mip levels
when block compressed images are viewed using uncompressed views.

My original fix didn't power the clamping, but it looks like
the clamping is required to stop the sizing going too large.

Fixes:
dEQP-VK.image.texel_view_compatible.graphic.extended*bc*
Doesn't crash DOW3 anymore.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: e38685cc62 'Revert "radv: disable support for VEGA for now."'
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-30 07:39:13 +10:00
Bas Nieuwenhuizen 0347a83bbf radv: Signal fence correctly after sparse binding.
It did not signal syncobjs in the fence, and also signalled too early
if there was work on the queue already, as we have to wait till that
work is done.

Fixes: d27aaae4d2 "radv: Add external fence support."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-29 17:22:58 +01:00
Brian Paul 0d044f7d61 mesa/vbo: replace vbo_draw_method() with _mesa_set_drawing_arrays()
The arrays specified by ctx->Array._DrawArrays are used for all
vertex drawing via vbo_context::draw_prims().  Different arrays are
used for immediate mode, vertex arrays, display lists, etc.  Changing
from one to another requires updating derived/driver array state.

Before, we indirectly specifid the arrays with the gl_draw_method values.
Now we just directly specify the arrays instead.  This is simpler and
will allow a subsequent display list optimization.

In the future, it might make sense to get rid of ctx->Array._DrawArrays
entirely and just pass the arrays as another parameter to
vbo_context::draw_prims().

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul d9894ede02 vbo: s/[0]/[VERT_ATTRIB_POS]/ in recalculate_input_bindings()
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul 48a6ab472a vbo: add new VBO_ATTRIBS_ masks to vbo_attrib.h
These will be used in a later patch.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul 41cd3ee5a2 vbo: s/VBO_ATTRIB_INDEX/VBO_ATTRIB_COLOR_INDEX/
To match the VERT_ATTRIB_COLOR_INDEX name.
Give a name to the previously anonymous enum of VBO_ATTRIB_x values.
Update the comment on the enum.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul 425da3bbfc vbo: minor clean-ups in vbo_exec.h
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul d631ea3a23 vbo: s/_API_NOOP_H/VBO_NOOP_H/ in vbo_noop.h
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul 094a80db4c vbo: whitespace/formatting fixes in vbo_exec.h
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul b080fc6199 vbo: move, rename vp_mode enums, get_program_mode() function
Instead of NONE/ARB use FF/SHADER.  Move the enum declaration to
vbo_private.h where it's used.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Brian Paul 35e0ff5bd5 vbo: s/cl/array/ in vbo_context.c
I think 'cl' used to mean client array.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
2018-01-29 08:35:14 -07:00
Tapani Pälli d0343bef66 nir: mark unused space in packed_tex_data
This change cleans following scary warnings in valgrind output
when disk cache is being written:

   ==6532== Uninitialised byte(s) found during client check request
   ==6532==    at 0x14423FAD: blob_write_bytes (blob.c:152)
   ==6532==    by 0x144240FB: blob_write_uint32 (blob.c:194)
   ==6532==    by 0x144001A5: write_tex (nir_serialize.c:613)

and later (loads of):

   ==6532== Use of uninitialised value of size 8
   ==6532==    at 0x62FCD9E: crc32_z (in /usr/lib64/libz.so.1.2.11)
   ==6532==    by 0x13F65014: util_hash_crc32 (crc32.c:127)
   ==6532==    by 0x13F5DABA: cache_put (disk_cache.c:947)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 08:11:22 +02:00
Tapani Pälli b99c88037b i965: fix disk_cache leak when destroying context
==2780== 1,024 bytes in 1 blocks are possibly lost in loss record 180 of 205
   ==2780==    at 0x4C31A1E: calloc (vg_replace_malloc.c:711)
   ==2780==    by 0x13F6467E: util_queue_init (u_queue.c:309)
   ==2780==    by 0x13F5C9F6: disk_cache_create (disk_cache.c:369)
   ==2780==    by 0x13F05406: brw_disk_cache_init (brw_disk_cache.c:428)
   ==2780==    by 0x13F01E78: brwCreateContext (brw_context.c:1068)

Fixes: 1a61a8b9a7 ("i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is false")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2018-01-29 08:11:14 +02:00
Tapani Pälli 28db950b51 i965: fix prog_data leak in brw_disk_cache
==25481== 576 bytes in 1 blocks are definitely lost in loss record 179 of 208
   ==25481==    at 0x4C2FB6B: malloc (vg_replace_malloc.c:299)
   ==25481==    by 0x1404E2CC: ralloc_size (ralloc.c:121)
   ==25481==    by 0x14119F82: read_and_upload (brw_disk_cache.c:176)
   ==25481==    by 0x1411A5C9: brw_disk_cache_upload_program (brw_disk_cache.c:271)
   ==25481==    by 0x1412FCA4: brw_upload_wm_prog (brw_wm.c:597)

Fixes: 516d50db31 ("i965: add initial implementation of on disk shader cache")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 08:11:03 +02:00
Timothy Arceri 9afc38c799 ac: fix indentation
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-29 11:14:23 +11:00
Timothy Arceri 03086f86ae ac: remove unused nir2llvmtype()
The last use of this was removed in the previous patch.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-29 11:14:23 +11:00
Timothy Arceri fa29a9625e ac: fix gs load inputs type
This fixes the scenario where the input is a struct. With this
the Unreal engines Elemental demo now works on radeonsi.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-29 11:14:23 +11:00
Kai Wasserbäch 0aba967328 ac/nir: call glsl_get_sampler_dim() only once where possible
Changes since v1:
  * Rebased on top of e68150de26 and
    82adf53308.

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2018-01-29 10:47:31 +11:00
Dave Airlie 2af66ba7e7 docs/features: add r600 ARB_query_buffer_object support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-29 05:42:34 +10:00
Dave Airlie 1c9ea24a19 r600: add ARB_query_buffer_object support
This uses a different shader than radeonsi, as we can't address non-256
aligned ssbos, which the radeonsi code does. This passes some extra
offsets into the shader.

It also contains a set of u64 instruction implementation that may
or may not be complete (at least the u64div is definitely not something
that works outside this use-case). If r600 grows 64-bit integers,
it will use the GLSL lowering for divmod.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-29 05:42:28 +10:00
Dave Airlie a7ec366e50 r600/shader: refactor mul hi/lo instruction emission
This just makes it a bit simpler for cayman vs eg

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-29 05:42:17 +10:00
Dave Airlie e0e23ea69c r600/eg: construct proper rat mask for image/buffers.
If the images/buffer bindings had a gap, this produced the wrong values,
this should fix that to generate the correct rat mask for mixes of
images/buffers/cbs.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-29 05:41:58 +10:00
Jon Turney 4a0bab1d7f meson: libdrm shouldn't appear in Requires.private: if it wasn't found
Otherwise, using pkg-config to retrieve flags will fail, e.g.

$ pkg-config gl --cflags
Package libdrm was not found in the pkg-config search path.
Perhaps you should add the directory containing `libdrm.pc'
to the PKG_CONFIG_PATH environment variable
Package 'libdrm', required by 'gl', not found

Fixes: 3218056e0e ("meson: Build i965 and dri stack")

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
2018-01-27 18:13:18 +00:00
Eric Anholt e5a81ac704 broadcom/vc5: Don't forget to get the BO offset when opening a dmabuf.
Fixes black display in DRI due to storing to 0x00000000.
2018-01-27 19:40:14 +11:00
Eric Anholt 314e9ee6c4 broadcom/vc5: Enable the driver on V3D 4.2.
The changes in 4.2 haven't impacted any of our CL or state struct entries
that I can see, so I haven't enabled custom compile for doing 4.2 instead
of 4.1.
2018-01-27 19:39:56 +11:00
Eric Anholt 71c7e9bea1 broadcom/vc5: Enable CLIF dumping of V3D 4.2. 2018-01-27 19:04:21 +11:00
Eric Anholt 91f899cbc1 broadcom/vc5: Update the compiler for V3D 4.2. 2018-01-27 19:04:21 +11:00
Eric Anholt f2e41daac5 broadcom/vc5: Update QPU instruction pack/unpack for v4.2.
After the 4.1 spec, 4.2 retroactively renamed patchid to barrierid because
it's used for other barriers in compute.
2018-01-27 19:03:55 +11:00
Eric Anholt 96d3e8f134 broadcom/vc5: Add XML for V3D 4.2. 2018-01-27 18:57:58 +11:00
Eric Anholt b026063b16 broadcom/vc5: Fix a race between XML codegen build and CLIF build. 2018-01-27 18:57:58 +11:00