Commit Graph

76771 Commits

Author SHA1 Message Date
Jason Ekstrand c643e9cea8 anv/state: Allow levelCount to be 0
This can happen if the client is creating an image view of a textureable
surface and they only ever intend to render to that view.
2015-12-16 17:34:57 -08:00
Samuel Pitoiset aeee7f2a4d nv50,nvc0: free memory allocated by performance metrics
The destroy_query() helper was actually never called. This fixes
a memory leak while monitoring performance metrics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
2015-12-16 23:03:08 +01:00
Samuel Pitoiset 9aca60bfb0 nvc0: free memory allocated by the prog which reads MP perf counters
This fixes a long time ago memory leak (even before all my query
related changes).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2015-12-16 22:00:57 +01:00
Samuel Pitoiset 8022c7480e nvc0: fix metric-achieved_occupancy calculation on Kepler
The maximum number of resident warps per multiprocessor is 64 on
Kepler instead of 48 on Fermi.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2015-12-16 22:00:57 +01:00
Christian König a87a1420d6 st/va: remove fence handling v3
It's nonsense to drain the pipeline like this.

v2: keep the drain for DMA-buf exports.
v3: flush before the export and after compositing and add TODO comment.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
2015-12-16 21:13:42 +01:00
Neil Roberts 61cdb7665f Revert "i965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals"
This reverts commit 839793680f.

The patch was breaking DRI3 because driGLFormatToImageFormat does not
handle MESA_FORMAT_B8G8R8X8_SRGB which ended up making it fail to
create the renderbuffer and it would later crash. It's not trivial to
add this format because there is no __DRI_IMAGE_FORMAT nor
__DRI_IMAGE_FOURCC define for the format either. I'm not sure how
difficult adding this would be and whether adding a new format would
require some sort of new version for DRI. Seeing as this might take a
while to fix I think it makes sense to just revert the patch in the
meantime in order to avoid regressing master.

It is also not handled in intel_gles3_srgb_workaround and there may be
other cases where it breaks.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93388
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-12-16 17:35:33 +00:00
Neil Roberts 8c5310da9d i965: Fix crash when calling glViewport with no surface bound
If EGL_KHR_surfaceless_context is used then glViewport can be called
with NULL for the draw and read surfaces. This was previously causing
a crash because the i965 driver tries to use this point to invalidate
the surfaces and it was derferencing the NULL pointer.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93257
Cc: Nanley Chery <nanley.g.chery@intel.com>
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Tested-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2015-12-16 16:39:29 +00:00
Neil Roberts 4c7c9e4602 mesa/blit: Don't require the same format for mulitisample blits
Previously the GL spec required that whenever glBlitFramebuffer is
used with either buffer being multisampled, the internal formats must
match. However the GL 4.4 spec was later changed to remove this
restriction. In the section entitled “Changes in the released
Specification of July 22, 2013” it says:

“Relax BlitFramebuffer in section 18.3.1 so that format conversion can
 take place during multisample blits, since drivers already allow this
 and some apps depend on it.”

If most drivers already allowed this in earlier versions I think it's
safe to assume that this is a spec bug and it should also be allowed
in all versions.

This patch just removes the restriction on desktop GL. For GLES there
are conformance tests that assert the previous behaviour so it is
probably safer to leave it in.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92706
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-12-16 16:20:36 +00:00
Julien Isorce 89eb342def st/va: retrieve size from the temporary img variable
"image" is not ready yet since it will be set at
the end of the function by: *image = *img;

Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Reviewed-by: Christian K<C3><B6>nig <christian.koenig@amd.com>
2015-12-16 14:12:31 +00:00
Roland Scheidegger 8e195a6251 draw: handle edge flags in llvm path
We just ignored them altogether. While this feature is rather old-fashioned
supporting it is actually rather trivial.
This fixes the associated piglit tests (2 gl-1.0-edgeflag, 2 gl-2.0-edgeflag
and all (7) of point-vertex-id).

v2: comment fixes, and make the use of the edgeflag in clipmask consistent
with when it's actually there (should be impossible to hit a case where the
difference would actually matter but still...)

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-16 03:55:25 +01:00
Roland Scheidegger 13c0b1c780 draw: don't set start_instance and instance id for pt emit
This just adds confusion, these parameters are used when fetching vertices
by translate, but certainly not when emitting hw vertices for drivers, they
make no sense there (setting them has no consequences otherwise since there
won't be any elements with instance_divisor set). So just set them to 0 (the
draw_pipe_vbuf code for emitting vertices when the draw pipeline is run
already does exactly that).
Also while here do some whitespace cleanup.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-16 03:55:14 +01:00
Jason Ekstrand b2fe8b4673 nir/spirv: Add a missing break statement 2015-12-15 17:24:18 -08:00
Jason Ekstrand 1c51d91bfe anv/pipeline: Allow the user to pass a null MultisampleCreateInfo
According to section 5.2 of the Vulkan spec, this is allowed for color-only
rendering pipelines.
2015-12-15 16:26:10 -08:00
Jason Ekstrand d61ff1ed08 anv/descriptor_set: Initialize immutable_samplers to NULL
Previously this wasn't a problem.  However, with the new API update,
descriptor sets can now be sparse so the client doesn't have to provide an
entry for every binding.  This means that it's possible for a binding to be
uninitialized other than the memset.  In that case, we want to have a null
array of immutable samplers.
2015-12-15 16:24:22 -08:00
Jason Ekstrand d7cb1634d2 nir/lower_system_values: Refactor and use the builder.
Now that we have a helper in the builder for system values and a helper in
core NIR to get the intrinsic opcode, there's really no point in having
things split out into a helper function.  This commit "modernizes" this
pass to use helpers better and look more like newer passes.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-12-15 14:12:31 -08:00
Jason Ekstrand f6910f072a nir/builder: Add a load_system_value helper
While we're at it, go ahead and make nir_lower_clip use it.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-12-15 14:12:31 -08:00
Jason Ekstrand ca5be008bc nir/lower_system_values: Stop supporting non-SSA
The one user of this (i965) only ever calls it while in SSA form.

Reviewed-by: Eric Anholt <eric@anholt.net>
2015-12-15 14:12:31 -08:00
Samuel Pitoiset 276837cbe4 nvc0: remove old comment related to metric calculations
I forgot to remove it when I refactored all performance metrics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2015-12-15 22:49:37 +01:00
Eric Anholt 3858722740 vc4: Add support for dumping executed commands to a file.
The VC4_DEBUG=cl,qpu is nice and all, but I want to be able to get more
detailed dumps, and to replay the same exact commands in simulation.  For
that I need a dump with all of the VBOs, shaders, shader recs, etc.  This
dump can be parsed by vc4-gpu-tools.

For now this is only doable from simulator mode, because otherwise we
don't have access to the RCL contents generated by the kernel.
2015-12-15 12:05:48 -08:00
Eric Anholt 07570edb98 vc4: Import updated vc4_drm.h with hang state. 2015-12-15 12:02:54 -08:00
Eric Anholt c5b886b028 vc4: Only update vc4->msaa when the framebuffer changes.
Any update here should have been the same as in
vc4_set_framebuffer_state(), except for the point where vc4_blit.c
temporarily sets different state for its different buffers.
2015-12-15 12:02:53 -08:00
Eric Anholt f2cf2a63f1 vc4: Don't consider nr_samples==1 surfaces to be MSAA.
This is apparently a weirdness of gallium -- nr_samples==1 is occasionally
used and means the same thing as nr_samples==0.  Fixes a bunch of
ARB_framebuffer_srgb blit cases in piglit.
2015-12-15 12:02:53 -08:00
Eric Anholt da92f16c50 vc4: Fix min() wrapper definition for the simulator's kernel code. 2015-12-15 12:02:53 -08:00
Eric Anholt 02bcb443ee vc4: Warn instead of abort()ing on exec ioctl failures.
It's really harsh to abort() the X Server because of a momentary failure
(particularly -ENOMEM).  I don't see a way to pass an -ENOMEM up the stack
from here, but we can at least log to stderr before proceeding on.

Cc: "11.1" <mesa-stable@lists.freedesktop.org>
2015-12-15 12:02:44 -08:00
Jason Ekstrand 28c4ef9d6c anv/device: Bump the size of the instruction block pool
Some CTS test shaders were failing to compile.  At some point soon, we
really need to make a real pipeline cache and stop using a block pool for
this.
2015-12-15 11:49:28 -08:00
Jason Ekstrand 306abbead3 anv/pipeline: Properly set IncludeVertexHandles in 3DSTATE_GS 2015-12-15 11:37:18 -08:00
Jason Ekstrand 2d4b7eda23 nir/spirv: Add support for more CS intrinsics 2015-12-15 10:20:23 -08:00
Jason Ekstrand 1035108a7f nir/lower_system_values: Add support for computed builtins.
In particular, this commit adds support for computing gl_GlobalInvocationID
and gl_LocalInvocationIndex from other intrinsics.
2015-12-15 10:20:23 -08:00
Jason Ekstrand 630b9528b3 shader_enums: Add enums for gl_GlobalInvocationID and gl_LocalInvocationIndex 2015-12-15 10:20:23 -08:00
Jason Ekstrand 7ebd84fa4b nir/lower_system_values: Refactor and use the builder.
Now that we have a helper in the builder for system values and a helper in
core NIR to get the intrinsic opcode, there's really no point in having
things split out into a helper function.  This commit "modernizes" this
pass to use helpers better and look more like newer passes.
2015-12-15 10:20:23 -08:00
Jason Ekstrand c26e889a44 nir/builder: Add a load_system_value helper
While we're at it, go ahead and make nir_lower_clip use it.

Cc: Rob Clark <robclark@gmail.com>
2015-12-15 10:20:23 -08:00
Jason Ekstrand de67456d6d nir/lower_system_values: Stop supporting non-SSA
The one user of this (i965) only ever calls it while in SSA form.
2015-12-15 10:20:23 -08:00
Andreas Boll a2140b0571 docs: Replace sourceforge logo with a text link
Fixes the following Lintian (Debian package checker) error:

privacy-breach-logo

  usr/share/doc/mesa-common-dev/contents.html
    (http://sourceforge.net/sflogo.php?group_id=3&amp;type=1)
  usr/share/doc/mesa-common-dev/thanks.html
    (http://sourceforge.net/sflogo.php?group_id=3&amp;type=1)

The extended description of this tag is:

    This package creates a potential privacy breach by fetching a logo
at runtime.

    Before using a local copy you should check that the logo is suitable
for main. You can get help with determining this by posting a link to
the logo and a copy of, or a link to, the logo copyright and license
information to the debian-legal mailing list.

    Please replace any scripts, images, or other remote resources with
non-remote resources. It is preferable to replace them with text and
links but local copies of the remote resources are also acceptable as
long as they don't also make calls to remote services. Please ensure
that the remote resources are suitable for Debian main before making
local copies of them.

    Severity: serious, Certainty: possible

    Check: files, Type: binary, udeb

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-15 17:57:25 +01:00
Chad Versace 64f0ee73e0 isl: Add func isl_surf_get_image_offset_sa
The function calculates the offset to a subimage within the surface, in
units of surface samples.

All unit tests pass with `make check`. (Admittedly, though, there are
too few unit tests).
2015-12-15 08:46:09 -08:00
Chad Versace 53504b884e isl: Fix calculation of array pitch for layout GEN4_2D
The height of the miptree's right half was not large enough.

Found by `make check` in test_isl_surf_get_offset, which is added in the
next commit.
2015-12-15 08:46:09 -08:00
Chad Versace f7e36f9f66 isl: Move it a standalone directory
The plan all along was to eventualyl move isl out of the Vulkan
directory, because I intended i965 and anvil to share it.

A small problem I encountered when attempting to write unit tests for
isl precipitated the move.  I discovered that it's easier to get isl
unit tests to build if I remove the extra, unneeded dependencies
injected by src/vulkan/Makefile.am. And the easiest way to remove those
unneeded dependencies is to move isl out of src/vulkan. (Unit tests come
in subsequent commits).
2015-12-15 08:45:49 -08:00
Nicolai Hähnle c8d9d289ff radeonsi: fix perfcounter selection for SI_PC_MULTI_BLOCK layouts
The incorrectly computed register count caused lockups.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-12-15 11:23:40 -05:00
Nicolai Hähnle 149d049676 gallium/radeon: remove unnecessary test in r600_pc_query_add_result
This test is a left-over of the initial development. It is unneeded and
misleading, so let's get rid of it.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-12-15 11:23:40 -05:00
Nicolai Hähnle 819543adb4 mesa/main: use BITSET_FOREACH_SET in perf_monitor_result_size
This should make the code both faster and slightly clearer.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2015-12-15 11:23:40 -05:00
Emil Velikov 9c0773958e docs: add news item and link release notes for 11.1.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2015-12-15 15:07:03 +00:00
Emil Velikov b8394ef3df docs: add sha256 checksums for 11.0.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 525f3c2c28cd083b37e1f6a27f503af1c4781141)
2015-12-15 15:07:02 +00:00
Emil Velikov 5497e119a5 docs: Update 11.1.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 5a616125acf0ac043d2d44b7a8e804739d55014e)
2015-12-15 15:07:02 +00:00
Rob Clark e677b3047b freedreno/a4xx: fix fragcoord.z + fragdepth
It seems like disabling earlyz on a4xx also, by defaults, disables
fragcoord.z to the FS.  For frag shaders that both read fragcoord(.z)
and write fragdepth, we need to set some extra bits to prevent a
lockup.

This lets us get rid of the hack of disabling fragcoord.z (which
prevented 0ad from lockups, but resulted in rendering corruption).  Also
fixes fbo-depth-sample-compare.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-12-15 09:40:54 -05:00
Rob Clark cad0920d11 freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-12-15 09:39:10 -05:00
Rob Clark 249b2be3bc freedreno/ir3/cmdline: don't dump nir by default
By default we only want the disasm dumped, which we get anyways.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-12-15 09:39:10 -05:00
Christian König 10b7a7c344 st/va: remove nonesense HEVC picture id handling
The picture id in this case is a VA-API surface handle, checking
for a certain value can't be correct.

Signed-off-by: Christian König <christian.koenig@amd.com>
2015-12-15 11:25:02 +01:00
Chris Forbes af5ca43f26 i965: Allocate URB space for HS and DS stages when required.
v2: (by Ken, incorporating feedback from Matt Turner):
- Rewrite the push constant allocation code to be clearer.
- Only apply the minimum VS entries workaround on Gen 8.

v3: (by Ken)
- Fix a bug in v2 where we failed to allocate the full push constant
  space when the number of enabled stages didn't divide the available
  push constant space evenly.  (Any left over space is now allocated
  to the PS, as it was in v1.)
- Fix an off-by-one error in v2's number of enabled stages calculation.
- Use DIV_ROUND_UP for nicer formatting.
- Line wrapping fixes.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-15 02:16:14 -08:00
Jason Ekstrand 8224571ef8 vec4/generator: Actually pass the sampler into generate_tex
This is an artifact of the way the separate samplers/textures series ended
up getting sent out and rebased.  This should fix a number of CTS tests
involving geometry shaders.
2015-12-14 21:13:52 -08:00
Jordan Justen 7edcc59a7b anv: Rename gs_vec4 to gs_kernel
The code generated may be vec4 or simd8 depending on how we start the
compiler.

To run the GS in SIMD8, set the INTEL_SCALAR_GS environment variable.
This was added in:

    commit 36fd653817
    Author: Kenneth Graunke <kenneth@whitecape.org>
    Date:   Wed Mar 11 23:14:31 2015 -0700

        i965: Add scalar geometry shader support.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-14 18:23:14 -08:00
Jordan Justen a3c5c339a8 nir/spirv_to_nir: Use a minimum of 1 for GS invocations
glslang is giving us 0, which causes the SIMD8 GS compile to hit an
assert.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-14 18:23:14 -08:00