Commit Graph

59682 Commits

Author SHA1 Message Date
Alex Deucher 469b42ee21 radeonsi: add Hawaii pci ids
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15 08:51:20 -05:00
Alex Deucher f5778f152b radeonsi: add support for Hawaii asics (v2)
Update additional register fields.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15 08:51:09 -05:00
Vinson Lee 78fc159d68 i965: Initialize schedule_node::delay.
Fixes "Uninitialized scalar field" defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-14 22:36:26 -08:00
Alexander von Gluck IV f7ce1d772d haiku/swrast: Inherit gl_config, fix flush
* Inherit gl_context so we always have access to it
* Thanks curro for the idea.
* Last Haiku cannidate for 10.0.0

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-11-14 12:33:03 -06:00
Roland Scheidegger 473cb3fe4a llvmpipe: (trivial) fix more fallout from the setup cleanup.
Oops... Should have done some more testing.
2013-11-14 15:49:42 +00:00
Roland Scheidegger 5190c16a04 llvmpipe: (trivial) fix misplaced bld context assignment.
Should fix polygon offset crashes...
2013-11-14 14:44:15 +00:00
José Fonseca a29e40a423 gallivm: Compile flag to debug TGSI execution through printfs.
It is similar to tgsi_exec.c's DEBUG_EXECUTION compile flag.

I had prototyped this for a while while debugging an issue, but finally
cleaned this up and added a few more bells and whistles.

v2: Use '$' as marker; better output. Thanks to Brian, Zack and Roland
reviews.

Here is a sample output.

    CONST[0].x =  0.00625000009 0.00625000009 0.00625000009 0.00625000009
    CONST[0].y =  -0.00714285718 -0.00714285718 -0.00714285718 -0.00714285718
    CONST[0].z =  -1 -1 -1 -1
    CONST[0].w =  1 1 1 1
    IN[0].x =  143.5 175.5 175.5 143.5
    IN[0].y =  123.5 123.5 155.5 155.5
    IN[0].z =  0 0 0 0
    IN[0].w =  1 1 1 1
$   1: RCP TEMP[0].w, IN[0].wwww
    TEMP[0].w =  1 1 1 1
$   2: MAD TEMP[0].xy, IN[0], CONST[0], CONST[0].zwzw
    TEMP[0].x =  -0.103124976 0.0968750715 0.0968750715 -0.103124976
    TEMP[0].y =  0.117857158 0.117857158 -0.110714316 -0.110714316
$   3: MUL OUT[0].xy, TEMP[0], TEMP[0].wwww
    OUT[0].x =  -0.103124976 0.0968750715 0.0968750715 -0.103124976
    OUT[0].y =  0.117857158 0.117857158 -0.110714316 -0.110714316
$   4: MUL OUT[0].z, IN[0].zzzz, TEMP[0].wwww
    OUT[0].z =  0 0 0 0
$   5: MOV OUT[0].w, TEMP[0]
    OUT[0].w =  1 1 1 1
$   6: END
    OUT[0].x =  -0.103124976 0.0968750715 0.0968750715 -0.103124976
    OUT[0].y =  0.117857158 0.117857158 -0.110714316 -0.110714316
    OUT[0].z =  0 0 0 0
    OUT[0].w =  1 1 1 1
2013-11-14 14:04:28 +00:00
Roland Scheidegger 673d5391a2 softpipe: (trivial) fix debug code
The debug printfs wouldn't actually compile when enabled, so kill them off
and insert some new one in another place, and make sure it keeps compiling
by enclosing it in a if-0 clause.
2013-11-14 12:24:55 +00:00
Roland Scheidegger 2dd693412a llvmpipe: clean up state setup code a bit
In particular get rid of home-grown vector helpers which didn't add much.
And while here fix formatting a bit. No functional change.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-11-14 12:24:55 +00:00
Roland Scheidegger 754319490f gallivm,llvmpipe: fix float->srgb conversion to handle NaNs
d3d10 requires us to convert NaNs to zero for any float->int conversion.
We don't really do that but mostly seems to work. In particular I suspect the
very common float->unorm8 path only really passes because it relies on sse2
pack intrinsics which just happen to work by luck for NaNs (float->int
conversion in hw gives integer indeterminate value, which just happens to be
-0x80000000 hence gets converted to zero in the end after pack intrinsics).
However, float->srgb didn't get so lucky, because we need to clamp before
blending and clamping resulted in NaN behavior being undefined (and actually
got converted to 1.0 by clamping with sse2). Fix this by using a zero/one clamp
with defined nan behavior as we can handle the NaN for free this way.
I suspect there's more bugs lurking in this area (e.g. converting floats to
snorm) as we don't really use defined NaN behavior everywhere but this seems
to be good enough.
While here respecify nan behavior modes a bit, in particular the return_second
mode didn't really do what we wanted. From the caller's perspective, we really
wanted to say we need the non-nan result, but we already know the second arg
isn't a NaN. So we use this now instead, which means that cpu architectures
which actually implement min/max by always returning non-nan (that is adhering
to ieee754-2008 rules) don't need to bend over backwards for nothing.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-11-14 12:24:55 +00:00
Ian Romanick a15a19f0d1 dri: Change value param to unsigned
This silences some compiler warnings in i915 and i965.  See also
75982a5.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-13 14:49:27 -08:00
Ian Romanick cb6182bdfa i965: Use drm_intel_get_aperture_sizes instead of hard-coded 2GiB
Systems with little physical memory installed will report less than
2GiB, and some systems may (hypothetically?) have a larger address space
for the GPU.  My IVB still reports 1534.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-13 14:49:27 -08:00
Ian Romanick 9fe108db09 i915: Use drm_intel_get_aperture_sizes instead of drmAgpSize
Send the zombie back to the grave before it infects the townsfolk.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-13 14:49:26 -08:00
Alexander Monakov 279e8d2641 i965: implement blit path for PBO glDrawPixels
This patch implements accelerated path for glDrawPixels from a PBO in
i965. The code follows what intel_pixel_read, intel_pixel_copy,
intel_pixel_bitmap and intel_tex_image are doing. Piglit quick.tests
show no regressions. In my testing on IVB, performance improvement is
huge (about 30x, didn't measure exactly) since generic path goes via
_mesa_unpack_color_span_float, memcpy, extract_float_rgba.

Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-11-13 12:20:59 -08:00
Brian Paul 19c2f40649 docs: fill in md5 checksums for 9.2.3 release 2013-11-13 10:06:23 -07:00
Brian Paul c093cd3984 docs: fix 9.2.2 -> 9.2.3 typos 2013-11-13 10:03:35 -07:00
Alexander von Gluck IV df91144a6d haiku: add swrast driver
* This is pretty small and upkeep should be minimal.
* Currently fully working.
* Cannidate for 10.0.0 branch

Acked-by: Brian Paul <brianp@vmware.com>
2013-11-13 10:41:10 -06:00
Carl Worth 9976a176ae docs: Import 9.2.3 release notes, add news item. 2013-11-13 07:32:47 -08:00
Kristian Høgsberg e048953145 dri: Remove redundant createNewContext function from __DRIimageDriverExtension
createContextAttribs is a superset of what createNewContext provides.
Also remove the function typedef, since createNewContext is deprecated
and no longer used in  multiple interfaces.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 16:08:17 -08:00
Kristian Høgsberg 68bb26bead wayland: Use __DRIimage based getBuffers implementation when available
This lets us allocate color buffers as __DRIimages and pass them into
the driver instead of having to create a __DRIbuffer with the flink
that requires.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 16:08:17 -08:00
Kristian Høgsberg 04e3ef00db gbm: Add support for __DRIimage based getBuffers when available
This lets us allocate color buffers as __DRIimages and pass them into
the driver instead of having to create a __DRIbuffer with the flink
that requires.

With this patch, we can now run gbm on render-nodes.  A render-node is a
drm device that doesn't support modesetting and all the legacy DRI ioctls.
flink is also not supported, but now that gbm doesn't need flink, we can
run piglit on head-less gbm or head-less GPGPU.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 16:01:40 -08:00
Ander Conselvan de Oliveira 5ba6be2617 dri/i915, dri/i965: Fix support for planar images
Planar images have format __DRI_IMAGE_FORMAT_NONE, but the patch that
moved the conversion from dri_format to the mesa format made it
impossible to allocate a image with that format.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 15:57:39 -08:00
Eric Anholt e9daead784 i965/fs: Try a different pre-scheduling heuristic if the first spills.
Since LIFO fails on some shaders in one particular way, and non-LIFO
systematically fails in another way on different kinds of shaders, try
them both, and pick whichever one successfully register allocates first.
Slightly prefer non-LIFO in case we produce extra dependencies in register
allocation, since it should start out with fewer stalls than LIFO.

This is madness, but I haven't come up with another way to get unigine
tropics to not spill while keeping other programs from not spilling and
retaining the non-unigine performance wins from texture-grf.

total instructions in shared programs: 1626728 -> 1626288 (-0.03%)
instructions in affected programs:     1015 -> 575 (-43.35%)
GAINED:                                50
LOST:                                  0

Improves Unigine Tropics performance by 14.5257% +/- 0.241838% (n=38)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70445
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-11-12 15:06:28 -08:00
Eric Anholt fbd8303a94 i965/fs: Do instruction pre-scheduling just before register allocation.
Long ago, the HW_REG usage in assign_curb/urb_setup() were scheduling
barriers, so we had to run scheduler before them in order for it to be
able to do basically anything.  Now that that's fixed, we can delay the
scheduling until we go to allocate (which will make the next change less
scary).

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-11-12 15:06:21 -08:00
Eric Anholt f72a0d99fe i965/fs: Ignore actual latency pre-reg-alloc.
We care about depth-until-program-end, as a proxy for "make sure I
schedule those early instructions that open up the other things that can
make progress while keeping register pressure low", not actual latency
(since we're relying on the post-register-alloc scheduling to actually
schedule for the hardware).

total instructions in shared programs: 1609931 -> 1609931 (0.00%)
instructions in affected programs:     0 -> 0
GAINED:                                55
LOST:                                  43

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-11-12 15:06:00 -08:00
Eric Anholt 7c90947a0b i965/fs: Fix message setup for SIMD8 spills.
In the SIMD16 spilling changes, I replaced a "1" in the spill path with
"mlen", but obviously it wasn't mlen before because spills have the g0
header along with the payload. The interface I was trying to use was
asking for how many physical regs we're writing, so we're looking for "1"
or "2".

I'm guessing this actually passed piglit because the high 8 bits of the
execution mask in SIMD8 mode are all 0s.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-12 15:05:07 -08:00
Eric Anholt bc0e3bb4d0 i965/fs: Prefer things we know reduce reg pressure when pre-scheduling.
Previously, the best thing we had was to schedule the things unblocked by
the last chosen instruction, on the hope that it would be consuming two
values at the end of their live intervals while only producing one new
value.  But that's just a guess, and we can do counting of usage of
registers to know when an instruction would (almost surely) reduce
register pressure.

The only failure mode I know of in this new dominant heuristic is that
inside of a loop when scheduling the iterator (for example), choosing the
last use of the iterator doesn't actually reduce the live interval of the
iterator.  But it doesn't seem to matter in shader-db:

total instructions in shared programs: 1618700 -> 1618700 (0.00%)
instructions in affected programs:     0 -> 0
GAINED:                                13
LOST:                                  0

Note: The new functions are made virtual because I expect we'll soon lift
the pre-regalloc scheduling heuristic over to the vec4 backend.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-11-12 15:04:32 -08:00
Eric Anholt 9b3e1592c2 i965: Fix undefined value usage in ABO setup.
Fixes a compiler warning.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-11-12 15:04:28 -08:00
Eric Anholt 8bd45a7e7e i965: Add a warning if something ever hits a bug I noticed.
We'd have to map the VBO and rewrite things to a lower stride to fix it.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-11-12 15:04:25 -08:00
Ben Skeggs c944bde5be nvc0: release 3d bufctx after drawing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-11-13 08:09:29 +10:00
Francisco Jerez 99d447cc5d clover: Fix the const variant of adaptor_range::end to deal with mismatching range sizes.
Fixes infinite loop in find_grid_optimal_factor() in cases where the
user specifies a grid size with less dimensions than the device
supports.

Reported-by: Tom Stellard <thomas.stellard@amd.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 11:52:47 -08:00
Roland Scheidegger 50f19e3a66 draw,llvmpipe: use exponent manipulation instead of exp2 for polygon offset
Since we explicitly require a integer input we should avoid using exp2 math
(even if we were using optimized versions), which turns the exp2 into a int
sub (plus some casts).

v2: fix bogus uint (needs to be int) math spotted by Matthew, fix comments

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-11-12 19:08:58 +00:00
Cyril Brulebois 2d77e4f922 gallium: fix build on GNU/Hurd due to missing PIPE_OS_HURD detection
Thanks to Pino Toscano.  Patch from Debian package.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-11-12 11:57:21 -07:00
Petr Sebor f2b844f59d meta: enable vertex attributes in the context of the newly created array object
Otherwise, the function would enable generic vertex attributes 0
and 1 of the array object it does not own. This was causing crashes
in Euro Truck Simulator 2, since the incorrectly enabled generic
attribute 0 in the foreign context got precedence before vertex
position attribute at later time, leading to NULL pointer dereference.

Cc: "9.2" <mesa-stable@lists.freedesktop.org>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>

Signed-off-by: Petr Sebor <petr@scssoft.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-11-12 11:56:30 -07:00
Brian Paul 76317355bd mesa: 80-column wrapping, remove trailing whitespace in arrayobj.c 2013-11-12 11:05:25 -07:00
Brian Paul c8f3722129 mesa: add comment for struct gl_vertex_buffer_binding 2013-11-12 11:05:25 -07:00
Brian Paul ce193d4f01 mesa: call update_array_format() after error checking
We try to do all error checking before changing any GL state.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>

Jordan Justen <jordan.l.justen@intel.com>
2013-11-12 11:05:19 -07:00
Brian Paul 5f22f3207e mesa: use _mesa_is_bufferobj() helper in _mesa_vertex_attrib_address()
And use a regular if statment to slightly improve readability.

Jordan Justen <jordan.l.justen@intel.com>
2013-11-12 11:05:14 -07:00
Brian Paul e032abcb27 mesa: add const qualifiers to vertex array helper functions
Jordan Justen <jordan.l.justen@intel.com>
2013-11-12 11:05:04 -07:00
Ilia Mirkin 08122e151a nouveau/video: mark bitstream-level acceleration as unsupported
Adding a vl_mpeg-based helper didn't seem to work, as it produced data
that the card couldn't handle. (And I didn't investigate further.) This
makes the decoding functionality only accessible via XvMC and avoids
crashes when attempting to use VDPAU.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 10:11:41 +01:00
Ilia Mirkin e8d5d3409c nouveau/video: don't try on nv3x
It doesn't work, I don't know why, but no point in hanging people's
displays until it gets figured out.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
2013-11-12 10:10:54 +01:00
Tom Stellard 594fa4a208 egl-static: Only export necessary symbols v3
This fixes a crash in glamor when mesa links against static LLVM.

v2:
  - Inline LINKER_SCRIPT variable

v3: Kai Wasserbäch
  - Fix out out-of-tree-builds

Tested-by: Kai Wasserbäch <kai@dev.carbon-project.or>
2013-11-11 17:21:35 -05:00
Tom Stellard cb080a10b6 configure.ac: Don't require shared LLVM when building OpenCL
This works now that pipe_*.so is no longer exporting LLVM symbols.

Tested-by: Kai Wasserbäch <kai@dev.carbon-project.or>
2013-11-11 17:21:35 -05:00
Tom Stellard 6d6c749215 pipe-loader: Only export necessary symbols v3
This makes it possible to use clover with statically linked LLVM.

v2:
  - Inline LINKER_SCRIPT variable

v3: Kai Wasserbäch
  - Fix out out-of-tree-builds

Tested-by: Kai Wasserbäch <kai@dev.carbon-project.or>
2013-11-11 17:21:34 -05:00
Tom Stellard a859131003 radeonsi/compute: Add Sea Islands support 2013-11-11 17:21:34 -05:00
Vincent Lejeune 88c8f19729 r600/llvm: Store inputs in function arguments 2013-11-11 23:14:42 +01:00
Rico Schüller 23afe71f44 tests: Fix make check for out of tree builds.
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Rico Schüller <kgbricola@web.de>
2013-11-11 14:06:17 -08:00
Anuj Phogat 348b91b7dc i965: Move #define's inside function as local variables
X_f, Y_f, Xp_f, Yp_f variables are used just inside
translate_dst_to_src().So, they can be defined just
as local variables.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-11-11 13:35:37 -08:00
Vinson Lee 227872571a i915, i965: Fix memory leak in intel_miptree_create_for_bo.
Fixes "Resource leak" defects reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
2013-11-11 13:11:07 -08:00
Brian Paul ab2da985b6 osmesa: assorted code clean-ups 2013-11-11 08:17:46 -07:00