Commit Graph

52593 Commits

Author SHA1 Message Date
Eric Anholt 628dfe9511 i965: Drop the old sw fallback for position array being disabled.
This code has been in the driver since the first commit.  I think it was
trying to stop rendering from happening with a disabled position array.  Core
mesa has since had changes to deal with disabled position arrays correctly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-08-28 11:43:04 -07:00
Eric Anholt 5e3c093ff8 i965: Drop support for forcing drawing through sw fallbacks.
It turns out it hasn't worked since at least 8.0.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-08-28 11:43:04 -07:00
Eric Anholt bfae8650ec i965: Move depth resolve for span fallbacks to a simpler place.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
2012-08-28 11:43:04 -07:00
Eric Anholt 707f242c4b i965: Drop manual hiz resolves in span rendering.
swrast uses MapRenderbuffer, which leads to intel_miptree_map, which does the
depth resolve.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
2012-08-28 11:43:04 -07:00
Michel Dänzer 70f9dbe298 radeon/llvm: Handle TGSI KIL opcode for SI.
Fixes piglit fp-kil and glBitmap() with radeonsi.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-08-28 20:27:23 +02:00
Michel Dänzer 16e42a5dd0 radeon/llvm: Basic support for SI EXEC register.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2012-08-28 20:26:50 +02:00
Michel Dänzer 6ca64393c9 radeonsi: Don't write to the PA_SC_RASTER_CONFIG register.
It should be initialized by the kernel as necessary.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-08-28 20:24:52 +02:00
Marek Olšák 999b7f6665 r600g: fix relative addressing on RS780 and RS880
They should be treated like RV670.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-28 18:27:03 +02:00
Andreas Boll 3e20605c16 docs/helpwanted: add radeonsi todo list
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-28 17:36:07 +02:00
Andreas Boll 17f09b664b configure.ac: add radeonsi to --with-gallium-drivers help string
the help string is used by ./configure --help

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2012-08-28 17:35:36 +02:00
José Fonseca bc8509b43b llvmpipe: Bump the maximum texture size (in pixels).
But cap the size in bytes, to avoid depleting the whole system memory,
with humongus textures.

Tested with max-texture-size piglit test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2012-08-28 15:18:43 +01:00
Vadim Girlin 6463eb013f u_vbuf: avoid unnecessary update of the vertex elements
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2012-08-28 18:01:13 +04:00
Matt Turner 971750e1cd egl: fix invalid flag detection for EGL_KHR_create_context
We want to check whether there are bits set outside of the valid flags.

Fixes piglit test egl-create-context-invalid-flag-gl

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-08-27 15:11:11 -07:00
Kenneth Graunke 77d675926a i965: Make VS programs obey the shader_precompile driconf option.
Now that it's on by default, we may as well make it obey the flag,
for consistency's sake if nothing else.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke 9ef710575b i965: Reenable the fragment shader precompile.
Precompiling the shader at link time often allows us to avoid compiling
it at the first use.  This moves the expensive compilation and
optimization process to game or level load time, rather than at draw
time, where we really can't avoid any cycles and don't want to risk
stalling the GPU.

The downside is that we have to guess the non-orthagonal state the
program will have set when it draws with the shader.  Previously, we
guessed wrong for nearly every shader, so it wasn't useful.  With the
recent SamplerUnits rework and this series, we've either eliminated
state or made smarter guesses, and usually get it right now.

In the L4D2 time demo, I now have 39 fragment shader recompiles and no
vertex shader recompiles.  Before this series and the SamplerUnits
rework, I had 206 fragment shader recompiles and 192 vertex shader
recompiles.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke 88b3850c27 i965: Set swizzle fields in the VS precompile program key.
This fixes a regression since 76d1301e8e8e50dc962601a9977bc52148798349:
I began setting SWIZZLE_XYZW for unused sampler units in the actual
program keys, since this matched the FS precompile behavior.  However,
the VS precompile was expecting zero, so that commit made essentially
every vertex shader (even those not using texturing) mismatch and need
to be recompiled.

Setting them in the VS precompile key solves the issue.  It also is an
improvement over our old behavior: previously we guessed that vertex
shaders didn't use any textures at all.  Now we actually look to see if
the VS had any sampler uniforms and guess based on that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke c20cb8d1f6 i965/vs: Add VS program key dumping to INTEL_DEBUG=perf.
Eric added support for WM key debugging.  This adds it for the VS.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke 85b24b0751 i965/fs: Assume shadow sampler swizzling is <X, X, X, 1>.
Our previous assumption, SWIZZLE_XYZW, was completely bogus for depth
textures.  There are no Y, Z, or W components.

DEPTH_TEXTURE_MODE has three options:
- GL_LUMINANCE: <X, X, X, 1>
- GL_INTENSITY: <X, X, X, X>
- GL_ALPHA:     <0, 0, 0, X>

The default value is GL_LUMINANCE, and most applications don't seem to
alter DEPTH_TEXTURE_MODE.  Make that our precompile guess.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke f3d0daf7ea i965: Index sampler program key data by linker-assigned index.
Now that most things are based on the linker-assigned index, it makes
sense to convert the arrays in the VS/WM program key as well.  It seems
silly to leave them indexed by texture unit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke ab17762c70 i965: Only set proj_attrib_mask for fixed function.
brw_wm_prog_key's proj_attrib_mask field is designed to enable an
optimization for fixed-function programs, letting us avoid projecting
attributes where the divisor is 1.0.

However, for shaders, this is not useful, and is pretty much impossible
to guess when building the FS precompile key.  Turning it off for
shaders should allow the precompile to work and not lose much.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Suggested-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke 6cc14c2493 i965: Don't set stats_wm in the WM program key on Gen6+.
It's only needed for Gen4/5 IZ lookup workarounds.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:40 -07:00
Kenneth Graunke b6b1fc1261 i965: Don't set vp_outputs_written in the WM program key on Gen6+.
It's only used by on pre-Sandybridge hardware.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:39 -07:00
Kenneth Graunke 87cdefed40 i965: Double the size of the state cache.
We probably want to do something more sophisticated here, but this at
least makes it through L4D2 without dumping the program cache.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-27 14:23:39 -07:00
Julien Cristau ac889b2410 glapi/glx: call __glEmptyImage if USE_XCB, not memcpy directly
We were stomping on the caller's buffer by ignoring their alignment
requests and other pixel store modes.  This patch makes the USE_XCB path match
the older one more closely.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52059

Signed-off-by: Julien Cristau <julien.cristau@logilab.fr>
Signed-off-by: Brian Paul <brianp@vmware.com>
2012-08-27 13:32:53 -06:00
Brian Paul f308c80490 gallium/util: implement tile code for PIPE_FORMAT_Z32_FLOAT
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-08-27 13:32:53 -06:00
Brian Paul a971476cc7 st/mesa: use fallback path for glCopyTexSubImage(GL_TEXTURE_1D_ARRAY)
Fixes many failing cases in piglit copyteximage test.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2012-08-27 13:32:53 -06:00
Chad Versace 88edbdf9f0 i965: Move hiz resolve to after renderbuffer resizing (v2)
Do all pre-draw hiz resolves *after* the renderbuffers are resized by
intel_prepare_render. Otherwise, we may resolve buffers that are
immediately discarded afterwards.

Fixes the assertion failure below when resizing windows in KDE and under
some unknown circumstance in Chrome OS:
    intel_resolve_map.c:46: intel_resolve_map_set: Assertion
    `(*tail)->need == need' failed.

Also, remove the comment that "resolves must occur [...] before setting up
any hardware state". That was true when resolves were implemented with
meta-ops, but no longer with blorp.

v2:
  - Keep brw_predraw_resolve_buffers in its current position, which is
    before any brw_context bits are modified. Instead, move the call to
    intel_prepare_render.

Note: This is a candiate for the 8.0 branch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52252
Reported-by: Lu Hua <huax.lu@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-08-27 07:48:28 -07:00
Chad Versace a2a7e640a4 i965: Remove redundant null check
intel_renderbuffer_resolve_hiz checks if rb->mt is null, so there is no
need for the caller to do so.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
2012-08-27 07:47:09 -07:00
Marek Olšák 7f0fcf17c3 r300g: implement TRUNC correctly
This fixes some integer division tests.
2012-08-27 14:35:18 +02:00
Michel Dänzer f402acdbe2 radeonsi: Use FP16 shader export format when necessary / possible.
Fixes piglit fbo-blending-formats.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-27 11:51:56 +02:00
Michel Dänzer 26c7139d2c radeonsi: Refactor initialization of shader export intrinsic arguments.
In preparation for extending this code, which would make it rather unwieldy in
its current place.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-27 11:51:49 +02:00
Michel Dänzer d1e40b3d40 radeonsi: Maintain cache of pixel shader variants according to contxt state.
Mostly inspired by r600g commit 4acf71f01e
('r600g: cache shader variants instead of rebuilding v3').

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-27 11:51:41 +02:00
Michel Dänzer 84fdda280f radeonsi: Drop extraneous semicolons from pm4 state macro definitions.
Could cause build failures if trying to use the macros in certain constructs.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-27 11:50:38 +02:00
Marek Olšák a3d9d7ec79 r600g: implement compression for MSAA colorbuffers for evergreen
This adds the FMASK and CMASK buffers. They share the same resource
with color data.

COMPRESSION and FAST_CLEAR are always enabled if both FMASK and CMASK are
allocated. We initialize the CMASK to a "compressed" state (not "fast cleared"),
so that we can keep FAST_CLEAR enabled all the time.

Both FMASK and CMASK must be present at the moment. If either one is missing,
the other one is not used.

v2: add cayman regs in the list

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-27 04:31:00 +02:00
Marek Olšák 48edfe0505 r600g: cleanup names around depth decompression
for consistency with the upcoming color decompression naming

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-27 04:31:00 +02:00
Marek Olšák 3ac54ac2c8 r600g: fix evergreen 8x MSAA sample positions
The original samples positions took samples outside of the pixel boundary,
leading to dark pixels on the edge of the colorbuffer, among other things.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-27 04:31:00 +02:00
Marek Olšák 1cfec6e2c8 r600g: set CB_TARGET_MASK to 0xf and not 0xff for resolve on evergreen
independent_blend_enable must be true, so that the colormask isn't replicated
in all colorbuffers.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-27 04:30:59 +02:00
Marek Olšák 1516a4f353 gallium/u_blitter: initialize sample mask in resolve
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2012-08-27 04:30:59 +02:00
Tom Stellard 07c71d6ede r300/compiler: Use variable lists in the rename_regs pass 2012-08-26 20:39:49 -04:00
Eric Anholt 7540f25a34 i965: Rewrite the comment describing the query object support.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-08-26 10:40:33 -07:00
Eric Anholt f0159018d7 i965/gen6+: Add support for GL_ARB_timer_query.
Needs updated libdrm.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-08-26 10:40:33 -07:00
Eric Anholt 9a2943ddf2 i965: Add support for GL_ARB_occlusion_query2.
This extension is just a bit of core code on top of the GL_ARB_occlusion_query
support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-08-26 10:40:33 -07:00
Eric Anholt b765119c5d mesa: Add constants for the GL_QUERY_COUNTER_BITS per target.
Drivers need to be able to communicate their actual number of bits populated
in the field in order for applications to be able to properly handle rollover.

There's a small behavior change here: Instead of reporting the
GL_SAMPLES_PASSED bits for GL_ANY_SAMPLES_PASSED (which would also be valid),
just return 1, because more bits don't make any sense.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2012-08-26 10:40:28 -07:00
Eric Anholt 6754ec831e i965: Fix accumulator_contains() test to also reject swizzles of the dst.
When faced with this sequence:

	MOV	R1, c[1];
	MAD	R0, R2, R1.x, R1.y;

we were concluding that the MOV of R1 set up our accumulator and so we could
just use the previous result.  Only, it's got R1.xyzw in it instead of the
r1.y we're looking for.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46784
NOTE: This is a candidate for the 8.0 branch.
2012-08-26 09:58:40 -07:00
Jakob Bornecrantz 33ee019422 st/dri: Support width and height getters
Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26 15:40:18 +02:00
Jakob Bornecrantz 15effe1fab st/dri: Claim to support validate_usage
Support version 3 as well as 2, since that is only the new format query,
which Jesse added support for to st/dri when he added it to dri_inteface.h.

Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26 15:40:10 +02:00
Jakob Bornecrantz 93ebec87ed dri: Make query image WIDTH and HEIGHT be version 4
Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26 15:39:50 +02:00
Jakob Bornecrantz 6bb71b8cbe dri: Remove image write function
Since its not used by anything anymore and no release has gone out
where it was being used.

Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26 15:39:41 +02:00
Jakob Bornecrantz a669a5055e gbm: Use libkms to replace DRI cursor images
Uses libkms instead of dri image cursor. Since this is the only user of the
DRI cursor and write interface we can remove cursor surfaces entirely from
the DRI interface and as a consequence also from the Gallium interface as
well. Tho to make everybody happy with this it would probably should add a
kms_bo_write function, but that is probably wise in anyways.

The only downside is that it adds a dependancy on libkms, this could how ever
be replaced with the dumb_bo drm ioctl interface.

Tested-by: Scott Moreau <oreaus@gmail.com>
Signed-off-by: Jakob Bornecrantz <jakob@vmware.com>
2012-08-26 15:39:23 +02:00
Kenneth Graunke a3685544e1 i965: Don't set iz_lookup the FS precompile's program key on Gen6+.
We already changed the actual program key builder to only set these bits
on gen < 6; this patch just brings the precompile state back in line so
it doesn't mismatch every time.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-08-25 23:05:35 -07:00