Commit Graph

84774 Commits

Author SHA1 Message Date
Jason Ekstrand 2dba5489ae intel/blorp: Take an isl_swizzle instead of a SWIZZLE
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Jason Ekstrand 7ddb21708c intel/isl: Add an isl_swizzle structure and use it for isl_view swizzles
This should be more compact than the enum isl_channel_select[4] that we
were using before.  It's also very convenient because we already had such a
structure in the Vulkan driver we just needed to pull it over.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-12 19:42:57 -07:00
Kenneth Graunke 376d1dc2f1 docs: Add OES_tessellation_shader to the release notes. 2016-09-12 17:24:35 -07:00
Kenneth Graunke 049cee2c16 docs: Mark OES_tessellation_shader as done. 2016-09-12 17:23:20 -07:00
Ilia Mirkin 742832434a st/mesa: fix is_scissor_enabled when X/Y are negative
Similar to commit 49c24d8a24 ("i965: fix noop_scissor range issue on
width/height") - take the X/Y into account to determine whether the
scissor covers the whole area or not.

Fixes the recently-added gl-1.0-scissor-depth-clear-negative-xy piglit
test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: <mesa-stable@lists.freedesktop.org>
2016-09-12 20:07:21 -04:00
Mauro Rossi 6b9d7e69ee android: add support for libmesa_amdgpu_addrlib
Android porting of the following commits:

f1f1ba3 "radeonsi: move sid.h/r600d_common.h to a common place."
69fca64 "amd/addrlib: move addrlib from amdgpu winsys to common code"

This patch fixes android building errors

Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-09-13 10:06:04 +10:00
Dave Airlie 0fe9152868 u_endian: add android to glibc clause
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
2016-09-13 10:04:13 +10:00
Jason Ekstrand 24be630660 Revert "i965: Drop the maximum 3D texture size to 512 on Sandy Bridge"
This reverts commit 6ba88bce64.  The commit
was erroneous because GL has a separate limit, GL_MAX_FRAMEBUFFER_LAYERS
which guards the number of layers you are allowed to render into.

The GL 4.5 spec says:

   "The framebuffer attachment point attachment is said to be framebuffer
   attachment complete if [...] all of the following conditions are true:

      [...]

      If image is a three-dimensional, one- or two-dimensional array, or
      cube map array texture and the attachment is layered, the depth or
      layer count of the texture is less than or equal to the value of the
      implementation-dependent limit MAX_FRAMEBUFFER_LAYERS."

and goes on to say that "framebuffer complete" requires all attachments to
be "framebuffer attachment complete".

On Sandy Bridge, we set GL_MAX_FRAMEBUFFER_LAYERS to 512 so creating a 3D
texture bigger than 512 is fine; you just can't render into all of the
slices at once.

Fixes ES3-CTS.gtf.GL3Tests.npot_textures.npot_tex_image on Sandy Bridge

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-09-12 16:52:10 -07:00
Jason Ekstrand 2519237c24 intel/blorp: Handle the 512 layers restriction on Sandy Bridge
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:48:56 -07:00
Jason Ekstrand 48f195d7c6 intel/isl: Treat 3-D textures as 2-D arrays for rendering
In particular, this means that isl_view::base_array_layer and
isl_view::array_len get applied to 3-D textures but only when rendering.
We were already applying isl_view::base_array_layer for rendering into 3-D
textures so this isn't a huge deviation.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:48:56 -07:00
Sirisha Gandikota 63fe9ab894 aubinator: Simplify gen_disasm_create()'s devinfo handling
Copy the whole devinfo structure instead of just few fields (Ken)

Earlier, copied only couple of fields which added more code. So,
simplify code by copying the whole structure.

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:20:04 -07:00
Sirisha Gandikota d2869c95fb aubinator: Fix compiler warning
Add 'const' qualifier to gen_field_iterator::p pointer (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-12 16:19:56 -07:00
Julien Isorce bf901a2f8c st/va: also honors interlaced preference when providing a video format
This fixes a crash when using the prefered video format with vaapisink
on Nvidia hardwares.
Also caught by the following assert:
  nouveau_vp3_video.c:91: Assertion `templat->interlaced' failed.

TEST= gst-launch-1.0 videotestsrc ! video/x-raw, format=NV12 ! vaapisink

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Julien Isorce <j.isorce@samsung.com>
Tested-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Tested-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-09-12 22:17:40 +01:00
Samuel Pitoiset 3f3640c86c tgsi: document semantics for compute shaders
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-12 22:15:10 +02:00
Kenneth Graunke 54138af1cd mesa: Enable OES/EXT_tessellation_shader for ES 3.1 + ARB_tess drivers.
Drivers which support ARB_tessellation_shader and ES 3.1 now will
expose OES_tessellation_shader and EXT_tessellation_shader as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-12 13:07:38 -07:00
Marek Olšák 546bc07349 radeonsi: don't preload constants at the beginning of shaders
LLVM can CSE the loads, thus we can always re-load constants before each
use. The decrease in SGPR spilling is huge.

The best improvements are the dumbest ones.

26011 shaders in 14651 tests
Totals:
SGPRS: 1453346 -> 1251920 (-13.86 %)
VGPRS: 742576 -> 728421 (-1.91 %)
Spilled SGPRs: 52298 -> 16644 (-68.17 %)
Spilled VGPRs: 397 -> 369 (-7.05 %)
Scratch VGPRs: 1372 -> 1344 (-2.04 %) dwords per thread
Code Size: 36136488 -> 36001064 (-0.37 %) bytes
LDS: 767 -> 767 (0.00 %) blocks
Max Waves: 219315 -> 222221 (1.33 %)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-12 21:06:57 +02:00
Jason Ekstrand e2fb044115 intel/blorp: Add a TODO file
This provides a nice little place to share notes on what still needs to be
done and/or would be nice to have in BLORP.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 10:14:49 -07:00
Alejandro Piñeiro 6165603209 i965: check for GL_TEXTURE_EXTERNAL_OES at miptree_create_for_teximage
Forgotten on commit "i965: Fix calculation of the image height at start level".

Thanks to Ilia Mirkin for point it.

Fixes the following regressions on Haswell and Broadwell:
ES2-CTS.gtf.GL2ExtensionTests.egl_image_external.TestSimpleUnassociated (crash back to pass)
ES2-CTS.gtf.GL2ExtensionTests.egl_image_external.TestSimple (crash back to fail)
ES2-CTS.gtf.GL2ExtensionTests.egl_image_external.TestVertexShader (crash back to fail)

https://bugs.freedesktop.org/show_bug.cgi?id=97761

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 18:10:50 +02:00
Chuanbo Weng 9a1eb54237 gbm: fix potential NULL deref of mapImage/unmapImage.
The mapImage/unmapImage functions of DRIimage extension can be NULL,
so we should add additional check for them.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-12 16:52:55 +01:00
Emil Velikov 63faf7de61 Remove GL_GLEXT_PROTOTYPES guards from non-ext headers.
A earlier sync with the Khronos headers added _extension_ prototype
guards to all the GLES2/3/31/32 core entry points. Effectively breaking
all the applications that aim to be portable and do not set the define.

The issue has been reported to Khronos (internal bugzilla #14206) and is
being worked on. Until updated/fixed headers are released locally fix
the issue.

The following report is when building weston.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97773

Cc: Armin Krezović <krezovic.armin@gmail.com>
Cc: Emmanuel Gil Peyrot <emmanuel.peyrot@collabora.com>
Cc: Pekka Paalanen <ppaalanen@gmail.com>
Fixes: 6a5504de2f ("Update Khronos-supplied headers to r33100")
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-12 16:52:43 +01:00
Emil Velikov ceaa2e1738 aubinator: rework print_help()
Rather than using platform specific methods to retrieve the program
name pass it explicitly. The function is called directly from main().

Similarly - basename comes in two versions POSIX (can modify string,
always pass a copy) and GNU (never modifies the string).

Just printout the complete program name, esp. since the program is not
meant to be installed. Thus using $basename is unlikely to work, not to
mention it is misleading.

Reported-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
2016-09-12 16:49:59 +01:00
Adam Jackson 0cb1428fbb docs: Note MESA_configless_context as superseded
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-09-12 11:29:11 -04:00
Adam Jackson d9f5b1915b egl: Rename MESA_configless_context bit to KHR_no_config_context
Keep the old name in the extension string, but refer to the KHR
extension internally.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-09-12 11:29:09 -04:00
Adam Jackson cc45a5c308 egl: QueryContext on a configless context returns zero
MESA_configless_context does not specify the interaction with
QueryContext at all, and the code to generate an error in this case
predates the Mesa extension. Since EGL_NO_CONFIG_{KHR,MESA} are
numerically identical there's no way to distinguish which one the
application asked for, so use the KHR behaviour.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-09-12 11:28:38 -04:00
Boyuan Zhang e5009b7c26 st/va: enable vbr rate control for vaapi encode
This patch enables variable bit-rate for vaapi encoding. According to va.h,
target bit-rate equals to maximum bit-rate multiplies by target_percentage.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-09-12 10:34:53 -04:00
Leo Liu 6a7f79af9b vl/rbsp: match initial escaped bits with valid in the buffer
Otherwise the check for the three byte will not make sense.

Signed-off-by: Leo Liu <leo.liu@amd.com>
2016-09-12 10:09:27 -04:00
Timothy Arceri 2da15a3b89 egl: fix gcc warning braces around scalar initializer
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2016-09-12 22:43:49 +10:00
Nicolai Hähnle b8703e363c winsys/radeon: rename nrelocs, crelocs to max_relocs, num_relocs
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:55 +02:00
Nicolai Hähnle d66bbfbede winsys/radeon: don't pre-allocate the relocations array
It's really not necessary. Switch to an exponential resizing strategy.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:53 +02:00
Nicolai Hähnle f47da2e34f winsys/radeon: remove unused radeon_cs_context::priority_usage
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:51 +02:00
Nicolai Hähnle 17fff0c2de winsys/amdgpu: remove amdgpu_cs_lookup_buffer
The radeonsi driver doesn't and shouldn't care about the buffer index.
Only the virtual addresses matter.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:47 +02:00
Nicolai Hähnle 12657a7abf winsys/amdgpu: remove unused field domains from amdgpu_cs_buffer
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:07 +02:00
Nicolai Hähnle 3cdeb2a177 winsys/amdgpu: remove initial buffer list allocation
It's really not necessary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:04 +02:00
Nicolai Hähnle cc53dfda9f winsys/amdgpu: extract adding a new buffer list entry into its own function
While at it, try to be a little more robust in the face of memory allocation
failure.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:55:01 +02:00
Nicolai Hähnle 11cbf4d7ae winsys/amdgpu: use only one fence per BO
The fence that is added to the BO during flush is guaranteed to be
signaled after all the fences that were in the fences array of the BO
before the flush, because those fences are added as dependencies for the
submission (and all this happens atomically under the bo_fence_lock).

Therefore, keeping only the last fence around is sufficient.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:54:59 +02:00
Nicolai Hähnle 480ac143df winsys/amdgpu: add do_winsys_deinit function
The idea is to have matching init/deinit functions so that deinit can be
re-used for cleanup in the error path of amdgpu_winsys_create.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:54:56 +02:00
Nicolai Hähnle 9fb8d354ca winsys/amdgpu: clean up error paths in amdgpu_winsys_create
No need to call pb_cache_deinit, because the cache hasn't been initialized
at that point.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:54:53 +02:00
Nicolai Hähnle a6c38d47d4 gallium/radeon: page alignment for buffers is unnecessary
In some places (e.g. shader program pointers) we require 256 bytes alignment.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:54:45 +02:00
Nicolai Hähnle 339867c077 gallium/radeon/winsyses: remove #includes of pb_bufmgr.h
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-09-12 13:54:36 +02:00
Topi Pohjolainen e54b70b3d4 i965/rbc: Clarify rational given for shader image resolves
Original commit added documentation explaining lossless compression
case:

commit 56f29911ec
Author: Topi Pohjolainen <topi.pohjolainen@intel.com>
Date:   Tue Feb 2 10:00:41 2016 +0200

    i965: Add a flag telling color resolve pass to ignore CCS_E

It, however, easily gives the impression that the sole purpose
of the intel_miptree_resolve_color() is to address lossless
compression. Original intention is to document the lack of
INTEL_MIPTREE_IGNORE_CCS_E flag given for the resolve call.

This patch fixes this along with a typo found spotted further
down.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:30 +03:00
Topi Pohjolainen 1df4b666ed i965/blorp: Use hw generetad primitive copies for layered clears
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:30 +03:00
Topi Pohjolainen b712aa2614 i965/blorp: Sanity check all layers before actual clear
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:30 +03:00
Topi Pohjolainen a1c7de09dc intel/blorp: Add plumbing for setting color clear layer count
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen 514afdce95 intel/blorp: Allow multiple layers
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen e597821ef2 i965/blorp: Instruct vertex fetcher to provide prim instance id
This will indicate target layer (Render Target Array Index) needed
for layered clears.

v2: Use 3DSTATE_VF_SGVS for gen8+

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen 39712b2a14 i965/rbc: Allocate mcs directly
such as we do for compressed msaa. In case of non-compressed simgle
sampled buffers the allocation of mcs is deferred until there is
actually a clear operation that needs the mcs.
In case of render buffer compression the mcs buffer always needed
and there is no real reason to defer the allocation. By doing it
directly allows to drop quite a bit unnecessary complexity.

Patch leaves brw_predraw_set_aux_buffers() a no-op. Subsequent
patches will re-use it and it seemed cleaner to leave it instead
of removing and re-introducing.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen 024a39511f isl/gen8+: Allow 1D and 3D auxiliary surfaces
Otherwise once mcs buffer gets allocated without delay for lossless
compression (same as we do for msaa), assert starts to fire in
piglit case: tex3d. The test uses depth of one which is in fact
supported even now.

v2 (Jason): Allow also 1D case as there is nothing in the specs
            constraining it either.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen 6939532593 i965: Add sanity check for non-compressible texture views
v2: Fix missing inline declaration

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:48:29 +03:00
Topi Pohjolainen 1b6fcc08df i965/rbc: Consult rb settings for texture surface setup
Once mcs buffer gets allocated without delay for lossless
compression (same as we do for msaa), one gets regression in:

GL45-CTS.texture_barrier_ARB.same-texel-rw

Setting the auxiliary surface for both sampling engine and data
port seems to fix this. I haven't found any hardware documentation
backing this though.

v2 (Jason): Prepare also for the case where surface is sampled with
            non-compressible format forcing also rendering without
            compression.
v3: Split asserts and decision making.
v4: Detailed comment provided by Jason explaining the need for using
    auxiliary buffer for texturing when the same surface is also
    used as render target.
    Added check for existence of renderbuffer before considering if
    underlying miptree matches.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 11:46:13 +03:00
Topi Pohjolainen 22d9a4824b i965: Track non-compressible sampling of renderbuffers
v3:
   - Actually set the flags when needed instead of falsely
     overwriting them (Jason).
   - Use more generic name for flag (dropped RENDERBUFFER)
   - Consult also shader images
v4:
   - Consult only lossless compressd shader images

v5:
   - Check the existence of renderbuffer before considering
     if it matches the given miptree

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-12 08:58:38 +03:00