Commit Graph

78675 Commits

Author SHA1 Message Date
Nanley Chery 265d4c415c isl: Fix isl_surf_get_image_intratile_offset_el()
Consecutive tiles are separated by the size of the tile, not by the
logical tile width.

v2: Remove extra subtraction (Ville)
    Add parenthesis (Jason)
v3: Update the unit tests for the function

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-26 16:59:36 -08:00
Thomas Hindoe Paaboel Andersen 6bb6b5c341 anv: remove stray ; after if
Both logic and indentation suggests that the ; were not intended here.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-02-26 16:05:28 -08:00
Jason Ekstrand b7bc52b5b1 anv/gen8: Emit the 3DSTATE_PS_BLEND packet 2016-02-26 16:04:48 -08:00
Jason Ekstrand c32273d246 anv/device: Properly handle apiVersion == 0
From the Vulkan 1.0 spec section 3.2:

"If apiVersion is 0 the implementation must ignore it"
2016-02-25 08:52:37 -08:00
Kristian Høgsberg Kristensen 59f5728995 Merge remote-tracking branch 'origin/master' into vulkan 2016-02-24 13:04:54 -08:00
Kristian Høgsberg Kristensen 25c2470b24 anv: Set max_hs_threads/max_ds_threads 2016-02-24 12:21:26 -08:00
Kenneth Graunke 3ecd357d81 anv: Allocate more push constant space.
Previously we allocated 4kB of push constant space for VS, GS, and PS
(for a total of 12kB) no matter what.  This works, but doesn't fully
utilize the space - we have 16kB or 32kB of space.

This makes anv use the same method as brw - divide up the space evenly
among all active shader stages.  This means HS and DS would get space,
if those shader stages existed.

In the future, we can probably do better by inspecting how many push
constants each shader stage uses, and weight things accordingly.  But
this is strictly better than the old code, and ideally we'd justify
a fancier solution with actual performance data.
2016-02-24 11:22:05 -08:00
Kenneth Graunke 3f11517730 anv: Properly size the push constant L3 area.
We were assuming it was 32kB everywhere, reducing the available URB
space.  It's actually 16kB on Ivybridge, Baytrail, and Haswell GT1-2.
2016-02-24 11:13:08 -08:00
Kenneth Graunke 7f9b03cc8b anv: Emit 3DSTATE_PUSH_CONSTANT_ALLOC_* via a loop.
Now we're emitting HS and DS packets as well.
2016-02-24 11:13:08 -08:00
Kenneth Graunke 1024a66fc4 anv: Emit 3DSTATE_URB_* via a loop.
Rather than keeping separate {vs,hs,ds,gs}_start fields, we now store an
array indexed by the shader stage (MESA_SHADER_*).  The 3DSTATE_URB_*
commands are also sequentially numbered.  This makes it easy to just
emit them in a loop.

This simplifies the code a little, and also will make it easier to add
more credible HS and DS code later.
2016-02-24 11:13:02 -08:00
Brian Paul c95d5c5f6f mesa: replace for loop with bitshifting in supported_buffer_bitmask()
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:32:01 -07:00
Brian Paul ac37d0475c mesa: updates some comments in buffers.c
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:53 -07:00
Brian Paul d8412029bb mesa: make _mesa_draw_buffers() static
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:44 -07:00
Brian Paul 24d8080507 mesa: make _mesa_draw_buffer() static
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:41 -07:00
Brian Paul ebfcf9de43 mesa: make _mesa_read_buffer() static
Not called from any other file.  Remove _mesa_ prefix and update comments.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:37 -07:00
Brian Paul 1e41c2e135 mesa: move declaration of buffer var in handle_first_current()
Declare the var in the scopes where it's used.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:31 -07:00
Brian Paul c8fdb42c91 mesa: use gl_buffer_index in a few places
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:28 -07:00
Brian Paul 363019e17a st/mesa: remove useless break statement
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:23 -07:00
Brian Paul 953cb24e65 st/mesa: rename st_readpixels to st_ReadPixels
To match the convention of other device driver functions.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:17 -07:00
Brian Paul 83b589301f st/mesa: fix frontbuffer glReadPixels regressions
The change "mesa/readpix: Don't clip in _mesa_readpixels()" caused a
few piglit regressions.  The failing tests use glReadPixels to read
from the front color buffer.  The problem is we were trying to read
from a non-existant front color buffer.  The front color buffer is
created on demand in st/mesa.  Since the missing buffer bounds were
effectively 0 x 0 the glReadPixels was totally clipped and returned
early.

The fix involves creating the real front color buffer when we're about
to try reading from it.

Tested with llvmpipe and VMware driver on Linux, Windows.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94253
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94254
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94257
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:30:07 -07:00
Jason Ekstrand c9564fd598 nir/spirv: Allow but warn for a few capabilities
Unfortunately, glslang gives us cull/clip distance and GS streams even if
the shader doesn't use it whenever a shader is declared as version 450.
This is a glslang bug, but we can easily enough ignore it for now.
2016-02-23 22:07:25 -08:00
Jason Ekstrand f0f7cc22f3 anv/descriptor_set: Use the correct size for the descriptor pool
The descriptor sizes array gives the total number of each type of
descriptor that will ever be allocated from the pool, not the total amount
that may be in any particular set.  In our case, this simply means that we
have to sum a bunch of things up and there we go.
2016-02-23 21:25:37 -08:00
Jason Ekstrand 040355b688 nir/spirv: Add more capabilities 2016-02-23 21:01:00 -08:00
Jason Ekstrand bd3db3d665 anv/meta: Allocate descriptor pools on-the-fly
We can't use a global descriptor pool like we were because it's not
thread-safe.  For now, we'll allocate them on-the-fly and that should work
fine.  At some point in the future, we could do something where we
stack-allocate them or allocate them out of one of the state streams.
2016-02-23 17:04:19 -08:00
Oded Gabbay 4b7e219e61 gallium/radeon: Correctly translate colorswaps for big endian
The current code in r600_translate_colorswap uses the swizzle information
to determine which colorswap to use.

This works for BE & LE when the nr_channels is <4, but when nr_channels==4
(e.g. PIPE_FORMAT_A8R8G8B8_UNORM), this method can not be used for both BE
and LE, because the swizzle info is the same for both of them.

As a result, r600g doesn't support 24bit color formats, only 16bit, which
forces the user to choose 16bit color in X server.

This patch fixes this bug by separating the checks for LE and BE and
adapting the swizzle conditions in the BE part of the checks.

Tested on an Evergreen GPU (Cedar GL FirePro 2270) running inside POWER7
Big-Endian Machine.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
CC: "11.2" "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-23 20:55:40 +02:00
Thomas Hindoe Paaboel Andersen 1807806add mesa: use sizeof on the correct type
Before the luminance stride was based on the size of GL_FLOAT
which is just the type constant (0x1406). Change it to use the
size of GLfloat.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-23 08:55:35 -07:00
Marek Olšák 190a291b03 tgsi/scan: handle holes between VS inputs, assert-fail in other cases
"st/mesa: overhaul vertex setup for clearing, glDrawPixels, glBitmap"
added a vertex shader declaring IN[0] and IN[2], but not IN[1].

Drivers relying on tgsi_shader_info can't handle holes in declarations,
because tgsi_shader_info doesn't track that.

This is just a quick workaround meant for stable that will work for vertex
shaders.

This fixes radeonsi DrawPixels and CopyPixels crashes.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-23 16:42:16 +01:00
Jason Ekstrand bfbb238dea anv/descriptor_set: Set descriptor type for immuatable samplers 2016-02-22 21:39:14 -08:00
Jason Ekstrand 64e1c84059 intel/genxml: Update macro documentation 2016-02-22 21:20:04 -08:00
Francisco Jerez 31a0affa28 docs: Mark off GL_OES_shader_image_atomic as done.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:59:56 -08:00
Francisco Jerez 058ed980c6 i965/fs: Return result of image atomic in a register of the expected type.
So the result is of float type if we're implementing the float
overload of imageAtomicExchange.  This is the only back-end change
required to support OES_shader_image_atomic AFAICT.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:57:09 -08:00
Francisco Jerez 81c16a2dab glsl: Implement the required built-in functions when OES_shader_image_atomic is enabled.
This is basically just the same atomic functions exposed by
ARB_shader_image_load_store, with one exception:

    "highp float imageAtomicExchange(
         coherent IMAGE_PARAMS,
         float data);"

There's no float atomic exchange overload in the original
ARB_shader_image_load_store or GL 4.2, so this seems like new
functionality that requires specific back-end support and a separate
availability condition in the built-in function generator.

v2: Move image availability predicate logic into a separate static
    function for clarity.  Had to pull out the image_function_flags
    enum from the builtin_builder class for that to be possible.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:56:54 -08:00
Francisco Jerez be125af95e glsl: Add usual extension boilerplate for OES_shader_image_atomic.
v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:56:35 -08:00
Francisco Jerez 009bbecf6d mesa: Add extension table entry for OES_shader_image_atomic.
v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:55:35 -08:00
Jason Ekstrand ae619a0355 anv/state: Replace a bunch of ANV_GEN with GEN_GEN 2016-02-22 19:19:00 -08:00
Jason Ekstrand 442dff8cf4 anv/descriptor_set: Stop marking everything as having dynamic offsets 2016-02-22 17:23:29 -08:00
Kristian Høgsberg Kristensen 2570a58bcd anv: Implement descriptor pools
Descriptor pools are an optimization that lets applications allocate
descriptor sets through an externally synchronized object (that is,
unlocked).  In our case it's also plugging a memory leak, since we
didn't track all allocated sets and failed to free them in
vkResetDescriptorPool() and vkDestroyDescriptorPool().
2016-02-22 17:13:51 -08:00
Kristian Høgsberg Kristensen 353d5bf286 anv/x11: Free swapchain images and memory on destroy 2016-02-22 16:23:47 -08:00
Samuel Pitoiset 2999257e0f nvc0: rename 3d binding points to NVC0_BIND_3D_XXX
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset 9c6a7bfb40 nvc0: rename 3d dirty flags to NVC0_NEW_3D_XXX
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset 2c48369f54 nvc0: prefix compute macros with _CP_ instead of _COMPUTE_
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset bbff97ae39 nvc0: rename NVXX_COMPUTE to NVXX_CP
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset 5330ed959e nvc0: rename nvc0_context::dirty to nvc0_context::dirty_3d
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset 84b9b8f0a3 nvc0/ir: add missing emission of locked load predicate
Like unlocked store on shared memory, locked store can fail and the
second dest which is a predicate must be emitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2016-02-22 21:28:51 +01:00
Samuel Pitoiset 9f0d059d4b nvc0/ir: add ld lock/st unlock emission on GK104
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset 6526225f88 nv50/ir: restore OP_SELP to be a regular instruction
Actually OP_SELP doesn't need to be a compare instruction. Instead we
just need to set the NOT modifier when building the instruction.
While we are at it, fix the dst register type and use a GPR.

Suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Mark Janes 08b408311c vulkan: fix out-of-tree builds 2016-02-22 11:31:15 -08:00
Brian Paul 9de3b0273d svga: unbind index buffer when drawing non-indexed primitives
Silences a warning reported by the svga3d device.

v2: also null-out the index buffer pointer

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-02-22 12:14:48 -07:00
Kristian Høgsberg Kristensen f843aabdd4 intel/genxml: Add README
I've had people ask about the design of the pack functions, for example,
why aren't we using bitfields. I wrote up a bit of background on why and
how we ended up with the current design and we might as well keep that
with the code.
2016-02-22 09:14:25 -08:00
Nanley Chery 7b2c63a53c anv/meta_blit: Handle compressed textures in anv_CmdCopyImage
As with anv_CmdCopyBufferToImage, compressed textures require special
handling during copies.

Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2016-02-22 09:04:28 -08:00