Commit Graph

75093 Commits

Author SHA1 Message Date
Jordan Justen 23da6aeb17 glsl: Allow atomic functions to be used with shared variables
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen d3625d4071 i965: Lower shared variable references to intrinsic calls
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen b1fe3af0da i965: Enable shared local memory for CS shared variables
v3:
 * Check shared variable size at link time

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen faddb301ff i965/fs: Handle nir shared variable store intrinsic
v4:
 * Apply similar optimization for shared variable stores as
   0cb7d7b4b7. This was causing a
   OpenGLES 3.1 CTS failure, but
   867c436ca8 fixes that.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen 8613206bd3 i965/fs: Handle nir shared variable load intrinsic
v3:
 * Remove extra #includes (Iago)
 * Use recently added GEN7_BTI_SLM instead of BRW_SLM_SURFACE_INDEX (curro)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen e128a62318 i965: Disable vector splitting on shared variables
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen aa12a92626 nir: Translate glsl shared var store intrinsic to nir intrinsic
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen 03b0439938 nir: Translate glsl shared var load intrinsic to nir intrinsic
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen 1078d712d7 glsl: Add lowering pass for shared variable references
In this lowering pass, shared variables are decomposed into intrinsic
calls.

v2:
 * Send mem_ctx as a parameter (Iago)

v3:
 * Shared variables don't have an associated interface block (Iago)
 * Always use 430 packing (Iago)
 * Comment / whitespace cleanup (Iago)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Iago Toral Quiroga f22ab2e8b3 glsl: Don't assert on shared variable matrices with 'inherited' layout
We use column-major for shared variable matrices.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen 66eaef7737 glsl: Don't lower_variable_index_to_cond_assign for shared variables
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen c43a7e605e glsl: Remove mem_ctx as member variable in lower_ubo_reference_visitor
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen ee005df2f9 glsl ubo/ssbo: Move common code into lower_buffer_access::setup_buffer_access
This code will also be usable by the pass to lower shared variables.

Note, that *const_offset is adjusted by setup_buffer_access so it must
be initialized before calling setup_buffer_access.

v2:
 * Add comment for lower_buffer_access::setup_buffer_access

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen 99c8196458 glsl ubo/ssbo: Move is_dereferenced_thing_row_major into lower_buffer_access
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen afa4129cf6 glsl ubo/ssbo: Add lower_buffer_access class
This class has code that will be shared by lower_ubo_reference and
lower_shared_reference. (lower_shared_reference will be used to
support compute shader shared variables.)

v2:
 * Add lower_buffer_access.h to makefile (Emil)
 * Remove static is_dereferenced_thing_row_major from
   lower_buffer_access.cpp. This will become a lower_buffer_access
   method in the next commit.
 * Pass mem_ctx as parameter rather than using a member variable (Iago)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen ad3c65e792 glsl ubo/ssbo: Split buffer access to insert_buffer_access
This allows the code in emit_access to be generic enough to also be
for lowering shared variables.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Jordan Justen 05667ecc52 glsl ubo/ssbo: Use enum to track current buffer access type
v2:
 * Rename ssbo_get_array_length to ssbo_unsized_array_length_access (Iago)
 * Use always use this-> when referencing buffer_access_type (Iago)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 23:50:38 -08:00
Tapani Pälli 8cc372b6d9 glsl: do not loose always_active_io when packing varyings
Otherwise packed and inactive varyings get optimized away. This needs
to be prevented when using separate shader objects where interface
needs to be preserved.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2015-12-10 07:51:55 +02:00
Tapani Pälli 2377db2c4e mesa: invalidate pipeline status after glUseProgramStages
This will cause validation to run during next draw, this is done
because possible changes in used stages and programs can cause
invalid pipeline state.

This fixes a subtest in following CTS test:
	ES31-CTS.sepshaderobjs.StateInteraction

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2015-12-10 07:51:40 +02:00
Dave Airlie 21abaad8fe mesa/varray: set double arrays to non-normalised.
Doesn't have any effect in practice I don't think, but
CTS reads back using GetVertexAttrib.

This fixes: GL41-CTS.vertex_attrib_64bit.get_vertex_attrib

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-10 13:51:44 +10:00
Michel Dänzer b4a03e7f8f clover: Fix build against LLVM 3.8 SVN >= r255078
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-12-10 10:45:29 +09:00
Brian Paul e1815bcc47 mesa: fix ID usage for buffer warnings
We need a different ID pointer for each call site.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-12-09 16:06:35 -07:00
Brian Paul de5bb7fe78 docs: remove stray <ul> tag from 11.0.5.html file to fix indentation 2015-12-09 15:55:11 -07:00
Serge Martin 2b930327e8 freedreno: little clean up in fd_create_surface
in order to avoid returing invalid adress if CALLOC_STRUCT return NULL.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-12-09 17:32:41 -05:00
Serge Martin 0149e7a944 freedreno: change to goto fail
in fd_resource_transfer_map, like the others error cases

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-12-09 17:31:16 -05:00
Serge Martin e63fec29a1 freedreno: fix bind_sampler_states when hwcso is NULL
src/gallium/tests/trivial/compute.c expects samplers to be cleaned
when the samplers list is NULL.
Like in radeon, the function behave like when the number of samplers
parameter is set to 0.

[small s/hwsco/hwcso/ typo fix]
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-12-09 17:30:58 -05:00
Edward O'Callaghan f32f80e19d gallium/util: Make u_prims_for_vertices() safe
Let us avoid trapping in hardware from a SIGFPE and instead
assert on a zero divisor.

Hint: This can occur if a PIPE_PRIM_? is not handled in
      u_prim_vertex_count() that results in ' info ' not
      being initialized in the expected manner.

Further, we also fix a possibly NULL pointer dereference
from ' info ' being NULL from a u_prim_vertex_count() call.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-12-09 22:51:56 +01:00
Andreas Boll 63fe600c7a docs: add news item for mesa-demos 8.3.0 release
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
2015-12-09 22:44:52 +01:00
Patrick Rudolph 432a798cf5 nv50,nvc0: fix use-after-free when vertex buffers are unbound
Always reset the vertex bufctx to make sure there's no pointer to
an already freed pipe_resource left after unbinding buffers.
Fixes use after free crash in nvc0_bufctx_fence().

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93004
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
[imirkin: simplify nvc0 fix, apply to nv50]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
2015-12-09 13:38:15 -05:00
Andreas Boll f876346cdd mesa: Fix a typo in a comment
s/suports/supports/

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-09 18:29:24 +01:00
Andreas Boll 0560e835f3 glx: Fix a typo in a comment
s/suports/supports/

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-09 18:29:21 +01:00
Andreas Boll 9246df2280 st/osmesa: Fix a typo in a comment
s/suport/support/

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-09 18:29:18 +01:00
Andreas Boll 7af9930ab4 meta: Fix a typo in a print message
s/Unkown/Unknown/

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-09 18:29:15 +01:00
Andreas Boll c83e161c91 mesa: Fix typos in print messages
s/inconsistant/inconsistent/
s/occurences/occurrences/

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-09 18:29:11 +01:00
Andreas Boll 5c27cb3da3 glsl: Fix a typo in a comment
s/suports/supports/

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-12-09 18:26:47 +01:00
Brian Paul aa9af32752 svga: initialize pipe_driver_query_info entries with a macro
To be safe, set all the fields in case the enums ordering/values
ever change.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-12-09 09:43:47 -07:00
Brian Paul ab0651ccfd mesa: detect inefficient buffer use and report through debug output
When a buffer is created with GL_STATIC_DRAW, its contents should not
be changed frequently.  But that's exactly what one application I'm
debugging does.  This patch adds code to try to detect inefficient
buffer use in a couple places.  The GL_ARB_debug_output mechanism is
used to report the issue.

NVIDIA's driver detects these sort of things too.

Other types of inefficient buffer use could also be detected in the
future.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2015-12-09 09:43:47 -07:00
Emil Velikov 7d3df58125 docs: add news item and link release notes for 11.0.7
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2015-12-09 16:12:32 +00:00
Emil Velikov 61b91d0811 docs: add sha256 checksums for 11.0.7
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit f9715bc449d6b2cc5693e44bb82a9d5305a32ab5)
2015-12-09 16:11:12 +00:00
Emil Velikov d432be32e2 docs: add release notes for 11.0.7
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit bec983b738a7f149478ee692ba0e1d26fcc9fd8e)
2015-12-09 16:11:11 +00:00
Francisco Jerez 595c818071 i965: Resolve color and flush for all active shader images in intel_update_state().
Fixes arb_shader_image_load_store/execution/load-from-cleared-image.shader_test.

Couldn't reproduce any significant FPS regression in CPU-bound
benchmarks from the Finnish benchmarking system on neither VLV nor BSW
after 30 runs with 95% confidence level.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92849
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-12-09 15:12:59 +02:00
Francisco Jerez 3dc97a1586 i965: Document inconsistent units the URB size is represented in.
Every other gen the representation of the URB size was changed and
previous ones weren't updated.  I'd be willing to write a series
normalizing this to be KB on all generations if anybody else cares.
2015-12-09 14:00:30 +02:00
Francisco Jerez 228d5a3f75 i965: Hook up L3 partitioning state atom.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:59:03 +02:00
Francisco Jerez 1fc797e8e4 i965: Work around L3 state leaks during context switches.
This is going to require some rather intrusive kernel changes to fix
properly, in the meantime (and forever on at least pre-v4.1 kernels)
we'll have to restore the hardware defaults at the end of every batch
in which the L3 configuration was changed to avoid interfering with
the DDX and GL clients that use an older non-L3-aware version of Mesa.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>

v2: Optimize look-up of the default configuration by assuming it's the
    first entry of the L3 config array in order to avoid an FPS
    regression in GpuTest Triangle and SynMark OglBatch2-7 on most
    affected platforms.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-09 13:57:40 +02:00
Francisco Jerez 09d9638dd0 i965: Add debug flag to print out the new L3 state during transitions.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:46:05 +02:00
Francisco Jerez acc77947ca i965: Implement L3 state atom.
The L3 state atom calculates the target L3 partition weights when the
program bound to some shader stage is modified, and in case they are
far enough from the current partitioning it makes sure that the L3
state is re-emitted.

v2: Fix for inconsistent units the context URB size is expressed in.
    Clamp URB size to 1008 KB on SKL due to FF hardware limitation.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:46:05 +02:00
Francisco Jerez 95ad0bd33b i965: Calculate appropriate L3 partition weights for the current pipeline state.
This calculates a rather conservative partitioning of the L3 cache
based on the shaders currently bound to the pipeline and whether they
use SLM, atomics, images or scratch space.  The result is intended to
be fine-tuned later on based on other pipeline state.

Note that the L3 partitioning calculated for VLV in the non-SLM non-DC
case differs from the hardware defaults in that it doesn't include a
DC partition and has twice as much RO cache space -- This is an
intentional functional change that improves performance in several
bandwidth-bound benchmarks on VLV (5% significance): SynMark
OglTexFilterAniso by 14.18%, SynMark OglTexFilterTri by 7.15%, Unigine
Heaven by 4.91%, SynMark OglShMapPcf by 2.15%, GpuTest Fur by 1.83%,
SynMark OglDrvRes by 1.80%, SynMark OglVsTangent by 1.71%, and a few
other benchmarks from the Finnish system by less than 1%.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:46:05 +02:00
Francisco Jerez fa1300f75e i965: Implement selection of the closest L3 configuration based on a vector of weights.
The input of the L3 set-up code is a vector giving the approximate
desired relative size of each partition.  This implements logic to
compare the input vector against the table of validated configurations
for the device and pick the closest compatible one.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:46:05 +02:00
Francisco Jerez 353abb294b i965: Define and use REG_MASK macro to make masked MMIO writes slightly more readable.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:46:05 +02:00
Francisco Jerez fa043698d2 i965/hsw: Enable L3 atomics.
Improves performance of the arb_shader_image_load_store-atomicity
piglit test by over 25x (which isn't a real benchmark it's just heavy
on atomics -- the improvement in a microbenchmark I wrote a while ago
seemed to be even greater).  The drawback is one needs to be
extra-careful not to hang the GPU (in fact the whole system).  A DC
partition must have been allocated on L3, the "convert L3 cycle for DC
to UC" bit may not be set, the MOCS L3 cacheability bit must be set
for all surfaces accessed using DC atomics, and the SCRATCH1 and
ROW_CHICKEN3 bits must be kept in sync.

A fairly recent kernel is required for the command parser to allow
writes to these registers.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg  <krh@bitplanet.net>
2015-12-09 13:46:05 +02:00