Commit Graph

68935 Commits

Author SHA1 Message Date
Brian Paul 10035361b5 swrast: remove _BLENDAPI
_BLENDAPI boils down to __cdecl on Windows, but __cdecl is the default
calling convention so this serves no purpose.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-12 07:52:45 -06:00
Brian Paul 6ca5eaf49c mesa: use ARRAY_SIZE in _mesa_QueryMatrixxOES()
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul c3984c1155 mesa: remove register keyword, add const in _mesa_QueryMatrixxOES()
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul 97f6d50f72 mesa: reindent querymatrix.c
Use 3-space indents, not 4.  Move some comments after the case statements.

Acked-by: Matt Turner <mattst88@gmail.com>
2015-03-12 07:52:45 -06:00
Brian Paul be4e198be0 mesa: move fpclassify work-arounds into c99_math.h
v2: Use #error in the #else clause, per Jose.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-12 07:52:35 -06:00
Jose Fonseca 70dc8a9930 gallivm: Prevent double delete on LLVM 3.6
std::unique_ptr takes ownership of MM, and a double delete could ensure
in case of an error,  as pointed out by Chris Vine in
https://bugs.freedesktop.org/show_bug.cgi?id=89387

Reviewed-by: Chris Vine <chris@cvine.freeserve.co.uk>
2015-03-12 10:01:09 +00:00
Emil Velikov 30916a5ef0 autogen.sh: pass --force to autoreconf, quote ORIGDIR
By passing --force autoreconf will update all the aux files, which would
otherwise be ignored if one updates autoconf/automake.

Quote the ORIGDIR variable to prevent fall-outs, when its name contains
space.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-11 23:28:26 +00:00
Emil Velikov a385d18598 glx: remove support for non-multithreaded platforms
Implicitly required for a while, although commit 9385c592c6 (mapi:
remove u_thread.h) was the one that put the final nail on the
coffin.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:26 +00:00
Emil Velikov 42144170d1 glx: remove final reference to THREADS
Left over from commit 18db13f5865(mapi: THREADS was always defined,
remove it)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:26 +00:00
Emil Velikov 39f90e6b9b configure: require pthreads for POSIX builds
This has been an implicit rule for building mesa for a long time. Let's
make it official and just bail out at configure time. This way we can
cleaning up some of our glx code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:25 +00:00
Emil Velikov a806df3f23 egl/main: convert thread management to use c11 threads
Convert the code to use the C11 threads implementation, and nuke the
Windows non-pthreads code-path. The c11/threads_win32.h abstraction
should be better than the current code.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:25 +00:00
Emil Velikov efe87f1a80 egl/main: use c11/threads' mutex directly
Remove the inline wrappers/abstraction layer.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 23:28:25 +00:00
Jason Ekstrand 90e50908d7 nir/worklist: Don't change the start index when computing the tail index
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-11 15:18:16 -07:00
Thomas Helland 8fb8fe46fa nir: Optimize a + neg(a)
Shader-db i965 instructions:
total instructions in shared programs: 1711180 -> 1711159 (-0.00%)
instructions in affected programs:     825 -> 804 (-2.55%)
helped:                                9
HURT:                                  0
GAINED:                                3
LOST:                                  3

Shader-db NIR instructions:
total instructions in shared programs: 606187 -> 606179 (-0.00%)
instructions in affected programs:     298 -> 290 (-2.68%)
helped:                                4
HURT:                                  0
GAINED:                                0
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
2015-03-11 14:21:05 -07:00
Thomas Helland 0525f2e851 nir: Optimize (a*b)+(a*c) -> a*(b+c)
Shader-db i965 instructions:
total instructions in shared programs: 1715894 -> 1710802 (-0.30%)
instructions in affected programs:     443080 -> 437988 (-1.15%)
helped:                                1502
HURT:                                  13
GAINED:                                4
LOST:                                  4

Shader-db NIR instructions:
total instructions in shared programs: 607710 -> 606187 (-0.25%)
instructions in affected programs:     208285 -> 206762 (-0.73%)
helped:                                769
HURT:                                  8
GAINED:                                0
LOST:                                  0

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
2015-03-11 14:21:05 -07:00
Marius Predut 09b0325409 vbo: improve the code style by adjust the preprocessing c code directives
Brian Paul review suggestion: there's more macro use here than necessary.
Removed and redefine some #define preprocessing directives.
Removed the directive input parameter 'T' .
No functional changes.

Signed-off-by: Marius Predut <marius.predut@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-11 09:34:25 -06:00
Brian Paul 9816acff2c mesa: remove CPU_TO_LE32() for AIX
This is the only remnant of AIX-specific code in Mesa.  Probably long
unused.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:25 -06:00
Brian Paul 3158b3abb3 mesa: remove #define __volatile
Not actually used anwhere in Mesa.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul d7193ce42c mesa: use strdup() instead of _mesa_strdup()
We were already using strdup() in various places in Mesa.  Get rid
of the _mesa_strdup() wrapper.  All the callers pass a non-NULL
argument so the NULL check isn't needed either.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul 5376bc74cc st/glx: use strdup() instead of _mesa_strdup()
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul 279c5965aa xlib: use strdup() instead of _mesa_strdup()
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-11 09:34:24 -06:00
Brian Paul 14ba6c9325 i915: add parens to silence operator precedence warning
Signed-off-by: Brian Paul <brianp@vmware.com>
2015-03-11 09:34:07 -06:00
Iago Toral Quiroga 6ac1bc90c4 i965: Fix out-of-bounds accesses into pull_constant_loc array
The piglit test glsl-fs-uniform-array-loop-unroll.shader_test was designed
to do an out of bounds access into an uniform array to make sure that we
handle that situation gracefully inside the driver, however, as Ken describes
in bug 79202, Valgrind reports that this is leading to an out-of-bounds access
in fs_visitor::demote_pull_constants().

Before accessing the pull_constant_loc array we should make sure that
the uniform we are trying to access is valid.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79202
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-11 08:03:40 +01:00
Jordan Justen 5750595ca9 i965/gen6 gs: Convert brw_imm_ud/brw_imm_d to src_reg
Same idea as this patch, only for gen6_gs_visitor:

commit 49a938a265
Author: Jordan Justen <jordan.l.justen@intel.com>
Date:   Fri Feb 20 12:12:25 2015 -0800
    i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data

Suggested-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-10 00:14:53 -07:00
Jordan Justen e5269ca28e i965/fs: Use unsigned for CS/VS atomics pixel mask immediate data
brw_imm_ud(0xffff) should have been converted to fs_reg(0xffffu) to
make sure the uint32_t fs_reg constructor was matched.

commit 49a938a265
Author: Jordan Justen <jordan.l.justen@intel.com>
Date:   Fri Feb 20 12:12:25 2015 -0800
    i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-10 00:13:08 -07:00
Jordan Justen 6626e3548b i965/gen8: Don't allocate hiz miptree structure
We now skip allocating a hiz miptree for gen8. Instead, we calculate
the required hiz buffer parameters and allocate a bo directly.

v2:
 * Update hz_height calculation as suggested by Topi
v3:
 * Bail if we failed to create the bo (Ben)
v4:
 * CEILING => DIV_ROUND_UP
 * Make sure mt->logical_depth0 being 0 would not cause trouble
 * Fail if Y tiling is not returned

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen 81124aefe8 i965/gen7: Don't allocate hiz miptree structure
We now skip allocating a hiz miptree for gen7. Instead, we calculate
the required hiz buffer parameters and allocate a bo directly.

v2:
 * Update hz_height calculation as suggested by Topi
v3:
 * Bail if we failed to create the bo (Ben)
v4:
 * CEILING => DIV_ROUND_UP
 * Make sure mt->logical_depth0 being 0 would not cause trouble
 * Fail if Y tiling is not returned

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67564
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen 31b851dccb i965/gen8: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from
intel_miptree_aux_buffer. This will allow us to switch over to not
allocating a miptree.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen 26eabd189d i965/gen7: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from
intel_miptree_aux_buffer. This will allow us to switch over to not
allocating a miptree.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:51 -07:00
Jordan Justen aedcd466bb i965/hiz: Start to separate miptree out from hiz buffers
Today we allocate a miptree's for the hiz buffer. We needed this in
the past because we would point the hardware at offsets of the hiz
buffer. Since the hiz format is not documented, this is not a good
idea.

Since moving to support layered rendering on Gen7+, we no longer point
at an offset into the buffer on Gen7+.

Therefore, to support hiz on Gen7+, we don't need a full miptree
structure allocated.

This patch starts to create a new auxiliary buffer structure
(intel_miptree_aux_buffer) that can be a more simplistic miptree
side-band buffer associated with a miptree. (For example, to serve the
needs of the hiz buffer.)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-03-09 23:56:50 -07:00
Dave Airlie 4d318b61fc mesa/scissor: fix typos in debug names
Just noticed this when working on virgl.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-10 16:45:45 +10:00
Samuel Pitoiset e5cd42ed9a nvc0: fix wrong max value for driver queries
The maximum value of a Gallium HUD's panel is automatically adjusted
when the current value is greater than the max. If we set the
pipe_query_driver_info::max_value to UINT64_MAX, the maximum value is
never adjusted and this results in a flat line instead of a pretty curve
which is correctly scaled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-03-09 20:47:05 -04:00
Vinson Lee 13f4963ed2 i965: Silence GCC maybe-uninitialized warning.
brw_shader.cpp: In function ‘bool brw_saturate_immediate(brw_reg_type, brw_reg*)’:
brw_shader.cpp:618:31: warning: ‘sat_imm.brw_saturate_immediate(brw_reg_type, brw_reg*)::<anonymous union>::ud’ may be used uninitialized in this function [-Wmaybe-uninitialized]
       reg->dw1.ud = sat_imm.ud;
                               ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 17:28:39 -07:00
Vinson Lee 282f67becd i915: Fix GCC unused-but-set-variable warning in release build.
i915_fragprog.c: In function ‘i915ValidateFragmentProgram’:
i915_fragprog.c:1453:11: warning: variable ‘k’ set but not used [-Wunused-but-set-variable]
       int k;
           ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-09 17:28:39 -07:00
Vinson Lee 5f759836ad Add macro for unused function attribute.
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-09 17:28:39 -07:00
Ben Widawsky 7aba4ab1f3 meta: Plug memory leak
It looks like this has existed since
commit f5a477ab76
Author: Ian Romanick <ian.d.romanick@intel.com>
Date:   Mon Dec 16 11:54:08 2013 -0800

    meta: Refactor shader generation code out of mipmap generation path

Valgrind was complaining on fbo-generatemipmap-formats

v2: Instead, do the allocation after the early return block (v2)

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-09 16:32:33 -07:00
Kenneth Graunke e95969cd95 i965/fs: Don't issue FB writes for bound but unwritten color targets.
We used to loop over all color attachments, and emit FB writes for each
one, even if the shader didn't write to a corresponding output variable.
Those color attachments would be filled with garbage (undefined values).

Football Manager binds a framebuffer with 4 color attachments, but draws
to it using a shader that only writes to gl_FragData[0..2].  This meant
that color attachment 3 would be filled with garbage, resulting in
rendering artifacts.  Now we skip writing to it, fixing rendering.

Writes to gl_FragColor initialize outputs[0..nr_color_regions-1] to
GRFs, while writes to gl_FragData[i] initialize outputs[i].

Thanks to Jason Ekstrand for tracking this down.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86747
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke 4ebeb71573 i965/fs: Make emit_shader_time_end() insert before EOT.
Previously, we emitted the shader-time epilogue from emit_fb_writes(),
during the middle of looping through color regions (or emit_urb_writes
for the VS).  This is duplicated several times and rather awkward.

I need to fix a bug in our FB write handling, and it will be a lot
easier if we move emit_shader_time_end() out of there.

Now, we simply emit FB writes/URB writes, and subsequently have
emit_shader_time_end() insert instructions before the final SEND with
EOT.  Not only is this simpler, it's actually a slight improvement:
we now include the MOVs to set up the final FB write payload in our
shader-time measurements.

Note that INTEL_DEBUG=shader_time only exists on Gen7+, and uses
send-from-GRF.  (In the past, we might have hit trouble where both
attempt to use MRFs for messages; that's not a problem now.)

v2: Rebase on v3 of the previous patch and other shader_time fixes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> [v1]
Acked-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke e43af8d09f i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.
This makes another part of the INTEL_DEBUG=shader_time code emittable
at arbitrary locations, rather than just at the end of the instruction
stream.

v2: Don't lose smear!  Caught by Topi Pohjolainen.
v3: Don't set smear on the destination of the MOV.  Thanks Topi!

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke bea854c7f3 i965/fs: Make emit_shader_time_write return rather than emit.
Instead of emit_shader_time_write, we now do emit(SHADER_TIME_ADD(...)).
The advantage is that we can also insert a shader time write at an
arbitrary location in the instruction stream, rather than being
restricted to emitting at the end.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:04 -07:00
Kenneth Graunke f1adc45dbe i965/fs: Set smear on shader_time diff register.
The ADD(diff, diff, fs_reg(-2u)) instruction reads diff, which is a
width 1 register.  We need to read it as <0,1,0> with a subreg of 0,
which is what smear accomplishes.

Fixes assertion:
brw_eu_emit.c:285: validate_reg: Assertion `hstride == 0' failed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:03 -07:00
Kenneth Graunke ef9cc7d0c1 i965/fs: Set force_writemask_all on shader_time instructions.
These computations don't have anything to do with the currently
executing channels, so they should use force_writemask_all.

This fixes assert failures.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86974
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-03-09 16:07:03 -07:00
Alexandre Demers 7a37d5c3a4 r600g: Use R600_MAX_VIEWPORTS instead of 16
Lets define R600_MAX_VIEWPORTS instead of using 16 here and there
in the code when looping through viewports and scissors. It is
easier to understand what this number represents.

v2: Missed a case where R600_MAX_VIEWPORTS should have been used.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-03-09 23:02:05 +01:00
Ian Romanick 85df48b45a i915: Remove unused IS_GEN2 macro
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:09:21 -07:00
Ian Romanick 07a062997a i915: Remove (mostly) unused IS_915 macro
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:09:16 -07:00
Ian Romanick 117288dbf3 i915: Remove (mostly) unused IS_PNV, IS_PNVG, and IS_PNVGM macros
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:09:06 -07:00
Ian Romanick 19fda9fc83 i915: Remove IS_9XX macro
Since the i915 / i965 split, IS_9XX just means IS_GEN3.  Inspired by
Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:08:57 -07:00
Ian Romanick 6d41316b79 i915: Remove unused IS_MOBILE macro
Inspired by Damien's recent libdrm changes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:08:49 -07:00
Ian Romanick e7d94be1ec i965: Don't write past the end of the application supplied buffer
Both the AMD and Intel APIs provide a dataSize parameter, and this
function would merrily ignore it.  Neither API specifies what to do when
the buffer isn't big enough.  I take the easy route of writing all the
complete bits of data that will fit.  With more complete specs, we could
probably do something different.

I noticed this while looking into an unused parameter warning.  The
warning was actually useful!

brw_performance_monitor.c: In function 'brw_get_perf_monitor_result':
brw_performance_monitor.c:1261:37: warning: unused parameter 'data_size' [-Wunused-parameter]
                             GLsizei data_size,
                                     ^

v2: Fix checks to include offset in the calculation.  Noticed by Jan.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2015-03-09 14:07:14 -07:00
Ian Romanick 78a211cee5 i965: Silence unused parameter warning
All dd functions take a gl_context as the first parameter.  Instead of
removing it, just silence the warning.

brw_performance_monitor.c: In function 'brw_new_perf_monitor':
brw_performance_monitor.c:1354:41: warning: unused parameter 'ctx' [-Wunused-parameter]
 brw_new_perf_monitor(struct gl_context *ctx)
                                         ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-09 14:07:14 -07:00