Commit Graph

139992 Commits

Author SHA1 Message Date
Lucas Stach 1c539bbb06 etnaviv: remove double assigment of surface->texture
surf->base.texture is already assigned earlier via a proper
pipe_resource_reference call. Remove the superfluous assignement.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7603>
2021-05-25 10:38:29 +00:00
Lucas Stach 3824429da0 frontend/dri: add EXPLICIT_FLUSH hint in dri2_resource_get_param
dri2_resource_get_param() is called from two different places right now.
Only one of them adds the EXPLICIT_FLUSH hint to the handle usage, which
may disable the optimizations provided by this hint without a reason.

Make sure to always add this hint when appropriate.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7603>
2021-05-25 10:38:29 +00:00
Lionel Landwerlin 40eb8b7830 intel/perf: rename metric descriptions
There is an effort to drop the "Gen" prefix from much of our codebase.
This just applies this to the metrics.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>
2021-05-25 10:09:44 +00:00
Lionel Landwerlin 16bff57543 intel/perf: update Gen9/11 programming for AsyncCompute
Adding a register, similar to what was done for RenderBasic.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>
2021-05-25 10:09:44 +00:00
Lionel Landwerlin 290f5a0156 intel/perf: add EHL availability condition to HDCAndSF counters
The availability of those counters depends on the topology.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>
2021-05-25 10:09:44 +00:00
Lionel Landwerlin 6ed558f8ca intel/perf: update Gen11 RenderBasic programming
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>
2021-05-25 10:09:44 +00:00
Lionel Landwerlin 6f9dcb05ff intel/perf: update Gen11 RenderBasic programming
Simple order change.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>
2021-05-25 10:09:44 +00:00
Lionel Landwerlin 16e344bc79 intel/perf: update gen9/11 TestOa configs
Programming an additional FLEX register.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10930>
2021-05-25 10:09:44 +00:00
Iago Toral Quiroga de75f43aef v3dv: expose VK_KHR_maintenance2
We don't do anything for input attachment aspects read by a subpass
since it doesn't have performance implications for us.

We also ignore the the new depth stencil layouts because they don't
have practical implications for our implementation.

We also ignore the new usage info for views since we are not currently
making decisions about views based on their usage.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>
2021-05-25 09:12:35 +00:00
Iago Toral Quiroga b32a48c7e2 v3dv: allow creating uncompressed views from compressed images and vice versa
Relevant CTS tests (requires VK_KHR_maintenance2):
dEQP-VK.image.texel_view_compatible.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>
2021-05-25 09:12:35 +00:00
Iago Toral Quiroga 8e3179545e v3dv: fix texture_size()
The uniform data for the texture size as produced by the compiler
contains the texture index directly and is not packed with
v3d_unit_data_create, so using v3d_unit_data_get_unit is not
correct.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>
2021-05-25 09:12:35 +00:00
Iago Toral Quiroga 32abeac8a8 v3dv: implement VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_POINT_CLIPPING_PROPERTIES
Relevant CTS test (requires VK_KHR_maintenance2);
dEQP-VK.clipping.clip_volume.clipped.large_points

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10951>
2021-05-25 09:12:35 +00:00
Erik Faye-Lund cb6827eb05 zink: simplify emit_load_const
This is the combination of two simplifications I spotted while
researching some other issue:

1. We can use nir_const_value_as_uint to save some conditionals
2. We can unify the vector and scalar code-paths to reduce some
   duplicated logic.

While we're at it, switch to using NIR_MAX_VEC_COMPONENTS rather than a
dynamic array size on the stack, because that tends to generate better
code.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10956>
2021-05-25 08:59:57 +00:00
Tomeu Vizoso 507e8907af ci/piglit: Use wget instead of ci-fairy to check a file exists
ci-fairy minio ls will try to list files in the path given, which for
trace buckets is generally forbidden. We don't really need to do any
listing in this case, so use wget instead to check that the reference
image doesn't exist yet.

Previous to this patch, trace jobs would re-upload all reference images
to minio every time because they wouldn't be able to verify that the
reference image was already there. Jobs would often take up to 4 minutes
needlessly re-uploading these files.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10953>
2021-05-25 06:58:28 +00:00
Yiwei Zhang c8e90a022e radv: fix AHB leak upon exportable allocation
A successful AHardwareBuffer_allocate itself will increase a refcount on
the newly allocated AHB. For the import case, the implementation must
acquire a reference on the AHB. So if we layer the exportable allocation
on top of AHB allocation and AHB import, we must release an AHB
reference to avoid leak.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10940>
2021-05-25 06:31:25 +00:00
Yiwei Zhang 2797c75426 anv: fix AHB leak upon exportable allocation
A successful AHardwareBuffer_allocate itself will increase a refcount on
the newly allocated AHB. For the import case, the implementation must
acquire a reference on the AHB. So if we layer the exportable allocation
on top of AHB allocation and AHB import, we must release an AHB
reference to avoid leak.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10940>
2021-05-25 06:31:25 +00:00
Icecream95 f18c55708a pan/mdg: Try scheduling load/store ops in pairs
If there are an even number of load/store ops to be scheduled, and
only one load/store op is available for scheduling, try using another
instruction type.

Helps bundle count at the cost of register pressure.

total instructions in shared programs: 333405 -> 333599 (0.06%)
instructions in affected programs: 27576 -> 27770 (0.70%)
helped: 43
HURT: 69
helped stats (abs) min: 1 max: 61 x̄: 5.49 x̃: 1
helped stats (rel) min: 0.18% max: 11.71% x̄: 2.27% x̃: 1.75%
HURT stats (abs)   min: 1 max: 95 x̄: 6.23 x̃: 2
HURT stats (rel)   min: 0.06% max: 32.42% x̄: 2.59% x̃: 1.53%
95% mean confidence interval for instructions value: -0.93 4.40
95% mean confidence interval for instructions %-change: -0.09% 1.53%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 155785 -> 152371 (-2.19%)
bundles in affected programs: 83689 -> 80275 (-4.08%)
helped: 2538
HURT: 110
helped stats (abs) min: 1 max: 59 x̄: 1.53 x̃: 1
helped stats (rel) min: 0.14% max: 22.52% x̄: 8.71% x̃: 7.69%
HURT stats (abs)   min: 1 max: 92 x̄: 4.32 x̃: 1
HURT stats (rel)   min: 0.21% max: 55.76% x̄: 4.61% x̃: 2.86%
95% mean confidence interval for bundles value: -1.41 -1.17
95% mean confidence interval for bundles %-change: -8.37% -7.94%
Bundles are helped.

total quadwords in shared programs: 264143 -> 260520 (-1.37%)
quadwords in affected programs: 141705 -> 138082 (-2.56%)
helped: 2560
HURT: 96
helped stats (abs) min: 1 max: 15 x̄: 1.49 x̃: 1
helped stats (rel) min: 0.06% max: 14.29% x̄: 5.62% x̃: 5.00%
HURT stats (abs)   min: 1 max: 11 x̄: 2.02 x̃: 2
HURT stats (rel)   min: 0.12% max: 6.20% x̄: 1.94% x̃: 1.47%
95% mean confidence interval for quadwords value: -1.42 -1.31
95% mean confidence interval for quadwords %-change: -5.50% -5.20%
Quadwords are helped.

total registers in shared programs: 21709 -> 22156 (2.06%)
registers in affected programs: 2684 -> 3131 (16.65%)
helped: 55
HURT: 470
helped stats (abs) min: 1 max: 2 x̄: 1.05 x̃: 1
helped stats (rel) min: 6.67% max: 40.00% x̄: 15.37% x̃: 14.29%
HURT stats (abs)   min: 1 max: 4 x̄: 1.07 x̃: 1
HURT stats (rel)   min: 6.67% max: 100.00% x̄: 31.63% x̃: 25.00%
95% mean confidence interval for registers value: 0.79 0.91
95% mean confidence interval for registers %-change: 24.69% 28.72%
Registers are HURT.

total threads in shared programs: 24450 -> 24360 (-0.37%)
threads in affected programs: 234 -> 144 (-38.46%)
helped: 12
HURT: 63
helped stats (abs) min: 1 max: 2 x̄: 1.50 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 1 max: 2 x̄: 1.71 x̃: 2
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: -1.49 -0.91
95% mean confidence interval for threads %-change: -38.74% -13.26%
Threads are [HURT].

total loops in shared programs: 286 -> 286 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total spills in shared programs: 521 -> 593 (13.82%)
spills in affected programs: 260 -> 332 (27.69%)
helped: 8
HURT: 9

total fills in shared programs: 1598 -> 1659 (3.82%)
fills in affected programs: 839 -> 900 (7.27%)
helped: 9

HURT: 10
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5745>
2021-05-24 20:54:37 +00:00
Alyssa Rosenzweig af78f52493 panfrost: Only link varyings once in good conditions
If the varying descriptors will always be the same for a given shader
variant (certainly true if none of separable shaders, transform
feedback, or point sprites are used), we only need to link once. Now
that pan_pool supports both owned and unowned modes, we have the
flexibility to reuse the code path for both allocation strategies.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10954>
2021-05-24 20:35:46 +00:00
Italo Nicola c746747cb8 panfrost: fix GL_EXT_multisampled_render_to_texture regression
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Fixes: ff3eada7eb ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10962>
2021-05-24 20:19:30 +00:00
Marek Olšák 80f0726e4c amd: add Beige Goby support
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>
2021-05-24 17:41:34 +00:00
Aaron Liu c54bb135aa amd: add Yellow Carp support
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>
2021-05-24 17:41:34 +00:00
Marek Olšák 0e8100bf58 radeonsi: simplify the NGG culling vertex count heuristic
This removes another chip-specific switch.
It enables a lower threshold on Navi1x, which should be fine.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10878>
2021-05-24 17:41:34 +00:00
Emma Anholt a76ec17f12 mesa/st: Fix iris regression with clip distances.
In general gallium shaders are all SSO and it's up to the driver to handle
lining up varying storage between stages at draw time.  However, there's a
NIR option "unify_interfaces" that iris uses which applies to non-SSO (as
indicated by nir->info.separate_shader) shaders and makes the inputs_read
and outputs_written match up at GLSL-to-NIR link time, and then iris then
avoids any lowering passes that would add new varyings.

By introducing info gathering after variant creation (because all I knew
was "gallium is always SSO"), I broke the unify_interfaces link-time setup
on iris.  Just skip that when the unify_interfaces flag is set, and add
some asserts to catch anyone trying to mix unify_interfaces with known
varying-adjusting lowering passes.

Closes: #4450
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10876>
2021-05-24 17:16:10 +00:00
Emma Anholt a7b1f30d1f ci/freedreno: Add glx-copy-sub-buffer to flakes on a530 and a630.
A630 just had one sample count marked, but when piglit's been shuffled,
samples=4 and non-msaa have showed up too.  Looks like from our history
a530 is flaky on it too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt c322a0dd24 ci/freedreno: Also mark waitformsc as flaky.
glx@glx_arb_sync_control@glxgetmscrateoml is the only non-flaky (so far)
arb_sync_control test on a630.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt dd2151e5f2 ci/freedreno: Mark a630 glx-visuals-depth/stencil as piglit flakes.
These seem to be present from the beginning of piglit runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt ee408df29c ci/freedreno: Consolidate ssbo.fragment_binding_array flake annotation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt fec60d5bee ci/freedreno: Drop VK flake annotations not seen in the last ~year.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt 4caf9b430d ci/freedreno: Add a link explaining get_display_plane_capabilities
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt a8c3783982 ci/freedreno: Drop a630 flake annotation from the go-fast changes.
The async fix seems to have fixed it, haven't seen this one since May 3rd.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt 1dbaaa22f9 ci/freedreno: Clear stale validation failure flake annotation.
Haven't seen it in my current set of IRC logs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emma Anholt a40479b6bc ci/freedreno: Clear compswap flake annotation.
These flakes disappeared around 2020-08 and the only sign since then has
been some flakes on versions of the ir3 RA rewrite.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10933>
2021-05-24 16:42:33 +00:00
Emil Velikov af2bf08bba gbm: list to stderr all the missing extension
This way people have a fighting chance of figuring out what's wrong.

v2: add gbm: prefix to the warning (Simon Ser)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10732>
2021-05-24 16:17:47 +00:00
Alejandro Piñeiro 77edb2d40d v3dv: don't use typedef enum with broadcom stages
This is the only place on the broadcom stack where we use "typedef
enum", so for consistency let's avoid it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10947>
2021-05-24 15:22:29 +00:00
Alyssa Rosenzweig 55db371223 ci: Condition s390x on specific drivers
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10926>
2021-05-24 14:56:51 +00:00
Alyssa Rosenzweig ebe1d2585b ci: Condition ppc64-el on specific drivers
Changes to Panfrost or Freedreno should not trigger ppc64 rebuilds.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10926>
2021-05-24 14:56:51 +00:00
Alyssa Rosenzweig 1595a9421b panfrost/ci: Split rules by ISA
Panfrost has two compilers, one for Midgard GPUs and one for Bifrost
GPUs. The respective compilers are src/panfrost/midgard and
src/panfrost/bifrost. Changes internal to just one compiler (or
disassembler) cannot affect the other hardware, so there's no need to
run extra jobs in these cases.

Also split out common vs Gallium panfrost so we can do the right thing
for panvk builds in the imminent future.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10924>
2021-05-24 13:27:26 +00:00
Icecream95 fe9d37b0c6 panfrost: Fix polygon list size computations
As noted in f5c293425f ("panfrost: Correct polygon size computations"),
"We do have to be careful to add the header size to total comptued BO
size."

Fixes: ff3eada7eb ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4660
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4737
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10943>
2021-05-24 13:05:32 +00:00
Mike Blumenkrantz f1ba85995c radeonsi: explicitly return support for all index buffer formats
this should not change current behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10914>
2021-05-24 12:44:06 +00:00
Tomeu Vizoso 324dd35d7c ci/lava: Add caching proxies for trace downloads
To avoid having to download the same traces again and again in each job,
use the caching proxy configured in the Collabora lab.

We can currently hardcode it like this because we don't test the same
driver in more than one lab, but when that changes we will need a more
flexible approach.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10949>
2021-05-24 11:35:41 +02:00
Erik Faye-Lund e1e207528f docs: update link to #lima
Similar to the other channels, #lima is also moving to OFTC, so let's
update the links as appropriate.

While we're at it, fix the URI scheme to use a slash as a host/channel
separator, and drop the hash for maximum compatibility.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10917>
2021-05-24 09:21:48 +00:00
Erik Faye-Lund e0bb2c5873 docs: update location of #panfrost
Panfrost has already moved their IRC-channel to OFTC, so let's update
the docs as well.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10917>
2021-05-24 09:21:48 +00:00
Erik Faye-Lund 04b00a65a4 docs: update link to #zink
We have decided to follow what's happening with #dri-devel for #zink as
well, so let's update our link there as well.

While we're at it, let's switch the link to an anonymous link, because
we're not referring to it anywhere, so it doesn't need to be named.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10917>
2021-05-24 09:21:48 +00:00
Erik Faye-Lund e6baf37778 docs: promote #dri-devel on oftc over freenode
Due to the recent changes at Freenode and the recommendation from the
X.Org board of moving to OFTC[1], many mesa-developers have moved over
to the #dri-devel channel on OFTC by now.

So let's promote that channel rather than the Freenode channel.

While we're at it, let's correct[2] the URI to use a slash to separate
between the host and channel. And omit the # from the channel name for
maximum compatibility.

[1]: https://lists.freedesktop.org/archives/mesa-dev/2021-May/225271.html
[2]: https://en.wikipedia.org/wiki/Internet_Relay_Chat#URI_scheme

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10917>
2021-05-24 09:21:48 +00:00
Samuel Pitoiset a00be79d80 radv: remove small overhead of radv_pipeline_has_ngg()
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4784
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10908>
2021-05-24 08:50:47 +00:00
Samuel Pitoiset ca783612e7 radv: simplify radv_pipeline_has_gs_copy_shader()
The GS copy shader should only be built if GS and without NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10908>
2021-05-24 08:50:47 +00:00
Samuel Pitoiset e98c61e9f3 radv: fix fast clearing DCC if one level can't be compressed on GFX10+
Fallback to a slow clear, this could be improved by splitting the
clear into two parts (one fast and one slow) but that's complicated.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10516>
2021-05-24 08:28:48 +00:00
Boris Brezillon b830613516 ci: Update to a new kernel fixing a bug in the panfrost driver
Should fix #4818.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10915>
2021-05-24 06:37:30 +00:00
Tomeu Vizoso 36e6367747 radv/ci: Test on Stoney on CI
Run part of the VK CTS in 3 devices with Stoney Ridge graphics.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10853>
2021-05-24 07:44:00 +02:00
Emma Anholt b6dd4d28b9 ci/iris: Switch GLK back to manual testing.
The glk boards are particularly slow, and we've had the lab get backed up,
causing many spurious failures in the last day due to #4819.  Just disable
this board by default for now until that can get sorted out.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10932>
2021-05-24 07:38:18 +02:00