Commit Graph

150207 Commits

Author SHA1 Message Date
Timur Kristóf 1912503224 radv: Don't disturb dynamic primitive topology with mesh shading.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14653>
2022-02-16 13:42:39 +00:00
Timur Kristóf da719792ad radv: Disable IB2 on compute queues.
The "IB2" indirect buffer command is not supported on compute queues
according to PAL, and it indeed causes GPU hangs when task shaders are
used together with vkCmdExecuteCommands.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15006>
2022-02-16 13:09:20 +00:00
Pierre-Eric Pelloux-Prayer 3fad6325cd radeonsi: use SI_PROFILE_CLAMP_DIV_BY_ZERO for viewperf
Only one shader from the Creo subtests needs this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14931>
2022-02-16 11:13:25 +00:00
Pierre-Eric Pelloux-Prayer 9685b5785b radeonsi: add SI_PROFILE_CLAMP_DIV_BY_ZERO
To enable divide by zero clamping per shader, instead of per app.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14931>
2022-02-16 11:13:25 +00:00
Corentin Noël 1367424501 ci: Uprev virglrenderer and crosvm
Ensure that we are using a recent virglrenderer to catch potential regressions
early.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15023>
2022-02-16 10:21:26 +00:00
Connor Abbott 3ef858a6f6 ir3/spill: Fix simplify_phi_nodes with multiple loop nesting
Once we simplified a phi node, we never updated the definition it points
to, which meant that it could become out of date if that definition were
also simplified, and we didn't check that when rewriting sources. That
could happen when there are multiple nested loops with phi nodes at the
header.

Fix it by updating the phi's pointer. Since we always update sources
after visiting the definition it points to, when we go to rewrite a
source, if that source points to a simplified phi, the phi's pointer
can't be pointing to a simplified phi because we already visited the phi
earlier in the pass and updated it, or else it's been simplified in the
meantime and this isn't the last pass. This way we don't need to
keep recursing when rewriting sources.

Fixes: 613eaac7b5 ("ir3: Initial support for spilling non-shared registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15035>
2022-02-16 09:55:39 +00:00
Tapani Pälli d3b4202b63 mesa/st: always use DXT5 when transcoding ASTC format
This fixes artifacts seen in games when using ASTC transcoding,
we need to use DXT5 for proper alpha channel support.

Number of components is a block specific property, there is no easy
way to see if we will require >1bit alpha support or not, so simply
use DXT5 to have support in place.

Fixes: 91cbe8d855 ("gallium: Add a transcode_astc driconf option")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15029>
2022-02-16 08:50:28 +00:00
Samuel Pitoiset 103699677b radv: allow to force per-vertex VRS if the config file is present
This is needed to add the primitive shading rate output to the vertex
or geometry shaders, even if the default value is 1x1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:29 +01:00
Samuel Pitoiset c50557d961 radv: allow applications to dynamically change RADV_FORCE_VRS
This introduces inotify support in RADV to handle changes from the
RADV_FORCE_VRS_CONFIG_FILE. This is similar to MangoHUD. I'm personally
not sure it's the best solution but let's try this way and change it
later if we have issues (or if we have a lightweight solution).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:29 +01:00
Samuel Pitoiset 5e2d9202e2 radv: add RADV_FORCE_VRS_CONFIG_FILE to configure per-vertex VRS
Similar to RADV_FORCE_VRS but from a file. If present, this is used
instead of RADV_FORCE_VRS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:29 +01:00
Samuel Pitoiset a862e15ee7 radv: rename RADV_FORCE_VRS_NONE to RADV_FORCE_VRS_1x1 and accept 1x1
It's the default value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:27 +01:00
Samuel Pitoiset b4f526cc19 radv: only re-emit the per-vertex VRS rates if necessary
This reduces the overhead slightly when the VRS rates don't change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:23 +01:00
Samuel Pitoiset 99d7c13051 radv: rework RADV_FORCE_VRS to make it more dynamic
The VRS rates are now emitted from the command buffer via an user SGPR
which will allow to change the rates dynamically in later changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:21 +01:00
Samuel Pitoiset cbd5724a6d aco: implement nir_intrinsic_load_vrs_rates_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:19 +01:00
Samuel Pitoiset 772aeff2c4 ac/llvm: implement nir_intrinsic_load_vrs_rates_amd
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:17 +01:00
Samuel Pitoiset 85436896c4 radv: declare a new shader argument for loading the VRS rates
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:15 +01:00
Samuel Pitoiset 74b932f8d3 nir: add nir_intrinsic_load_vrs_rates_amd
This intrinsic specific to RADV will be used to load VRS rates from
an user SGPR when RADV_FORCE_VRS is enabled by the application.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
2022-02-16 08:11:12 +01:00
Jason Ekstrand 9cbcdfb514 anv: use vk_image_view::format for creating dynamic renderpasses
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Jason Ekstrand 818c5dedf4 vulkan: Add back vk_image_view::format
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Jason Ekstrand 05e9e7767d vulkan: Rename vk_image_view::format to view_format
When I originally added vk_image_view, I was overly clever when it came
to the format field.  I decided to make it only contain the bits of the
format contained in the selected aspects.  However, this is confusing
(not generally a good thing) and it's also not always what you want.
The Vulkan 1.3.204 spec says:

    "When using an image view of a depth/stencil image to populate a
    descriptor set (e.g. for sampling in the shader, or for use as an
    input attachment), the aspectMask must only include one bit, which
    selects whether the image view is used for depth reads (i.e. using a
    floating-point sampler or input attachment in the shader) or stencil
    reads (i.e. using an unsigned integer sampler or input attachment in
    the shader). When an image view of a depth/stencil image is used as
    a depth/stencil framebuffer attachment, the aspectMask is ignored
    and both depth and stencil image subresources are used."

So, while the restricted format makes sense for texturing, it doesn't
for when the image is being used as an attachment.  What we probably
actually want is both versions of the format.  We'll call the one given
by the VkImageViewCreateInfo vk_image_view::format and the restricted
one vk_image_view::view_format.

This is just the first commit which switches format to view_format so
the compiler will make sure we get them all.  The next commit will
re-add vk_image_view::format but this time unmodified.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Yiwei Zhang 9dd15295e3 venus: properly destroy deferred ahb image before real image creation
Fixes: 19b7b09885 ("venus: prepare image creation helpers for AHB")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15037>
2022-02-15 21:32:02 +00:00
Emma Anholt 3652ff2fa1 draw: Don't look at .nir if !IR_NIR.
I suspect this double-check and comment was due to originally using ir.nir
as the condition, which might be uninitialized if !IR_NIR.  You could only
take the branch if IR_NIR was set, and you should always not take if it
!IR_NIR, so it worked out in the end, but it would cause spurious valgrind
warnings if you hadn't zeroed out your TGSI shader's struct.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14896>
2022-02-15 18:15:29 +00:00
Emma Anholt 780949c62b i915g: Initialize the rest of the "from_nir" temporary VS struct.
draw looked at the uninitialized XFB state, which should just be zeroed
out since i915 doesn't have XFB.

Fixes: 2b3fc26da8 ("i915g: Switch to using nir-to-tgsi.")
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14896>
2022-02-15 18:15:29 +00:00
Emma Anholt a6a651b96a r300: Delete the loop unrolling.
There were two paths in this code: One was transform_loops, which would
try to detect loops with an iteration count it understood and unroll that
many times.  The other was emulate_loops, which would just figure out how
many instructions the program could have and still compile (hopefully),
and unroll this loop however many times would fit in that.

The transform_loops had no analysis as good as GLSL or NIR loop unrolling
have, so it shouldn't be missed -- any opportunity it found would only be
due to bugs in the unrolling code.

The emulate_loops path had an issue with computing the number of times it
should try to unroll -- if you had more instrs than ALUs available
already, you'd overflow and unroll approximately infinitely many times,
OOMing the system.  But, also, it's better to throw a compiler error about
unsupported loops than to run the loop an incorrect number of times and
call it a success.

Fixes: #5883, #6018
Reviewed-by: Filip Gawin <filip.gawin@zoho.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15004>
2022-02-15 17:27:17 +00:00
Mike Blumenkrantz 4f3f245b78 zink: radv ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15033>
2022-02-15 11:22:44 -05:00
Simon Ser ffdac8bfa7 vulkan/wsi/wayland: ensure added formats have flags
A format needs to be either alpha or opaque, but can't be neither.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
2022-02-15 09:13:21 +00:00
Simon Ser 5617d5c885 vulkan/wsi/wayland: de-duplicate wsi_wl_display_add_wl_shm_format
Re-use wsi_wl_display_add_drm_format_modifier from
wsi_wl_display_add_wl_shm_format instead of maintaining two
separate switches for DRM and shm formats.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
2022-02-15 09:13:21 +00:00
Simon Ser 1bdf350197 vulkan/wsi/wayland: introduce wsi_wl_display_add_vk_format_modifier
This is a helper to avoid repetitive code in
wsi_wl_display_add_drm_format_modifier.

No functional changes, just refactoring.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
2022-02-15 09:13:21 +00:00
Simon Ser 8ac42a3b1b vulkan/wsi/wayland: switch from alpha/opaque bools to bitfield
This makes the numerous wsi_wl_display_add_vk_format calls easier
to follow: "ALPHA" is easier to decode than "true, false".

No functional changes, just refactoring.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
2022-02-15 09:13:21 +00:00
Juan A. Suarez Romero 801d33b2d9 vc4/ci: update failing piglit tests
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/6038.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15012>
2022-02-15 09:21:23 +01:00
Tapani Pälli ecc0041030 iris: fix a leak on surface states
Cc: mesa-stable
Closes:https://gitlab.freedesktop.org/mesa/mesa/-/issues/6013

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15010>
2022-02-15 07:06:50 +02:00
Dave Airlie cb296047f2 gallivm: fix missing cast in 4-bit blending paths.
This got noticed on an llvm debug build.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14987>
2022-02-15 04:09:33 +00:00
Mike Blumenkrantz b7f1f5c77d zink: ci updates
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
2022-02-15 03:33:31 +00:00
Mike Blumenkrantz e8ba9cee27 zink: always invalidate streamout counter buffer if not resuming
this otherwise treates begin/end/begin the same as begin/pause/resume

cc: mesa-stable

fixes:
KHR-GL46.texture_view.view_classes
KHR-GL46.transform_feedback.capture_geometry_separate_test
KHR-GL46.transform_feedback.capture_vertex_separate_test
KHR-GL46.transform_feedback.query_geometry_separate_test
KHR-GL46.transform_feedback.query_vertex_separate_test

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
2022-02-15 03:33:31 +00:00
Mike Blumenkrantz 5e7f4e66cc zink: export PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
2022-02-15 03:33:31 +00:00
Mike Blumenkrantz c99bd08921 zink: map R8G8B8X8_SRGB -> R8G8B8A8_SRGB
this fixes a weird texstore bug that seems specific to this format

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
2022-02-15 03:33:31 +00:00
Mike Blumenkrantz 89477baf95 zink: ci updates
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
2022-02-14 20:57:51 -05:00
Mike Blumenkrantz b054a233df zink: activate conditional render for compute dispatch when necessary
fixes:
KHR-GL46.compute_shader.conditional-dispatching

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
2022-02-14 20:56:55 -05:00
Mike Blumenkrantz ef4ab90d04 zink: restart conditional render when crossing batch boundary
this will only happen when conditional render was being used outside
of a renderpass

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
2022-02-14 20:56:55 -05:00
Mike Blumenkrantz 2cc309dd39 zink: always terminate conditional render when flushing a batch
we might not know whether conditional render is active,
so forcibly disable when necessary

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
2022-02-14 20:56:55 -05:00
Mike Blumenkrantz 082b42fbda zink: track internal conditional render state
this allows no-oping redundant calls

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
2022-02-14 20:56:55 -05:00
Iván Briano db48dcb4f3 intel/compiler: remove what looks like a bad rebase
This bit in the compiler looks like it was added by accident on one of
the latest versions of the original commit, but it clearly doesn't
belong there.

Fixes: 03e1e19246 ("anv: Refactor descriptor copy")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15016>
2022-02-15 01:04:47 +00:00
Dave Airlie 127bcbed18 gallivm/st/lvp: add flags arg to get_query_result_resource api.
Currently this just has wait, but in order to get the right answer
for vulkan partial, lavapipe/llvmpipe need to pass a partial flag
through here in the future.

This just changes the API so that's possible.

v2: use an enum (zmike)

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15009>
2022-02-15 10:12:01 +10:00
Emma Anholt b995a8eba4 nir_to_tgsi: Add support for FBFETCH.
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00
Emma Anholt eaf6e3d3af nir_to_tgsi: Don't vectorize 64-bit instructions, to keep virgl happy.
virglrenderer makes invalid shaders when faced with vector 64-bit
instructions, which GLSL-to-TGSI never produced.  While this doesn't fix
everything, it does get more tests running, and virgl probably the primary
consumer of 64-bit TGSI.  virgl may be deprecating its host 64-bit
support, at which point we can drop this workaround.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00
Emma Anholt 036d7172c2 virgl: Move double operands to a temp to avoid double-swizzling bugs.
virglrenderer applies the swizzle when packing doubles.  Since we use scan
now, we can just use the file count for texture detection.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00
Emma Anholt e643cb40a3 virgl: Move tex immediate operands to a temp to avoid virglrenderer bug.
Prior to the noted MR, virglrenderer encoded the tex operands in a
limited-size temp buffer which we could easily overflow with TGSI
immediates.  GLSL-to-TGSI always emitted an extra MOV, so keep that
behavior when nir-to-tgsi feeds us more optimized TGSI.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00
Emma Anholt bc912bace1 virgl: Add workarounds for virglrenderer input/sv signedness bugs.
GLSL-to-TGSI would emit some MOVs that made things OK, but NTT
successfully copy-propagates the inputs and sysvals more, triggering bugs
in virglrenderer when the signedness of the input is different from that
of the ALU op.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00
Emma Anholt f25ccac374 virgl: Apply TGSI transforms to compute shaders, too.
We need to do this for the upcoming virglrenderer workarounds.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00
Emma Anholt c491afaeab virgl: Add a workaround for virglrenderer output writemask bugs.
Various workaround paths in virglrenderer assume that outputs are written
with a full writemask, which is not required by TGSI.  To work around
that, store affected outputs in a temp and do a full write after each
writemasked write.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
2022-02-14 22:06:37 +00:00