Commit Graph

146792 Commits

Author SHA1 Message Date
Marek Olšák aad903c3f5 mesa: preparse [ and [0] in gl_resource_name and use it in shader_query.cpp
strrchr is very expensive here.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13507>
2021-10-29 07:19:20 -04:00
Marek Olšák 4b67055fef mesa: rename locals in _mesa_program_resource_find_name for clarity
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13507>
2021-10-29 07:19:20 -04:00
Marek Olšák 22d51f3c92 mesa: precompute strlen in gl_resource_name::length and use it
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13507>
2021-10-29 07:19:20 -04:00
Marek Olšák 81ad6a8b64 mesa: don't compute the same strlen up to 3x in _mesa_program_resource_find_name
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13507>
2021-10-29 07:19:20 -04:00
Marek Olšák dea558cbd2 glsl: add gl_resource_name to precompute "name" properties later
This just adds the structure with a name and its update function.
strlen and others will be added in the following commits. The idea is to
parse and analyze the name in advance to make glGetUniformLocation faster.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13507>
2021-10-29 07:19:18 -04:00
Marek Olšák c216f1931d mesa: use alloca in search_resource_hash
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13507>
2021-10-29 05:09:55 -04:00
Samuel Pitoiset 1776d741c5 zink: add CI lists and deqp-suite configuration for RADV
This is used by our local CI (ie. vk-cts-image) which is a separate
project outside of Mesa. We use it for testing RADV since a while.

The CI lists have been created against Navi2x (Sienna Cichlid).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13573>
2021-10-29 08:28:02 +00:00
Marek Olšák 76892c4e46 vbo: restructure vbo_save_vertex_list to get more cache hits
- Move more stuff into the cold structure.
- Reorder fields for better packing.
- Flatten the gallium and merged nested structures.

Since we have tens of thousands of these, decreasing the size improves
performance by 13%.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13506>
2021-10-29 07:33:50 +00:00
Marek Olšák 3835205a0e vbo: use int16_t for vbo_save_vertex_list::gallium::private_refcount
We never use more than 16 bits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13506>
2021-10-29 07:33:50 +00:00
Marek Olšák 97caca6b47 vbo: return a GL error earlier in vbo_save_playback_vertex_list_gallium
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13506>
2021-10-29 07:33:50 +00:00
Marek Olšák fa2c39df0f mesa: remove PADDING_64BIT by adding the dlist header into vbo_save_vertex_list
Now we can put useful data where the padding was.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13506>
2021-10-29 07:33:50 +00:00
Marek Olšák 05605d7f53 mesa: remove display list OPCODE_NOP
This decreases overhead because there are fewer nodes to parse.

There are 2 changes done here:
- If the next node offset is (offset % 8) == 4, pad the last node instead
  of inserting NOP. This makes sure that the node offset is aligned.
- The vertex list node will add 4 bytes to the header to make the payload
  aligned, so the payload will be at &n[2].

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13506>
2021-10-29 07:33:50 +00:00
Marek Olšák 4a26f57103 mesa: fix locking when destroying/overwriting/adding display lists
We need to hold the lock when calling destroy_list and doing
_mesa_HashInsertLocked in EndList.

So move the locking out of destroy_list.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13506>
2021-10-29 07:33:50 +00:00
Marek Olšák c494cfb1dd radeonsi: don't invoke si_decompress_depth if textures are not dirty at binding
This eliminates the overhead of invoking si_decompress_depth.

The complication here is that we need to update needs_depth_decompress_mask
every time we update dirty_level_mask.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13492>
2021-10-29 07:14:33 +00:00
Marek Olšák 0e54ac7a3c winsys/amdgpu: optimize looping inefficiencies in add_bo_fence_dependencies
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:22 +00:00
Marek Olšák c4ba003e2f winsys/amdgpu: move BO fence array updates to the CS thread
We always wait for num_active_ioctls == 0 before we use the fence,
so we can just add fences to BOs in the CS thread.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:22 +00:00
Marek Olšák 67de09acbd winsys/amdgpu: don't use ip_instance and ring fields of fence and IB structures
They are always 0.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:22 +00:00
Marek Olšák f6d072b2f0 winsys/amdgpu: increase the BO hash list size
This decreases overhead inside amdgpu_cs_add_buffer by 40%
for viewperf2020/catia.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:22 +00:00
Marek Olšák a5118bc97d winsys/amdgpu: don't clear RADEON_USAGE_SYNCHRONIZED for last_added_bo_usage
It was breaking the early return path.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:22 +00:00
Marek Olšák 107bc76882 winsys/amdgpu: remove an amdgpu_cs dereference from amdgpu_cs_add_buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák 8bb0c09f9e winsys/amdgpu: simplify parameter passing and derefs in cs_add_buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák 61bd8ec043 gallium/radeon: merge BO read/write usage flags with priority flags
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák 90ff5ef5c0 gallium/radeon: remove unused RADEON_DEPENDENCY_START_FENCE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák b5cf0d118c gallium/radeon: remove/merge some BO priorities and remove holes
The upper bits will be used by RADEON_USAGE_*

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák f815009036 gallium/radeon: change the BO priority definitions to bits
This is for the next microoptimization.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13478>
2021-10-29 06:54:21 +00:00
Marek Olšák a0f05a5b20 radeonsi: remove unused parameters in si_emit_draw_packets
This is a leftover from GS fast launch and compute-based culling.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13539>
2021-10-29 06:33:29 +00:00
Marek Olšák 98f696c972 radeonsi: enable shader culling for indirect draws
It was mistakenly disabled, decreasing performance a lot.

Only valid for Mesa 21.3.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: 21.3 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13539>
2021-10-29 06:33:29 +00:00
Greg V 98dbd01a96 util: make util_get_process_exec_path work on FreeBSD w/o procfs
sysctl is the correct way of getting the current executable's path.
procfs is not mounted by default.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1598>
2021-10-29 06:06:05 +00:00
Greg V 1d9eda1b57 util: __getProgramName: remove check for ancient FreeBSD versions, simplify ifdefs
FreeBSD 5.0 was released in 2003.
We really do not need to check that we're on >= 4.4.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1598>
2021-10-29 06:06:05 +00:00
Boyuan Zhang ed5d7987dc radeon/vcn: combine session init func
Combine the session init function for h.264 and hevc to reduce redundancy.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:15 +00:00
Boyuan Zhang ced5a54c13 radeon/vcn: combine encode params func
Combine the encode params function for h.264 and hevc to reduce redundancy.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:15 +00:00
Boyuan Zhang 49fff27d46 radeon/vcn: remove redundancy for vcn2 enc
Remove redundancy functions for vcn2 encode. Re-using the vcn1 quality params
function as a result.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:15 +00:00
Boyuan Zhang 4abc6d64e7 radeon/vcn: update vcn2 enc interface
Add missing parameters according to vcn 2 encode interface.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:14 +00:00
Boyuan Zhang 299097d17b radeon/vcn: update vcn1 enc interface
Update vcn 1 encode interface, upgrade interface minor version from 2 to 9,
and add necessary parameters accordingly.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13511>
2021-10-28 23:44:14 +00:00
Emma Anholt 8fb850651c ci: Enable testing radeonsi's libva using libva-util unit tests.
We've noticed issues with these tests when uprevving Mesa in Chrome OS.
This CI catches some existing failures, and some debug-build assertion
failures as well.

To do this, uprev deqp-runner for its new gtest-runner command.  This
runner is not as efficient as I would hope, due to some expensive code in
gtest.  I've reported the issue to gtest and it should be easily fixable,
but for now it at least means we get to use the same baseline/skip/flake
handling we have from deqp and piglit runners.

I also fixed build-libdrm for our rootfses to not throw away libdrm's
share directory, which was causing a bunch of test-time spam from radeon's
libdrm when trying to look up its marketing name tables (not that big of a
deal for deqp-runner, but really noisy for piglit and libva-utils which
make gallium screens approximatly per-test).

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13419>
2021-10-28 23:17:19 +00:00
Connor Abbott e6ae0e9b95 freedreno/a6xx: Emit GRAS_LRZ_MRT_BUF_INFO_0
Analogous to the previous commit, this fixes the case where turnip sets
this reg to a media (yuv) format and then a gallium job is run next.

Fixes: 9c895e13 ("tu: Emit GRAS_LRZ_MRT_BUF_INFO_0")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13578>
2021-10-28 22:19:09 +00:00
Connor Abbott 98c1448509 tu: Always write GRAS_LRZ_MRT_BUF_INFO_0
This fixes flakes in dEQP-VK.pipeline.stencil.nocolor.format.* when run
after ycbcr tests. Apparently LRZ needs to know if there's a media
format enabled even if there are no color attachments, so we need to
write something here. Presumably any "normal" format would work but 0
seems like a good neutral choice.

Fixes: 9c895e13 ("tu: Emit GRAS_LRZ_MRT_BUF_INFO_0")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13578>
2021-10-28 22:19:09 +00:00
Kenneth Graunke 2f58a63b2f intel/genxml: Add XY_BLOCK_COPY_BLT on Tigerlake and later.
This is a new blitter command introduced on Tigerlake and expanded
substantially on XeHP.  XY_BLOCK_COPY_BLT is actually fast, unlike
the legacy blitter commands.  iris will use this in the future, and
anv hopefully could use it for a transfer queue someday as well.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13520>
2021-10-28 14:17:32 -07:00
Kenneth Graunke 9163500aa1 intel/genxml: Allow MI_FLUSH_DW on the blitter
Pretty sure this is how you flush the blitter.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13520>
2021-10-28 14:17:32 -07:00
Kenneth Graunke d9ffdfc16d intel/genxml: Include blitter commands in gen*_pack.h
We're going to want to use the blitter again on newer hardware,
which means we need to be able to use genxml to emit those commands.

Acked-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13520>
2021-10-28 14:17:29 -07:00
Kenneth Graunke 7b78b2fcac intel/genxml: Assert that all MOCS fields are non-zero on Gfx7+
Let's try and catch performance problems before we have to do large
painful amounts of analysis to detect a missed field.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke ebe2a2b5f6 intel/genxml: Add an field option for nonzero="true"
This asserts that the value supplied is non-zero.  Useful for things
like MOCS fields on modern platforms where we really want to avoid
setting it to 0 (uncached).

mbz types cannot be flagged as nonzero.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke e6ebf5add7 i965: Set MOCS for Bindless Surface/Sampler State base addresses
We don't use bindless surface or sampler states today, and are unlikely
to ever implement that in i965, but we can set a MOCS value regardless
to avoid asserts in upcoming patches that assert MOCS isn't zero.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke 148ea65ee1 i965: Port STATE_BASE_ADDRESS to genxml and fix bugs
This largely copies crocus's code for this (but with Gfx9+ handling).

This version also fixes missing MOCS settings on several platforms,
which we hadn't noticed were missing.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke 0a64007676 i965: Fix MOCS for BLORP buffer copies
We were passing a MOCS of 0, which is uncached.  Yikes.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke 75e86afb50 i965: Set MOCS for 3DSTATE_INDEX_BUFFER on Gfx6/7 as well.
For some reason we were only setting this on Gfx8+.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke ab44a54646 i965: Set MOCS for 3DSTATE_SO_BUFFERS on Gfx7.x too
For some reason we were only setting this on Gfx8+.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke eaaa3c7e04 i965: Set MOCS on NULL stream output buffers
We'd like to add safeguards against accidental use of MOCS 0 (uncached),
which can have large performance implications.  One case where we use
MOCS of 0 is disabled stream output targets,  MOCS shouldn't matter, as
there's no actual buffer to be cached.

That said, it should be harmless to set MOCS for these null stream
output buffers; we can just assume a MOCS for generic internal buffers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke 59f53b07c4 i965: Set MOCS for push constant buffers on Haswell and Gfx9+
We set MOCS on Ivybridge/Baytrail, but not Haswell, and not Skylake
and later.  We shoud set it everywhere.  While we're at it, we also
set it for null constant buffers, so that we aren't programming a 0
MOCS, to allow us to add some safeguards against that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00
Kenneth Graunke d0e356b333 i965: Set default MOCS for NULL depth/stencil/HiZ buffers
isl now uses info->mocs regardless of whether there's any actual
depth/stencil/HiZ buffers involved, so pass it a legitimate one,
rather than zero.  When we have entirely NULL surfaces, we just
default to the MOCS value for an internal buffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
2021-10-28 19:45:56 +00:00