Commit Graph

71833 Commits

Author SHA1 Message Date
Francisco Jerez d0a42b457f i965/fs: Detect multi-register MOVs correctly in register_coalesce.
register_coalesce() was considering the exec_size of the MOV
instruction alone to decide whether the register at offset+1 of the
source VGRF was being copied to inst->dst.reg_offset+1 of the
destination VGRF, which is only a valid assumption if the move has a
32-bit execution type.  Use regs_read() instead to find out the number
of registers copied by the instruction.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-07-29 13:27:12 +03:00
Dave Airlie 2294ba9565 radeon: add support for streams to the common streamout code. (v2)
This adds to the common radeon streamout code, support
for multiple streams.

It updates radeonsi/r600 to set the enabled mask up.

v2: update for changes in previous patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-29 10:48:47 +01:00
Dave Airlie 3f0e7c28fe radeon: move streamout buffer config to streamout enable function. (v2)
This will be used here later.

v2: update atom sizes
add check for old vs new enabled mask

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-29 10:48:10 +01:00
Fabio Pedretti 19d88e3f9f docs: consolidate nvc0 status 2015-07-29 04:52:52 -04:00
Marta Lofstedt cb1cfb710c mesa/es3.1: enable GL_ARB_explicit_uniform_location for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 10:11:28 +03:00
Marta Lofstedt 49db765deb mesa/es3.1: enable GL_ARB_compute_shader for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 10:10:40 +03:00
Marta Lofstedt 49021e5058 mesa/es3.1: enable GL_ARB_texture_gather for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 10:03:19 +03:00
Marta Lofstedt c561b2faa8 mesa/es3.1: enable GL_ARB_texture_multisample for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 10:02:37 +03:00
Marta Lofstedt cd14fcbca0 mesa/es3.1: enable GL_ARB_shader_atomic_counters for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 10:02:00 +03:00
Marta Lofstedt 9ec50dc6bb mesa/es3.1: enable GL_ARB_shader_image_load_store for GLES 3.1
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 10:01:16 +03:00
Marta Lofstedt d1bb3b4910 mesa/es3.1: Add ES 3.1 handling to get.c and get_hash_generator.py
Signed-off-by: Marta Lofstedt <marta.lofstedt@linux.intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2015-07-29 09:59:44 +03:00
Eduardo Lima Mitev c00d093c8f mesa: Return INVALID_ENUM in glClearBufferiv() when buffer is not color or stencil
Page 497 of the PDF, section '17.4.3.1 Clearing Individual Buffers' of the
OpenGL 4.5 spec states:

    "An INVALID_ENUM error is generated by ClearBufferiv and
     ClearNamedFramebufferiv if buffer is not COLOR or STENCIL."

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.buffer.clear_bufferiv

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-07-29 08:13:12 +02:00
Kenneth Graunke 055e3a3f87 i965: Use real stage in "Unsupported form of variable indexing" warning.
Other stages can be miserably slow too!

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-28 23:03:08 -07:00
Kenneth Graunke e235ca159f glsl: Fix a bug where LHS swizzles of swizzles were too small.
A simple shader such as

   vec4 color;
   color.xy.x = 1.0;

would cause ir_assignment::set_lhs() to generate bogus IR:

   (swiz xy (swiz x (constant float (1.0))))

We were setting the number of components of each new RHS swizzle based
on the highest channel used in the LHS swizzle.  So, .xy.y would
generate (swiz xy (swiz xx ...)), while .xy.x would break.

Our existing Piglit test happened to use .xzy.z, which worked, since
'z' is the third component, resulting in an xxx swizzle.

This patch sets the number of swizzle components based on the size of
the LHS swizzle's inner value, so we always have the correct number
at each step.

Fixes new Piglit tests glsl-vs-swizzle-swizzle-lhs-[23].
Fixes ir_validate assertions in in Metro 2033 Redux.

v2: Move num_components updating completely out of update_rhs_swizzle
    (suggested by Timothy Arceri).  Simplify.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-07-28 22:56:10 -07:00
Tapani Pälli e17056f5a2 glsl: verify location when dual source blending
Same check is made for glBindFragDataLocationIndexed but it was missing
when using layout qualifiers.

Fixes following Piglit test:
	arb_blend_func_extended-output-location

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-07-29 08:17:55 +03:00
Tapani Pälli b868971e78 glsl: move max_index calc to assign_attribute_or_color_locations
Change function to get all gl_constants for inspection, this is used
by follow-up patch.

v2: rebase, update function documentation

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
2015-07-29 08:17:12 +03:00
Eric Anholt 2e04492a14 vc4: Skip re-emitting the shader_rec if it's unchanged.
It's a bunch of work for us to emit it (and its uniforms), more work for
the kernel to validate it, and additional work for the CLE to read
it. Improves es2gears framerate by about 50%.

Signed-off-by: Eric Anholt <eric@anholt.net>
2015-07-28 20:02:16 -07:00
Eric Anholt aefec4fa22 vc4: Drop unused vpm_offset value.
It's been dead since we started doing VS/CS attr offset setup during
shader compile.
2015-07-28 19:59:45 -07:00
Eric Anholt 1f5e070dd7 vc4: Simplify vc4_use_bo and make sure it's not a shader.
Since the conversion to keeping validated shaders around for the BO's
lifetime, we haven't been checking that rendering doesn't happen to
shaders.  Make vc4_use_bo check that always, and just don't use it for the
VC4_MODE_SHADER case (so now modes are unused)
2015-07-28 19:35:26 -07:00
Eric Anholt 044f7bbda0 vc4: Keep the validated shader around for the simulator execution.
This more closely matches the kernel behavior on shader validation now.
2015-07-28 19:35:26 -07:00
Eric Anholt 22954db71c vc4: Make the object be the return value from vc4_use_bo().
Drops 40 bytes of code from validation.
2015-07-28 19:35:26 -07:00
Eric Anholt cbb7477e8a vc4: Ensure that the bin CL is properly capped by increment/flush.
We don't want anything to appear after we've kicked off the render (and
thus job flush), since that might then get written out to the tile
allocation state.

Signed-off-by: Eric Anholt <eric@anholt.net>
2015-07-28 19:35:23 -07:00
Eric Anholt 601733da67 vc4: Drop NV shader reloc validation.
It wasn't validating enough, and we don't need the packet.
2015-07-28 19:35:23 -07:00
Eric Anholt 95faf2c639 vc4: Fix raster surface shadow updates under DRI2.
Glamor asks GBM for the handle of the BO, then flinks it itself.  We
were marking the bo non-private in the flink and dmabuf (DRI3) paths,
but not the GEM handle path.  As a result, non-pageflipping DRI2
swapbuffers (EGL apps, in particular) were never updating the texture.
2015-07-28 19:35:23 -07:00
Eric Anholt b0193adbe9 vc4: Fix bus errors on dumping CL on hardware.
The kernel can't fixup unaligned float traps for us, so deref as a
uint32_t first.
2015-07-28 19:35:22 -07:00
Jason Ekstrand 736c6f3cfc meta/copy_image: Stash off the scissor
The meta CopyImageSubData path uses BlitFramebuffers to do the actual copy.
The only thing that can affect BlitFramebuffers other than the currently
bound framebuffers is the scissor so we need to save that off and reset it.
If we don't do this, applications that use a scissor together with
CopyImageSubData will get accidentally scissored copies.

Tested-by: Markus Wick <markus at selfnet.de>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-07-28 17:50:10 -07:00
Dave Airlie bf4019a1c8 radeon: add streamout status 1-3 queries.
This adds support for queries against the non-0 vertex streams.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-29 00:00:37 +01:00
Marek Olšák 5142564734 st/mesa: remove st_context::missing textures and get_passthrough_fs
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Marek Olšák 72f31c63d7 st/mesa: remove st_finalize_textures atom
It only checks fragment textures and ignores other shaders, which makes it
incomplete, and textures are already finalized in update_single_texture.

There are no piglit regressions.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Marek Olšák 6ca3ff982a st/mesa: add shader dumping for shader-db
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Marek Olšák 768b4a25b9 st/mesa: fix GLSL 1.30 texture shadow functions with the GL_ALPHA depth mode (v2)
Fixes piglit:
    spec@glsl-1.30@execution@fs-texture-sampler2dshadow-10
    spec@glsl-1.30@execution@fs-texture-sampler2dshadow-11

v2: use st_shader_stage_to_ptarget

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-29 00:10:27 +02:00
Edward O'Callaghan 82546729e3 r600,radeonsi: GL_ARB_conditional_render_inverted
By using 'Tobias Klausmann' piglit test-suite patch. We obtain
a full 12/12 passes using this patch. By 'faking' to claim
support for this extension we obtain 7 fails and 5 passes.

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: Furkan Alaca <falaca@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-07-29 00:10:27 +02:00
Dave Airlie aa25a2c1ba radeonsi: add support for interpolateAt functions (v2)
This is part of ARB_gpu_shader5, and this passes
all the piglit tests currently available.

v2: use macros from the fine derivs commit.
add comments.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-28 22:13:27 +01:00
Chad Versace 56f1f47eda i965: Support importing R8 and GR88 dma_bufs
EGL_EXT_image_dma_buf_import now supports those formats.

Tests:
  - Tested by Piglit ext_image_dma_buf_import-transcode-nv12-as-r8-gr88.
  - Tested by Peter in Kodi/XBMC to obtain 60fps NV12 transcode at 4K.

Tested-by: Peter Frühberger <peter.fruehberger@gmail.com>
Signed-off-by: Chad Versace <chad.versace@intel.com>
2015-07-28 11:45:46 -07:00
Chad Versace fd865d56d2 egl: Add support for DRM_FORMAT_R8, RG88, and GR88
The Kodi/XBMC developers want to transcode NV12 to RGB with OpenGL shaders,
importing the two source planes through EGL_EXT_image_dma_buf_import. That
requires importing the Y plane as an R8 EGLImage and the UV plane as either an
RG88 or GR88 EGLImage.

This patch teaches the driver-independent part of EGL about the new
formats. Real driver support is left for follow-up patches.

The new formats landed in airlied's kernel branch 'drm-next' on July 24.

Tested-by: Peter Frühberger <peter.fruehberger@gmail.com>
Signed-off-by: Chad Versace <chad.versace@intel.com>
2015-07-28 11:43:28 -07:00
Ilia Mirkin 313940b03c nvc0/ir: trim out barrier sync for non-compute shaders
It seems like they're never necessary, and actively cause harm. This
fixes some of the barrier-related piglits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-28 02:38:43 -04:00
Ilia Mirkin ab63610a36 nvc0/ir: fix barrier emission
immediate arguments require a flag to be set for each one

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-28 02:30:01 -04:00
Eric Anholt 7850774f21 vc4: Add support for ARB_draw_elements_base_vertex.
Gallium exposes it unconditionally, so do our best to support it.  It
fails on the negative index cases, but those seem unlikely to be used in
the wild.
2015-07-27 22:48:20 -07:00
Rob Clark 98a4b111fb freedreno/ir3: add transform-feedback support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark 96d4db683f freedreno/ir3: track "keeps" in ir
Previously we had a fixed array to track kills, since they don't
generate an SSA value, and then cheated by stuffing them in the
outputs array before sending things through depth/sched/etc.  But
store instructions will need similar treatment.  So convert this
over to a more general array of instructions that must be kept
and fix up the places that were previously relying on kills being
in the output array.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark 020301bacc freedreno/ir3: add support for store instructions
For store instructions, the "dst" register is a read register, not a
written register.  (Ie. it is the address to store to.)  Lets not
confuse register allocation, scheduling, etc, with these details.
Instead just leave a dummy instr->regs[0], and take "dst" from
instr->regs[1] and srcs following.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark a240748de5 freedreno/ir3: cleanup driver-param stuff
Add 'enum ir3_driver_param' to track driver-param slots, and a
create_driver_param() helper to avoid having the knowledge about
where driver params are placed in const regs spread throughout
the code as we add additional driver-params.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark be8a8ebe57 freedreno: add transform-feedback state
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark bda1354aac freedreno: add resource tracking support for written buffers
With stream-out (transform-feedback) we have the case where resources
are *written* by the gpu, which needs basically the same tracking to
figure out when rendering must be flushed.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark 65d36a109a freedreno/a3xx+a4xx: add support for vtxcnt semantic
This will be used for stream-out (transform-feedback)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark 1b1ef6b457 freedreno/ir3: add stream-output support to cmdline compiler
A bit hard-coded configuration at the moment, but sufficient for now.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark 810763deb5 freedreno/ir3: drop unused create_input() arg
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:06 -04:00
Rob Clark 56462a3008 freedreno/ir3: move emit_const to ir3
Details of the cmdstream packets are different between a3xx and a4xx,
but the logic about the layout of const registers is the same, as that
is dictated by the ir3 shader compiler.  So rather than duplicating
logic that is tightly coupled to ir3 between a3xx and a4xx, move this
into ir3 and use per-generation callbacks for to build the cmdstream
packets.

This should make it easier to pass additional const regs (such as for
transform feedback).  And it also keeps the layout internal to ir3 in
case we want to make the layout more dynamic some day.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:05 -04:00
Rob Clark 0815729d96 freedreno/ir3: bit of shader API refactoring
Since for transform-feedback, we'll need more than just the TGSI
tokens from the state object, just pass the entire state object to
ir3_shader_create().  This also cleans things up a bit for some
day in the future when we could take shader either as TGSI or
directly NIR (for ex, glsl2nir or spirv2nir paths).  In the same
spirit, drop extra args from ir3_compile_shader_nir() (since it
can anyways get what it needs from the ir3_shader_variant).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:05 -04:00
Rob Clark bc5e2bec30 freedreno/ir3: updated cat6 encoding
Sync updated cat6 encoding from freedreno.git, needed to properly encode
store instructions.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-07-27 13:51:05 -04:00