Commit Graph

102306 Commits

Author SHA1 Message Date
Juan A. Suarez Romero 11a0d5563f docs: update calendar, add news and link release notes to 18.0.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
2018-05-17 18:45:26 +00:00
Juan A. Suarez Romero 042e21976a docs: add sha256 checksums for 18.0.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 69ef6e4a75255e60a4c4a2419d03c9352b9eb8f2)
2018-05-17 18:40:53 +00:00
Juan A. Suarez Romero bb7750e8da docs: add release notes for 18.0.4
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 3b49ab6219790c341ffb78a6eeaaa8b1a4b29bcc)
2018-05-17 18:40:51 +00:00
Mathias Fröhlich 6fac626193 mesa: The glArrayElement api is independent of the current program.
All the shader program dependent handling is done on the level
of the gl_Context::Array._DrawVAO/_DrawVAOEnabledAttribs.
So, skip array element invalidation on _NEW_PROGRAM.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-05-17 20:13:40 +02:00
Mathias Fröhlich 984cb4e512 mesa: Flag _NEW_ARRAY only if we are changing ctx->Array.VAO.
For the VAO internal helper functions that may be called
with a non current VAO, flag the _NEW_ARRAY state only
if it is the current ctx->Array.VAO.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-05-17 20:13:39 +02:00
Mathias Fröhlich 5c7e3a90ed mesa: Remove flush_vertices argument from VAO methods.
The flush_vertices argument is now unused, remove it.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-05-17 20:13:39 +02:00
Mathias Fröhlich 9c7be67968 mesa: Remove FLUSH_VERTICES from VAO state changes.
Pending draw calls on immediate mode or display list calls do
not depend on changes of the VAO state. So, remove calls to
FLUSH_VERTICES and flag _NEW_ARRAY as appropriate.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2018-05-17 20:13:39 +02:00
Juan A. Suarez Romero 0a2c947556 docs: add 18.0.5 in the release calendar
Mesa 18.1 series has not been released yet, so let's extend 18.0 lifetime.

v2: Add missing closing TR tags (Eric Engestrom)

CC: Andres Gomez <agomez@igalia.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
2018-05-17 19:01:19 +02:00
Alok Hota 936ce75285 swr/rast: Added FEClipRectangles event
and also added some comments

Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2018-05-17 10:53:14 -05:00
Alok Hota a33d376133 swr/rast: Whitespace and tab-to-spaces changes
Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2018-05-17 10:53:10 -05:00
Alok Hota 7970fcff25 swr/rast: fix VCVTPD2PS generation for AVX512
Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2018-05-17 10:53:06 -05:00
Alok Hota a0dddac1cb swr/rast: Rectlist support for GS
Add rectlist as an option for GS.  Needed to support some driver
optimizations.

Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2018-05-17 10:53:01 -05:00
Alok Hota 7926d18fa5 swr/rast: Remove unneeded virtual from methods
Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2018-05-17 10:52:21 -05:00
Stefan Schake b0acc3a562 broadcom/vc4: Native fence fd support
With the syncobj support in place, lets use it to implement the
EGL_ANDROID_native_fence_sync extension. This mostly follows previous
implementations in freedreno and etnaviv.

v2: Drop the flags (Eric)
    Handle in_fence_fd already in job_submit (Eric)
    Drop extra vc4_fence_context_init (Eric)
    Dup fds with CLOEXEC (Eric)
    Mention exact extension name (Eric)

Signed-off-by: Stefan Schake <stschake@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-05-17 16:04:30 +01:00
Stefan Schake 44036c354d broadcom/vc4: Store job fence in syncobj
This gives us access to the fence created for the render job.

v2: Drop flag (Eric)

Signed-off-by: Stefan Schake <stschake@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-05-17 16:04:28 +01:00
Stefan Schake 9ed05e2520 broadcom/vc4: Detect syncobj support
We need to know if the kernel supports syncobj submission since otherwise
all the DRM syncobj calls fail.

v2: Use drmGetCap to detect syncobj support (Eric)

Signed-off-by: Stefan Schake <stschake@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-05-17 16:04:26 +01:00
Stefan Schake 4fc0ebdff5 broadcom/vc4: Bump libdrm requirement
Require a version of libdrm with syncobj support.

v2: Don't require a libdrm_vc4, just bump core libdrm if vc4 enabled (by
    anholt)

Signed-off-by: Stefan Schake <stschake@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-05-17 16:04:24 +01:00
Stefan Schake 580d1f4c60 drm-uapi: Update vc4 header with syncobj submit support
v2: Synchronized with kernel v2
v3: Update for the finalized kernel ABI (pad2 field)

Signed-off-by: Stefan Schake <stschake@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-05-17 16:04:21 +01:00
Stefan Schake 1ec01a911b broadcom/vc4: Drop libdrm_vc4 requirement
This was missed in the move back to the local uapi copy.
libdrm_vc4 only seems to consist of headers that also exist in the
Mesa tree.

Signed-off-by: Stefan Schake <stschake@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-05-17 16:04:12 +01:00
Eric Anholt 97894b1267 v3d: Add support for glSampleMask / glSampleCoverage. 2018-05-17 15:09:46 +01:00
Eric Anholt 9bbc3f8cf1 v3d: Enable NaN propagation in the VS and CS as well.
Fixes piglit vs-isnan-*.shader_test at the expense of gl-1.0-spot-light.
2018-05-17 15:09:12 +01:00
Nanley Chery edfb57c0a0 i965/blorp: Disable BLORP clear color updates
With the previous patches, we now update the indirect clear color buffer
every time the clear color changes. Avoid redundant updates.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:42 -07:00
Nanley Chery 02f5512fed intel/blorp: Add a NO_UPDATE_CLEAR_COLOR batch flag
Allow callers to handle updating the indirect clear color buffer
themselves. This can reduce the number of clear color updates in the
case where a caller performs multiple fast clears with the same clear
color.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:42 -07:00
Nanley Chery f8ac11d69f i965/blorp: Also skip the fast clear if the clear color differs
If the aux state is CLEAR and clear color value has changed, only the
surface state must be updated. The bit-pattern in the aux buffer is
exactly the same.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:42 -07:00
Nanley Chery 43616404be i965/clear: Drop a stale comment in fast_clear_depth
This comment made more sense when it was above the calls to
intel_miptree_slice_set_needs_depth_resolve(). We stopped using these
functions at commit 554f7d6d02
("i965: Move depth to the new resolve functions").

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 82849fb6d5 i965: Update the indirect buffer in set_clear_color
For depth buffers, we avoid fast-clearing if the aux_state is already
CLEAR. We do the same for color buffers only if the clear color
doesn't change. We require that the clear colors match because, in
that case, we don't update the indirect clear color outside of BLORP.

Update the indirect clear color for color buffers as well. We'll
enable the same depth buffer optimization for color buffers in a
later patch.

Note that we're now actually updating the indirect clear color twice
in the case where we use BLORP to perform the fast-clear. This is
only temporary. In later patches, we'll prevent BLORP from performing
the update.

v2: Add more context to the commit message (Topi).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2018-05-17 07:06:41 -07:00
Nanley Chery 5b315f3ad1 i965/clear: Remove an early return in fast_clear_depth
Reduce complexity and allow the next patch to delete some code. With
this change, clear operations will still be skipped and setting the
aux_state will cause no side-effects.

Remove the associated comment which implies an early return.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 6f609ca609 i965: Use set_clear_color for depth miptrees
Reduce code duplication now and prevent it in the following commits.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 92a0a87b6f Revert "i965: Make the miptree clear color setter take a gl_color_union"
This reverts commit 1d94aa1987.

The next patch will make depth miptrees use the clear color setter that
was originally being used for color miptrees. Go back to using the
isl_color_value parameter because it's the same type as the
fast_clear_color field used by color and depth miptrees.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery bb18af82c3 i965/miptree: Unify aux buffer allocation
There isn't much that changes between the aux allocation functions.
Remove the duplicated code.

v2: Inline the switch statement (Jason).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 6c41a2ef3b i965: Prepare to delete intel_miptree_alloc_ccs()
We're going to delete intel_miptree_alloc_ccs() in the next commit. With
that in mind, replace the use of this function in
do_single_blorp_clear() with intel_miptree_alloc_aux() and move the
delayed allocation logic to it's callers.

v2: Duplicate the delayed allocation comment (Topi Pohjolainen).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery beed9c4550 i965/miptree: Drop the mt param from alloc_aux_buffer
Drop an unused parameter.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 6b1836aabe i965/miptree: Drop the alloc_flags param from alloc_aux_buffer
We have enough information to determine the optimal flags internally.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 3dd7f600e0 i965/miptree: Drop the name param from alloc_aux_buffer
A name of "aux-miptree" should be sufficient.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 58d99a21f1 i965/miptree: Initialize the indirect clear color to zero
The indirect clear color isn't correctly tracked in
intel_miptree::fast_clear_color. The initial value of ::fast_clear_color
is zero, while that of the indirect clear color is undefined.

Topi Pohjolainen discovered this issue with MCS buffers. This issue is
apparent when fast-clearing an MCS buffer for the first time with
glClearColor = {0.0,}. Although the indirect clear color is undefined,
the initial aux state of the MCS is CLEAR and the tracked clear color is
zero, so we avoid updating the indirect clear color with {0.0,}.

Make the indirect clear color match the initial value of
::fast_clear_color.

Note: although we only have to drop HiZ's BO_ALLOC_BUSY flag for gen10+,
we also drop it pre-gen10 to keep things simple. We add this flag back
for pre-gen10 in a later patch.

v2: Add a note about dropping HiZ's BO_ALLOC_BUSY flag (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery b58675e93f i965/miptree: Add and use a memset option in alloc_aux_buffer
Add infrastructure for initializing the clear color BO.
intel_miptree_init_mcs is no longer needed with change.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 8a9491058d i965/miptree: Zero-initialize CCS_D buffers
Before this patch, the aux_state was actually AUX_INVALID because the BO
was never defined. This was fine on single slice miptrees because we
would fast-clear the resource right after creation. For multi-slice
miptrees on SKL+ however, this results in undefined behavior when
accessing a non-base slice. Here's a specific example:

1) Fast clear level 0
   * Undefined CCS_D buffer allocated in "PASS_THROUGH" state.
   * Level 0 transitions to the CLEAR state.
2) Render to level 1
   * Level 1 may have a 2-bit pattern of 2's.
   * Rendering with a 2 in the CCS is undefined.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Nanley Chery 816f2dc67d i965/miptree: Fix handling of uninitialized MCS buffers
Before this patch, if we failed to initialize an MCS buffer, we'd
end up in a state in which the miptree thinks it has an MCS buffer,
but doesn't. We also leaked the clear_color_bo if it existed.

With this patch, we now free the miptree aux buffer resources and let
intel_miptree_alloc_mcs() know that the MCS buffer no longer exists.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-05-17 07:06:41 -07:00
Samuel Pitoiset 1fba2e10b3 radv: only declare the ESGS rings for pre GFX9 chips
GFX9 uses LDS instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 14:14:20 +02:00
Samuel Pitoiset d349d4bd24 radv: allow to print GPU info with RADV_DEBUG=info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 14:14:17 +02:00
Samuel Pitoiset 56d53ed1d6 radv: do not emit unnecessary ES output stores
GFX9:
Totals from affected shaders:
SGPRS: 472 -> 464 (-1.69 %)
VGPRS: 576 -> 584 (1.39 %)
Code Size: 45432 -> 44324 (-2.44 %) bytes
Max Waves: 40 -> 40 (0.00 %)

VI:
SGPRS: 720 -> 720 (0.00 %)
VGPRS: 728 -> 728 (0.00 %)
Code Size: 45348 -> 43992 (-2.99 %) bytes
Max Waves: 120 -> 120 (0.00 %)

This affects Rise of Tomb Raider and the three Vulkan demos
that use a geometry shader (geometryshader, deferredshadows
and viewportarray).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 14:14:13 +02:00
Samuel Pitoiset a6e44d1271 radv: do not emit unnecessary GS output stores
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 14:14:11 +02:00
Samuel Pitoiset 507402ada6 radv: only pass the global BO list at submit time if enabled
That way the winsys might use a faster path when the global
BO list is NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 13:48:27 +02:00
Samuel Pitoiset 6211799aff radv: remove the radv_finishme() when compiling shaders
Having an entrypoint different than "main" doesn't mean we
have multiple shaders per module.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 13:48:24 +02:00
Samuel Pitoiset 1e86eaf7d8 radv: remove radv_device::llvm_supports_spill
It's always true.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-05-17 13:48:21 +02:00
Timothy Arceri f71714022b mesa: add glUniform*ui{v} support to display lists
Fixes: a017c7ecb7 "mesa: display list support for uint uniforms"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78097
2018-05-17 13:07:48 +10:00
Dieter Nützel 7f1dc93357 radeonsi: create .gitignore
Signed-off-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2018-05-16 21:48:17 -04:00
Dave Airlie eba4cf797c ac/llvm: use amdgcn.tbuffer.store instead of SI.tbuffer.store intrinsic
Drop the use of the old intrinsic.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-05-17 11:46:53 +10:00
Eric Anholt b2e7c32703 v3d: Fix wiring filters to NEAREST for 32-bit texture returns.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104626
2018-05-16 21:19:07 +01:00
Eric Anholt 795488d2bf v3d: Enable the driver by default.
Now that we have a stabilized ABI and a fairly conformant driver, turn it
on.
2018-05-16 21:19:07 +01:00