Commit Graph

69864 Commits

Author SHA1 Message Date
Neil Roberts be119e80c9 i965/skl: Force the exec size to 8 when initing header for SIMD4x2
On Gen9+ there needs to be a header when sampling using SIMD4x2. The
header is set up by copying from the g0 register. Commit 07c571a39f
tried to fix this mov instruction to always use an exec size of 8
because previously it was incorrectly using 4. It did this by casting
the type of the destination register to vec8. This was done because
there is code in brw_set_dest to guess the exec size based on the
width of the dest register. However I misunderstood how this works
because it is actually only used when the width is less than 8. That
means the patch actually changed it to use the default exec size which
on SIMD16 would be 16 and the MOV would clobber over the first
register in the send message. This patch makes it additionally set the
default exec size to 8. This is similar to how the message is set up
in fs_generator::generate_tex.

I think this wasn't picked up by any Piglit tests because we don't
have any fragment shaders that hit this code path so nothing was using
SIMD16. However the patch caused failures in deqp tests.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90153
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
2015-05-01 11:46:22 +01:00
Kenneth Graunke 1ac7db07b3 i965: Unhardcode a few more stage names and abbreviations.
The stage_abbrev and stage_name fields in backend_visitor provide what
we need without any additional effort.  It also means we'll get the
right names for compute shaders, SIMD8 geometry shaders, and both kinds
of tessellation shaders.

This does unfortunately change the capitalization of the stage
abbreviation in the INTEL_DEBUG=optimizer output filenames.  It doesn't
seem worth adding code to handle, though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-04-30 11:49:50 -07:00
Marek Olšák 1db5d3c19e docs/relnotes: document the new EGL sync extensions 2015-04-30 14:38:38 +02:00
Marek Olšák e70de9b032 st/dri: implement the fence interface for CL events 2015-04-30 14:38:38 +02:00
Marek Olšák 952b5e84db gallium,clover: add OpenCL interoperability support for CL events
v2: - move interop.cpp to clover/api
    - change intptr_t to void* in the interface
    - add a virtual function fence() to simplify some code

v3: - use bool in the interface
v4: - enclose the last two interop functions in try..catch

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-04-30 14:38:38 +02:00
Marek Olšák 7070b0dd66 st/dri: implement the fence interface 2015-04-30 14:38:38 +02:00
Marek Olšák a2557b30d8 egl/dri2: return the latest sync status in eglGetSyncAttribKHR 2015-04-30 14:38:38 +02:00
Marek Olšák 290a3eb750 egl/dri2: implement EGL_KHR_cl_event2 (v2)
v2: fix the SYNC_CONDITION query
2015-04-30 14:38:38 +02:00
Marek Olšák a8617cc042 egl/dri2: implement EGL_KHR_wait_sync 2015-04-30 14:38:38 +02:00
Marek Olšák 9a0bda2430 egl/dri2: implement EGL_KHR_fence_sync 2015-04-30 14:38:38 +02:00
Marek Olšák 592ee249a1 mesa: add GL_OES_EGL_sync
This is an empty extension whose presence means that EGL sync objects can be
used with ES contexts.
2015-04-30 14:38:38 +02:00
Marek Olšák b02a5bf3ba dri_interface: add an interface for fences 2015-04-30 14:38:38 +02:00
Marek Olšák 396cbabbef egl/dri: don't expose configs with an accumulation buffer 2015-04-30 14:38:38 +02:00
Ilia Mirkin 33f0d1138d nvc0/ir: fix predicated PFETCH for real
Commit a9d08a250 accidentally didn't make use of the new src1 variable.
Use it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-30 02:02:47 -04:00
Ilia Mirkin db269ae495 nv50/ir: fix asFlow() const helper for OP_JOIN
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-29 23:34:30 -04:00
Ilia Mirkin a9d08a250a nvc0/ir: fix predicated PFETCH emission
src1 would contain the predicate, which would get emitted as a register
source by an undiscerning srcId helper. Work around this in the same way
as in emitTEX.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-29 23:34:22 -04:00
Ilia Mirkin 515ac907e6 gk110/ir: fix set with a register dest to not auto-set the abs flag
This was causing src0 to always have the absolute value flag set.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2015-04-29 18:03:19 -04:00
Topi Pohjolainen 13670e8bad i965/blorp: Prepare drawing rectangle for flipped coordinates
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:49 +03:00
Topi Pohjolainen dfd896699d i965/blorp: Add support for layered rendering
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:49 +03:00
Topi Pohjolainen 91daf9f09b i965/blorp: Allow blend state to be set for multiple render targets
Original blorp writes only one buffer per shader invocation. Once
the launch mechanism is shared with glsl-based programs there will
be need for supporting multiple render targets.

Also drop the always constant color write disable settings.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen 7fb0db4dd1 i965/blorp: Prepare for attributes other than render position
Note that the magic number of one in gen7 logic is replaced by
BRW_SF_URB_ENTRY_READ_OFFSET ( == 1 also) for clarity.

On gen6 the change from zero to one (BRW_SF_URB_ENTRY_READ_OFFSET)
has no effect for native blorp as blorp doesn't use any
additional attributes. In fact, regular pipeline setup always
uses BRW_SF_URB_ENTRY_READ_OFFSET even when there are no additional
attributes. Hence the change makes the two (blorp and regular)
consistent.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen 25ce6c6943 i965/blorp: Remove unused arguments
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen dce1972945 i965/gen7/blorp: Remove unused arguments
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen 4de0bef7f4 i965/blorp: Allow caller to provide sampler settings
v2 (Ken): s/use_unorm_coords/non_normalized_coords/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen bfdacac86c i965/blorp: Refactor vertex buffer state setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen d271a13ba3 i965/blorp: Remove constant parameter
This was still needed when we had support for blorp clears but now
this is fixed to nop.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen d7e49fba9a i965/gen8: Expose state base address setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:48 +03:00
Topi Pohjolainen fea168f495 i965/ps/gen8: Refactor state uploading
v2: Use SET_FIELD() for sampler count, and for that reason
    added GEN7_PS_SAMPLER_COUNT_MASK.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen 4047420ec4 i965/ps/gen7: Refactor state uploading
Now the uploading depends only on the input parameters instead
of consulting the current gl-state.

v2: Rebased on top of sampler count clamping

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen 02dbc79297 i965: Refactor sampler state setup
v2 (Matt): Moved * to the name.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen 47f32cb50d i965: Remove dependency to tex object in default color setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen 21071afc43 i965: Refactor and expose brw_upload_binding_table()
Read and write parts of the state stage are also split into
explicit arguments allowing future patches to use constant
program data.

v2 (Ken): s/BRW_NEW_WM_PROG_DATA/BRW_NEW_FS_PROG_DATA/

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen c15e20d8f6 i965: Expose and refactor brw_update_renderbuffer_surfaces()
Note that brw_update_renderbuffer_surfaces() already had a helper
variable which was used in parallel to direct access of the current
draw buffer of the context.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen c8b0d890c0 i965: Refactor rb surface setup to allow caller to store offsets
Notice that in gen7_wm_surface_state.c there is also indentation
change in the surrounding code removing tabs.

v2 (Matt): Fixed whitespace: tabs -> spaces

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen d6c83c9d86 i965/gen8: Use constant pointers for reading miptree details
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:47 +03:00
Topi Pohjolainen f39846fb57 i965/ps: Use SET_FIELD() for sampler count
The value is actually clamped to 0-16 as sample state pointer
can be used to support more than 16 samplers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-04-30 00:28:33 +03:00
Ian Romanick 2c7e289d8b glx: Massive update of comments in struct extension_info
In response to another patch, Emil asked for some clarification how this
stuff works.  Rather than just reply to the e-mail, I decided to update
the exlanation in the code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
2015-04-29 13:18:59 -07:00
Marek Olšák a582b22c63 winsys/radeon: add a private interface for radeon_surface 2015-04-29 21:51:40 +02:00
Marek Olšák dcfbc006b6 winsys/radeon: move radeon_winsys.h to drivers/radeon 2015-04-29 21:51:40 +02:00
EdB d8f817ae7f clover: remove util/compat
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 14:25:42 +00:00
Neil Roberts 5d4f085a43 i965: Don't try to apply the opt_sampler_eot extension for vs
The opt_sampler_eot optimisation of fs_visitor effectively assumes
that it is running on a fragment shader because it casts the program
key to a brw_wm_prog_key. However on Skylake fs_visitor can also be
used for vertex shaders. It looks like this usually works anyway
because the optimisation is skipped if key->nr_color_regions != 1.
However for a vertex shader the key is actually a brw_vs_prog_key so
the space for nr_color_regions is probably taken up by
key->base.program_string_id. This can end up making nr_color_regions
be 1 in which case the function will later assert when the last
instruction is not FS_OPCODE_FB_WRITE. This was making the DEQP test
suite assert. Presumably this only happens there because that compiles
a lot of shaders so it would end up with a high value for
program_string_id.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-29 15:31:45 +01:00
Emil Velikov b124dc2b70 r300: do not link against libdrm_intel
Accidentally added since the introduction of the file.

Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-04-29 15:15:19 +01:00
EdB 2d112ed961 clover: make module::symbol::name a string
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:45:07 +00:00
EdB 5ca9b23319 clover: remove compat::string
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:45:00 +00:00
EdB 1b4a1d0049 clover: remove compat classes that match std one
Acked-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:44:53 +00:00
EdB 3c61ff0d89 clover: compile all sources with c++11
Later we can remove the compat code

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-29 12:43:55 +00:00
Axel Davy 231be57ee2 st/nine: Remove Managed texture hack.
Previously binding an unitialized managed texture
was causing a crash, and a workaround was added to
prevent the crash.

This patch removes this workaround and instead set the initial
state of managed textures as dirty, so that when the texture is bound
for the first time, it is always initialized.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy 58d295d41e st/nine: Enforce LOD 0 for D3DUSAGE_AUTOGENMIPMAP
For D3DUSAGE_AUTOGENMIPMAP textures, applications can only
lock/copy from/get surface descriptor for/etc the first level.
Thus it makes sense to restrict the LOD to 0, and use only the first
level to generate the sublevels.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy 6f57e01436 st/nine: Some D3DUSAGE_AUTOGENMIPMAP fixes
Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00
Axel Davy 24eca6a30d st/nine: util_gen_mipmap doesn't need we reset states.
util_gen_mipmap uses pipe->blit, and thus doesn't need
we restore all states after using it.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
2015-04-29 08:28:11 +02:00