Commit Graph

252 Commits

Author SHA1 Message Date
Timur Kristóf aadb3d69d1 radv: Refactor some CP DMA functions to work with radeon_cmdbuf.
Allow emitting these packets without a radv_cmd_buffer object.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>
2022-07-20 19:00:30 +00:00
Samuel Pitoiset e9b2fa6527 radv: fix wide points/lines by configuring the guardband correctly
Fixes all remaining wide points/lines failures with Zink.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6121
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17392>
2022-07-12 09:11:40 +02:00
Samuel Pitoiset d88c859b4e radv: do not emit more non-existent registers on GFX11
Found these by diffing the list of registers between GFX10_3 and GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
2022-05-26 07:43:38 +00:00
Samuel Pitoiset 98f3727d56 radv: unify radv_pipeline_has_XXX() helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
2022-05-25 11:39:20 +00:00
Samuel Pitoiset 6fe6570e76 radv: rename radv_cmd_state::pipeline to graphics_pipeline
To be consistent with compute pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
2022-05-25 11:39:20 +00:00
Samuel Pitoiset 23be0aad9c radv: split radv_pipeline into radv_{graphics,compute,library}pipeline
Instead of using a union in radv_pipeline, this introduces new
structures for graphics, compute and library pipelines which inherit
from radv_pipeline. This will ease graphics pipeline libary implem.

There is still no radv_raytracing_pipeline because RADV actually
uses a compute pipeline for everything but it could be introduced
later when necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
2022-05-23 07:32:56 +00:00
Samuel Pitoiset 9b4c346029 radv: more register changes on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16419>
2022-05-17 10:08:17 +00:00
Samuel Pitoiset 7f31917119 radv: limit CP DMA to max 32KB sizes on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16419>
2022-05-17 10:08:17 +00:00
Samuel Pitoiset 995ab9a505 radv: do not emit FLUSH_AND_INV_DB_META on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16419>
2022-05-17 10:08:17 +00:00
Samuel Pitoiset 2e3aec1633 radv: do not emit non-existent CP_COHER_START_DELAY on GFX11
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16419>
2022-05-17 10:08:17 +00:00
Bas Nieuwenhuizen e96a35e6db radv: gfx11 register changes.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16419>
2022-05-17 10:08:17 +00:00
Marek Olšák 39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level"
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
2022-05-13 14:56:22 -04:00
Marek Olšák 7203723120 amd: rename RING_* enums to AMD_IP_*
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16360>
2022-05-10 06:59:55 +00:00
Marek Olšák 980b7f75e8 amd: enable gfx11 in header generator, fix drivers with renamed gfx6-10 defs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Dave Airlie 1ec4e568de radv: abstract queue family away from queue family index.
If we introduce another queue type (video decode) we can have a
disconnect between the RADV_QUEUE_ enum and the API queue_family_index.

currently the driver has
GENERAL, COMPUTE, TRANSFER which would end up at QFI 0, 1, <nothing>
since we don't create transfer.

Now if I add VDEC we get
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, 1, <nothing>, 2
or if you do nocompute
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, <nothing>, <nothing>, 1

This means we have to add a remapping table between the API qfi
and the internal qf.

This patches tries to do that, in theory right now it just adds
overhead, but I'd like to exercise these paths.

v2: add radv_queue_ring abstraction, and pass physical device in,
as it makes adding uvd later easier.
v3: rename, and drop one direction as unneeded now, drop queue_family_index
from cmd_buffers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13687>
2022-03-11 04:38:55 +00:00
Samuel Pitoiset a224b7a057 radv: fix allocating/uploading the trap handler shader
Since shaders are allocated per pipeline, the trap handler shader
was not uploaded at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
2022-02-14 08:31:10 +01:00
Samuel Pitoiset c47b8d7bf3 radv: optimize CPU overhead of si_cp_dma_prefetch() slightly
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5008
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14618>
2022-01-21 20:15:52 +00:00
Marek Olšák 3ea5beca1f radv: apply spi_cu_en to CU_EN
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14122>
2022-01-05 01:36:10 -05:00
Marek Olšák 955c6de1c1 radv: set COMPUTE_DESTINATION_EN_SEn to spi_cu_en
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14122>
2022-01-05 01:36:10 -05:00
Bas Nieuwenhuizen 6968c87e97 radv: Add named constants for max framebuffer width/height.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
2021-12-05 17:21:32 +00:00
Samuel Pitoiset e04101c34e radv: only emit PGM_LO for the vertex prolog
Shaders are allocated in the 32-bit address space.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13551>
2021-11-09 10:13:38 +00:00
Samuel Pitoiset 9b80f4d5f2 radv: rename radv_shader_variant to radv_shader
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13548>
2021-11-01 20:04:45 +00:00
Bas Nieuwenhuizen fd8210f27e radv: Try to do a better job of dealing with L2 coherent images.
Only try to invalidate L2 if we actually hit one of the incoherent images.

Note we may actually insert some extra flushes at the end of a command
buffer so that we may asume the caches are clean the start of the next
command buffer. However, on average I think that case is uncommon
enough that being able to make assumptions at the start of a cmdbuffer
is beneficial. Especially since MSAA is somewhat rare in more recent
games.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13239>
2021-10-13 14:07:05 +00:00
Rhys Perry 404752bfb2 radv: add radv_shader_variant_get_va and radv_find_shader_variant helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11717>
2021-10-13 05:13:10 +00:00
Samuel Pitoiset 55e6a68f69 radv: disable the DX10 diamond test for better line rasterization perf
Ported from RadeonSI. PAL also doesn't enable it for Vulkan.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13066>
2021-10-04 07:21:51 +00:00
Timur Kristóf cb05c85abd radv: Disable HW generated edge flags for NGG shaders.
Vulkan doesn't support user edge flags, and also doesn't have
any decomposed primitives where drawing internal edges should
be disallowed. Hence, we don't need this.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12998>
2021-09-23 15:52:26 +02:00
Samuel Pitoiset 971a373caf radv: use radeon_set_sh_reg_seq() more for initial gfx/compute state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12671>
2021-09-01 20:46:29 +00:00
Samuel Pitoiset e0353296da radv: allocate shaders to 32-bit address to skip PGM_HI
This reduces the number of emitted registers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12466>
2021-08-23 11:28:21 +00:00
Timur Kristóf d911259c3a radv: Use ac_compute_late_alloc in radv_pipeline.
This aligns RADV with RadeonSI in how it handles late alloc,
making it easier for us to deal with deadlocks and such.

Also move setting the RSRC3 registers for VS, GS and NGG
into radv_pipeline.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11905>
2021-08-04 15:37:05 +00:00
Samuel Pitoiset 87b0962fef radv: do not use radeon_set_context_reg_seq() for only one register
radeon_set_context_reg() is a shortcut for that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
2021-07-30 17:05:38 +02:00
Pierre-Eric Pelloux-Prayer 3914bd457b amd/registers: fix fields conflict detection
The existing code handled the case where the new definition of the
same field was larger than the old one.
This commit adds a check to handle the reverse case: the new def
is smaller than the old one (= so writing using the merged macro
would affect the next fields).

The affected fields are:
* LGKM_CNT (in SQ_WAVE_IB_STS)
* DONUT_SPLIT (in VGT_TESS_DISTRIBUTION)
* HEAD_QUEUE (in GDS_GWS_RESOURCE)

DONUT_SPLIT is the only one used by radeonsi/radv.

Fixes: e6184b0892 ("amd/registers: scripts for processing register descriptions in JSON")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12063>
2021-07-30 08:50:38 +00:00
Mike Blumenkrantz 1e13cb1965 radv: merge si_write_viewport into radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Timur Kristóf ed163a44b6 radv: Expose radv_get_viewport_xform in radv_private.h
We need to emit viewport transform information for culling shaders.
This is used for small primitive culling.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10525>
2021-07-13 23:56:33 +00:00
Marek Olšák 66f254b4e6 radeonsi,radv: fix a late alloc deadlock with <= 6 CUs per SA
We should always prevent 1 CU from executing VS and GS waves
to prevent a deadlock.

Fixes: c377f45c18 "radeonsi/gfx10: rewrite late alloc computation"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11754>
2021-07-08 18:37:41 +00:00
Timur Kristóf 4fcb7e96b8 radv: Set parameter cache oversubscription according to the PC lines.
This matches how RadeonSI also sets this register.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711>
2021-07-08 16:54:29 +02:00
Bas Nieuwenhuizen f9cc94af7b radv/winsys: Add support for a fixed VA address for replay.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10570>
2021-07-05 17:27:51 +00:00
Bas Nieuwenhuizen 8025b4120f radv/winsys: Return vulkan errors for buffer creation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10570>
2021-07-05 17:27:51 +00:00
Samuel Pitoiset 380742b9f3 radv: fix missing default state for DB_DFSM_CONTROL
Fixes: 69ae02151d ("radv: remove DFSM")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11028>
2021-05-27 11:48:29 +00:00
Samuel Pitoiset c40d7fadc3 radv: implement dynamic primitive restart enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10340>
2021-05-06 20:58:59 +00:00
Bas Nieuwenhuizen 057ec395a4 radv: Refactor cs_domain to be a winsys function.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10198>
2021-04-14 15:16:17 +00:00
Bas Nieuwenhuizen 59c501ca35 radv: Format.
Using

find ./src/amd/vulkan -regex '.*/.*\.\(c\|h\|cpp\)' | xargs -P8 -n1 clang-format --style=file -i

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091>
2021-04-10 03:31:58 +02:00
Samuel Pitoiset 549f41754a radv: use explicit VRS mode when configuring PA_CL_VRS_CNTL
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7794>
2021-04-09 14:47:52 +02:00
Marek Olšák b3e7c77f13 amd: fix parsing the last dword of DMA_DATA packets
It was parsing it as SQ_WAVE_GPR_ALLOC instead of COMMAND.
Change the offset to an odd number to work around it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
2021-04-02 12:05:00 +00:00
Samuel Pitoiset f5540209ab radv: enable VRS 2x2 coarse shading for flat shading on GFX10.3+
This should safe to enable and shouldn't degrade the quality.
It decreases the number of PS invocations by 4 when used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9515>
2021-03-22 12:36:26 +01:00
Samuel Pitoiset 88f42ea93e radv: emit the trap handler registers earlier
Directly into the GFX init IB.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
2021-02-19 08:58:19 +00:00
Rhys Perry d906c007d6 radv: use a more relaxed alignment for upload buffer allocations
256 bytes was higher than necessary.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8833>
2021-02-11 11:44:06 +00:00
Samuel Pitoiset e02b1577d0 radv/winsys: remove the radv_amdgpu_winsys_bo::ws indirection
This saves a 64-bit pointer from radv_amdgpu_winsys_bo and it's
also common to pass a winsys pointer as the first parameter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
2021-02-08 08:45:38 +01:00
Samuel Pitoiset 64ed873405 radv: remove radv_util.h
util_bitcount() is already defined in src/util/bitscan.h.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8711>
2021-01-26 17:31:03 +01:00
Samuel Pitoiset 23461897fe radv: add support for emitting PS_DONE/CS_DONE on GFX6-8
On GFX6, EOS events are always emitted with EVENT_WRITE_EOS.
On GFX7+, EOS events are emitted with EVENT_WRITE_EOS on the
graphics queue, and with RELEASE_MEM on the compute queue.

Fixes: 9c65f1f111 ("radv: synchronize Cmd{Set,Write}Event() using PS_DONE/CS_DONE events")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8710>
2021-01-26 09:26:58 +00:00
Samuel Pitoiset c3ac6f7cd7 radv: flush L2 metadata as part of CB/DB flush instead of CS_DONE on GFX9
This restores the previous logic because L2 coherency was fully
implemented. It appears that flushing L2 metadata with a CS_DONE
event hangs.

This fixes GPU hangs with Monster Hunter World.

Fixes: 4a783a3c ("radv: Use L2 coherency on GFX9+.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8566>
2021-01-19 07:47:34 +01:00