amd/gfx11: add PixelWaitSync packet fields
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16990>
This commit is contained in:
Marek Olšák
Marge Bot
parent
7d8847d963
commit
ee7150da79
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@ -297,6 +297,16 @@ static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
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ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib);
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break;
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case PKT3_ACQUIRE_MEM:
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if (ib->gfx_level >= GFX11 && G_585_PWS_ENA(ib->ib[ib->cur_dw + 5])) {
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ac_dump_reg(f, ib->gfx_level, R_580_ACQUIRE_MEM_PWS_2, ac_ib_get(ib), ~0);
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print_named_value(f, "GCR_SIZE", ac_ib_get(ib), 32);
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print_named_value(f, "GCR_SIZE_HI", ac_ib_get(ib), 25);
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print_named_value(f, "GCR_BASE_LO", ac_ib_get(ib), 32);
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print_named_value(f, "GCR_BASE_HI", ac_ib_get(ib), 32);
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ac_dump_reg(f, ib->gfx_level, R_585_ACQUIRE_MEM_PWS_7, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->gfx_level, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
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break;
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}
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ac_dump_reg(f, ib->gfx_level, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->gfx_level, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
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ac_dump_reg(f, ib->gfx_level, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
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@ -118,6 +118,91 @@
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{"name": "SEQ_FORWARD", "value": 1},
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{"name": "SEQ_REVERSE", "value": 2}
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]
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},
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"PWS_STAGE_SEL": {
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"entries": [
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{"name": "PRE_DEPTH", "value": 0},
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{"name": "PRE_SHADER", "value": 1},
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{"name": "PRE_COLOR", "value": 2},
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{"name": "PRE_PIX_SHADER", "value": 3},
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{"name": "CP_PFP", "value": 4},
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{"name": "CP_ME", "value": 5}
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]
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},
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"PWS_COUNTER_SEL": {
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"entries": [
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{"name": "TS_SELECT", "value": 0},
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{"name": "PS_SELECT", "value": 1},
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{"name": "CS_SELECT", "value": 2}
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]
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},
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"VGT_EVENT_TYPE_gfx11": {
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"entries": [
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{"name": "Reserved_0x00", "value": 0},
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{"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
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{"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
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{"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
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{"name": "CACHE_FLUSH_TS", "value": 4},
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{"name": "CONTEXT_DONE", "value": 5},
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{"name": "CACHE_FLUSH", "value": 6},
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{"name": "CS_PARTIAL_FLUSH", "value": 7},
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{"name": "VGT_STREAMOUT_SYNC", "value": 8},
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{"name": "Reserved_0x09", "value": 9},
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{"name": "VGT_STREAMOUT_RESET", "value": 10},
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{"name": "END_OF_PIPE_INCR_DE", "value": 11},
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{"name": "END_OF_PIPE_IB_END", "value": 12},
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{"name": "RST_PIX_CNT", "value": 13},
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{"name": "BREAK_BATCH", "value": 14},
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{"name": "VS_PARTIAL_FLUSH", "value": 15},
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{"name": "PS_PARTIAL_FLUSH", "value": 16},
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{"name": "FLUSH_HS_OUTPUT", "value": 17},
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{"name": "FLUSH_DFSM", "value": 18},
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{"name": "RESET_TO_LOWEST_VGT", "value": 19},
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{"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
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{"name": "WAIT_SYNC", "value": 21},
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{"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
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{"name": "PERFCOUNTER_START", "value": 23},
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{"name": "PERFCOUNTER_STOP", "value": 24},
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{"name": "PIPELINESTAT_START", "value": 25},
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{"name": "PIPELINESTAT_STOP", "value": 26},
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{"name": "PERFCOUNTER_SAMPLE", "value": 27},
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{"name": "FLUSH_ES_OUTPUT", "value": 28},
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{"name": "BIN_CONF_OVERRIDE_CHECK", "value": 29},
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{"name": "SAMPLE_PIPELINESTAT", "value": 30},
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{"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
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{"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
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{"name": "RESET_VTX_CNT", "value": 33},
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{"name": "BLOCK_CONTEXT_DONE", "value": 34},
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{"name": "CS_CONTEXT_DONE", "value": 35},
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{"name": "VGT_FLUSH", "value": 36},
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{"name": "TGID_ROLLOVER", "value": 37},
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{"name": "SQ_NON_EVENT", "value": 38},
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{"name": "SC_SEND_DB_VPZ", "value": 39},
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{"name": "BOTTOM_OF_PIPE_TS", "value": 40},
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{"name": "FLUSH_SX_TS", "value": 41},
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{"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
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{"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
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{"name": "FLUSH_AND_INV_DB_META", "value": 44},
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{"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
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{"name": "FLUSH_AND_INV_CB_META", "value": 46},
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{"name": "CS_DONE", "value": 47},
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{"name": "PS_DONE", "value": 48},
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{"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
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{"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
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{"name": "THREAD_TRACE_START", "value": 51},
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{"name": "THREAD_TRACE_STOP", "value": 52},
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{"name": "THREAD_TRACE_MARKER", "value": 53},
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{"name": "THREAD_TRACE_DRAW", "value": 54},
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{"name": "THREAD_TRACE_FINISH", "value": 55},
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{"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
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{"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
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{"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
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{"name": "CONTEXT_SUSPEND", "value": 59},
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{"name": "OFFCHIP_HS_DEALLOC", "value": 60},
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{"name": "ENABLE_NGG_PIPELINE", "value": 61},
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{"name": "ENABLE_LEGACY_PIPELINE", "value": 62},
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{"name": "DRAW_DONE", "value": 63}
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]
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}
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},
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"register_mappings": [
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@ -243,11 +328,17 @@
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"type_ref": "IB_CONTROL"
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},
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{
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"chips": ["gfx10", "gfx103", "gfx11"],
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"chips": ["gfx10", "gfx103"],
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"map": {"at": 1168, "to": "pkt3"},
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"name": "RELEASE_MEM_OP",
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"type_ref": "RELEASE_MEM_OP"
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},
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{
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"chips": ["gfx11"],
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"map": {"at": 1168, "to": "pkt3"},
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"name": "RELEASE_MEM_OP",
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"type_ref": "RELEASE_MEM_OP_gfx11"
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},
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{
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"chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx10", "gfx103", "gfx11"],
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"map": {"at": 1282, "to": "pkt3"},
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@ -257,6 +348,18 @@
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"chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx10", "gfx103", "gfx11"],
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"map": {"at": 1281, "to": "pkt3"},
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"name": "SRC_ADDR_LO"
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},
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{
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"chips": ["gfx11"],
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"map": {"at": 1408, "to": "pkt3"},
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"name": "ACQUIRE_MEM_PWS_2",
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"type_ref": "ACQUIRE_MEM_PWS_2"
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},
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{
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"chips": ["gfx11"],
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"map": {"at": 1413, "to": "pkt3"},
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"name": "ACQUIRE_MEM_PWS_7",
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"type_ref": "ACQUIRE_MEM_PWS_7"
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}
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],
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"register_types": {
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@ -411,6 +514,41 @@
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{"bits": [21, 21], "name": "GL2_WB"},
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{"bits": [22, 23], "enum_ref": "GCR_SEQ", "name": "SEQ"}
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]
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},
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"RELEASE_MEM_OP_gfx11": {
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"fields": [
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{"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE_gfx11", "name": "EVENT_TYPE"},
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{"bits": [7, 7], "name": "WAIT_SYNC"},
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{"bits": [8, 11], "name": "EVENT_INDEX"},
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{"bits": [12, 12], "name": "GLM_WB"},
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{"bits": [13, 13], "name": "GLM_INV"},
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{"bits": [14, 14], "name": "GLV_INV"},
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{"bits": [15, 15], "name": "GL1_INV"},
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{"bits": [16, 16], "name": "GL2_US"},
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{"bits": [17, 18], "enum_ref": "GCR_GL2_RANGE", "name": "GL2_RANGE"},
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{"bits": [19, 19], "name": "GL2_DISCARD"},
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{"bits": [20, 20], "name": "GL2_INV"},
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{"bits": [21, 21], "name": "GL2_WB"},
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{"bits": [22, 23], "enum_ref": "GCR_SEQ", "name": "SEQ"},
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{"bits": [24, 24], "name": "GLK_WB"},
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{"bits": [25, 26], "name": "CACHE_POLICY"},
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{"bits": [28, 29], "name": "EXECUTE"},
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{"bits": [30, 30], "name": "GLK_INV"},
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{"bits": [31, 31], "name": "PWS_ENABLE"}
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]
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},
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"ACQUIRE_MEM_PWS_2": {
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"fields": [
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{"bits": [11, 13], "enum_ref": "PWS_STAGE_SEL", "name": "PWS_STAGE_SEL"},
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{"bits": [14, 15], "enum_ref": "PWS_COUNTER_SEL", "name": "PWS_COUNTER_SEL"},
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{"bits": [17, 17], "name": "PWS_ENA2"},
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{"bits": [18, 23], "name": "PWS_COUNT"}
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]
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},
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"ACQUIRE_MEM_PWS_7": {
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"fields": [
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{"bits": [31, 31], "name": "PWS_ENA"}
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]
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}
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}
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}
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