From ee7150da79b9b8f6bddf179cdb032bfe9877b8ff Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 19 May 2022 20:12:08 -0400 Subject: [PATCH] amd/gfx11: add PixelWaitSync packet fields Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/amd/common/ac_debug.c | 10 +++ src/amd/registers/pkt3.json | 140 +++++++++++++++++++++++++++++++++++- 2 files changed, 149 insertions(+), 1 deletion(-) diff --git a/src/amd/common/ac_debug.c b/src/amd/common/ac_debug.c index a9b45cf66c4..ddc89b3cc8f 100644 --- a/src/amd/common/ac_debug.c +++ b/src/amd/common/ac_debug.c @@ -297,6 +297,16 @@ static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib, ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib); break; case PKT3_ACQUIRE_MEM: + if (ib->gfx_level >= GFX11 && G_585_PWS_ENA(ib->ib[ib->cur_dw + 5])) { + ac_dump_reg(f, ib->gfx_level, R_580_ACQUIRE_MEM_PWS_2, ac_ib_get(ib), ~0); + print_named_value(f, "GCR_SIZE", ac_ib_get(ib), 32); + print_named_value(f, "GCR_SIZE_HI", ac_ib_get(ib), 25); + print_named_value(f, "GCR_BASE_LO", ac_ib_get(ib), 32); + print_named_value(f, "GCR_BASE_HI", ac_ib_get(ib), 32); + ac_dump_reg(f, ib->gfx_level, R_585_ACQUIRE_MEM_PWS_7, ac_ib_get(ib), ~0); + ac_dump_reg(f, ib->gfx_level, R_586_GCR_CNTL, ac_ib_get(ib), ~0); + break; + } ac_dump_reg(f, ib->gfx_level, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0); ac_dump_reg(f, ib->gfx_level, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0); ac_dump_reg(f, ib->gfx_level, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0); diff --git a/src/amd/registers/pkt3.json b/src/amd/registers/pkt3.json index 01edf965cc7..e54196e9eed 100644 --- a/src/amd/registers/pkt3.json +++ b/src/amd/registers/pkt3.json @@ -118,6 +118,91 @@ {"name": "SEQ_FORWARD", "value": 1}, {"name": "SEQ_REVERSE", "value": 2} ] + }, + "PWS_STAGE_SEL": { + "entries": [ + {"name": "PRE_DEPTH", "value": 0}, + {"name": "PRE_SHADER", "value": 1}, + {"name": "PRE_COLOR", "value": 2}, + {"name": "PRE_PIX_SHADER", "value": 3}, + {"name": "CP_PFP", "value": 4}, + {"name": "CP_ME", "value": 5} + ] + }, + "PWS_COUNTER_SEL": { + "entries": [ + {"name": "TS_SELECT", "value": 0}, + {"name": "PS_SELECT", "value": 1}, + {"name": "CS_SELECT", "value": 2} + ] + }, + "VGT_EVENT_TYPE_gfx11": { + "entries": [ + {"name": "Reserved_0x00", "value": 0}, + {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1}, + {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2}, + {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3}, + {"name": "CACHE_FLUSH_TS", "value": 4}, + {"name": "CONTEXT_DONE", "value": 5}, + {"name": "CACHE_FLUSH", "value": 6}, + {"name": "CS_PARTIAL_FLUSH", "value": 7}, + {"name": "VGT_STREAMOUT_SYNC", "value": 8}, + {"name": "Reserved_0x09", "value": 9}, + {"name": "VGT_STREAMOUT_RESET", "value": 10}, + {"name": "END_OF_PIPE_INCR_DE", "value": 11}, + {"name": "END_OF_PIPE_IB_END", "value": 12}, + {"name": "RST_PIX_CNT", "value": 13}, + {"name": "BREAK_BATCH", "value": 14}, + {"name": "VS_PARTIAL_FLUSH", "value": 15}, + {"name": "PS_PARTIAL_FLUSH", "value": 16}, + {"name": "FLUSH_HS_OUTPUT", "value": 17}, + {"name": "FLUSH_DFSM", "value": 18}, + {"name": "RESET_TO_LOWEST_VGT", "value": 19}, + {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20}, + {"name": "WAIT_SYNC", "value": 21}, + {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22}, + {"name": "PERFCOUNTER_START", "value": 23}, + {"name": "PERFCOUNTER_STOP", "value": 24}, + {"name": "PIPELINESTAT_START", "value": 25}, + {"name": "PIPELINESTAT_STOP", "value": 26}, + {"name": "PERFCOUNTER_SAMPLE", "value": 27}, + {"name": "FLUSH_ES_OUTPUT", "value": 28}, + {"name": "BIN_CONF_OVERRIDE_CHECK", "value": 29}, + {"name": "SAMPLE_PIPELINESTAT", "value": 30}, + {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31}, + {"name": "SAMPLE_STREAMOUTSTATS", "value": 32}, + {"name": "RESET_VTX_CNT", "value": 33}, + {"name": "BLOCK_CONTEXT_DONE", "value": 34}, + {"name": "CS_CONTEXT_DONE", "value": 35}, + {"name": "VGT_FLUSH", "value": 36}, + {"name": "TGID_ROLLOVER", "value": 37}, + {"name": "SQ_NON_EVENT", "value": 38}, + {"name": "SC_SEND_DB_VPZ", "value": 39}, + {"name": "BOTTOM_OF_PIPE_TS", "value": 40}, + {"name": "FLUSH_SX_TS", "value": 41}, + {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42}, + {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43}, + {"name": "FLUSH_AND_INV_DB_META", "value": 44}, + {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45}, + {"name": "FLUSH_AND_INV_CB_META", "value": 46}, + {"name": "CS_DONE", "value": 47}, + {"name": "PS_DONE", "value": 48}, + {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49}, + {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50}, + {"name": "THREAD_TRACE_START", "value": 51}, + {"name": "THREAD_TRACE_STOP", "value": 52}, + {"name": "THREAD_TRACE_MARKER", "value": 53}, + {"name": "THREAD_TRACE_DRAW", "value": 54}, + {"name": "THREAD_TRACE_FINISH", "value": 55}, + {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56}, + {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57}, + {"name": "PIXEL_PIPE_STAT_RESET", "value": 58}, + {"name": "CONTEXT_SUSPEND", "value": 59}, + {"name": "OFFCHIP_HS_DEALLOC", "value": 60}, + {"name": "ENABLE_NGG_PIPELINE", "value": 61}, + {"name": "ENABLE_LEGACY_PIPELINE", "value": 62}, + {"name": "DRAW_DONE", "value": 63} + ] } }, "register_mappings": [ @@ -243,11 +328,17 @@ "type_ref": "IB_CONTROL" }, { - "chips": ["gfx10", "gfx103", "gfx11"], + "chips": ["gfx10", "gfx103"], "map": {"at": 1168, "to": "pkt3"}, "name": "RELEASE_MEM_OP", "type_ref": "RELEASE_MEM_OP" }, + { + "chips": ["gfx11"], + "map": {"at": 1168, "to": "pkt3"}, + "name": "RELEASE_MEM_OP", + "type_ref": "RELEASE_MEM_OP_gfx11" + }, { "chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx10", "gfx103", "gfx11"], "map": {"at": 1282, "to": "pkt3"}, @@ -257,6 +348,18 @@ "chips": ["gfx6", "gfx7", "gfx8", "gfx81", "gfx9", "gfx10", "gfx103", "gfx11"], "map": {"at": 1281, "to": "pkt3"}, "name": "SRC_ADDR_LO" + }, + { + "chips": ["gfx11"], + "map": {"at": 1408, "to": "pkt3"}, + "name": "ACQUIRE_MEM_PWS_2", + "type_ref": "ACQUIRE_MEM_PWS_2" + }, + { + "chips": ["gfx11"], + "map": {"at": 1413, "to": "pkt3"}, + "name": "ACQUIRE_MEM_PWS_7", + "type_ref": "ACQUIRE_MEM_PWS_7" } ], "register_types": { @@ -411,6 +514,41 @@ {"bits": [21, 21], "name": "GL2_WB"}, {"bits": [22, 23], "enum_ref": "GCR_SEQ", "name": "SEQ"} ] + }, + "RELEASE_MEM_OP_gfx11": { + "fields": [ + {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE_gfx11", "name": "EVENT_TYPE"}, + {"bits": [7, 7], "name": "WAIT_SYNC"}, + {"bits": [8, 11], "name": "EVENT_INDEX"}, + {"bits": [12, 12], "name": "GLM_WB"}, + {"bits": [13, 13], "name": "GLM_INV"}, + {"bits": [14, 14], "name": "GLV_INV"}, + {"bits": [15, 15], "name": "GL1_INV"}, + {"bits": [16, 16], "name": "GL2_US"}, + {"bits": [17, 18], "enum_ref": "GCR_GL2_RANGE", "name": "GL2_RANGE"}, + {"bits": [19, 19], "name": "GL2_DISCARD"}, + {"bits": [20, 20], "name": "GL2_INV"}, + {"bits": [21, 21], "name": "GL2_WB"}, + {"bits": [22, 23], "enum_ref": "GCR_SEQ", "name": "SEQ"}, + {"bits": [24, 24], "name": "GLK_WB"}, + {"bits": [25, 26], "name": "CACHE_POLICY"}, + {"bits": [28, 29], "name": "EXECUTE"}, + {"bits": [30, 30], "name": "GLK_INV"}, + {"bits": [31, 31], "name": "PWS_ENABLE"} + ] + }, + "ACQUIRE_MEM_PWS_2": { + "fields": [ + {"bits": [11, 13], "enum_ref": "PWS_STAGE_SEL", "name": "PWS_STAGE_SEL"}, + {"bits": [14, 15], "enum_ref": "PWS_COUNTER_SEL", "name": "PWS_COUNTER_SEL"}, + {"bits": [17, 17], "name": "PWS_ENA2"}, + {"bits": [18, 23], "name": "PWS_COUNT"} + ] + }, + "ACQUIRE_MEM_PWS_7": { + "fields": [ + {"bits": [31, 31], "name": "PWS_ENA"} + ] } } }