i965/gen6: Force ALL_SLICES_AT_EACH_LOD for separate stencil/hiz
For gen6 we will use the ALL_SLICES_AT_EACH_LOD miptree layout for separate stencil/hiz. This is needed because gen6 hiz and separate stencil only support a single miplevel. When accessing the other LODs, we will program a tile aligned offset for the bo. PRM Volume 1, Part 1, 7.18.3.7.2 For separate stencil buffer [DevILK] to [DevSNB]: "The separate stencil buffer does not support mip mapping, thus the storage for LODs other than LOD 0 is not needed." We still allocate storage for the other stencil mip-levels within a single texture, but each mip-level will use non-mip-array spacing. PRM Volume 2, Part 1, 7.5.3 Hierarchical Depth Buffer "[DevSNB]: The hierarchical depth buffer does not support the LOD field, it is assumed by hardware to be zero. A separate hierarachical depth buffer is required for each LOD used, and the corresponding buffer’s state delivered to hardware each time a new depth buffer state with modified LOD is delivered." We allocate storage for the other hiz mip-levels within a single texture, but each mip-level will use non-mip-array spacing. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -379,6 +379,7 @@ intel_miptree_create_layout(struct brw_context *brw,
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_mesa_get_format_base_format(format) == GL_DEPTH_STENCIL &&
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_mesa_get_format_base_format(format) == GL_DEPTH_STENCIL &&
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(brw->must_use_separate_stencil ||
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(brw->must_use_separate_stencil ||
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(brw->has_separate_stencil && brw_is_hiz_depth_format(brw, format)))) {
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(brw->has_separate_stencil && brw_is_hiz_depth_format(brw, format)))) {
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const bool force_all_slices_at_each_lod = brw->gen == 6;
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mt->stencil_mt = intel_miptree_create(brw,
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mt->stencil_mt = intel_miptree_create(brw,
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mt->target,
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mt->target,
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MESA_FORMAT_S_UINT8,
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MESA_FORMAT_S_UINT8,
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@ -390,7 +391,7 @@ intel_miptree_create_layout(struct brw_context *brw,
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true,
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true,
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num_samples,
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num_samples,
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INTEL_MIPTREE_TILING_ANY,
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INTEL_MIPTREE_TILING_ANY,
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false);
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force_all_slices_at_each_lod);
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if (!mt->stencil_mt) {
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if (!mt->stencil_mt) {
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intel_miptree_release(&mt);
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intel_miptree_release(&mt);
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return NULL;
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return NULL;
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@ -1407,6 +1408,7 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
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struct intel_mipmap_tree *mt)
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struct intel_mipmap_tree *mt)
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{
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{
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assert(mt->hiz_mt == NULL);
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assert(mt->hiz_mt == NULL);
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const bool force_all_slices_at_each_lod = brw->gen == 6;
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mt->hiz_mt = intel_miptree_create(brw,
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mt->hiz_mt = intel_miptree_create(brw,
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mt->target,
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mt->target,
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mt->format,
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mt->format,
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@ -1418,7 +1420,7 @@ intel_miptree_alloc_hiz(struct brw_context *brw,
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true,
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true,
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mt->num_samples,
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mt->num_samples,
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INTEL_MIPTREE_TILING_ANY,
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INTEL_MIPTREE_TILING_ANY,
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false);
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force_all_slices_at_each_lod);
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if (!mt->hiz_mt)
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if (!mt->hiz_mt)
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return false;
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return false;
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