2009-07-13 22:58:45 +01:00
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/*
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2009-02-27 18:52:49 +00:00
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* Copyright © 2009 Corbin Simpson
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2011-02-11 04:59:02 +00:00
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* Copyright © 2011 Marek Olšák <maraeo@gmail.com>
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2009-02-27 18:52:49 +00:00
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* All Rights Reserved.
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2009-07-13 22:58:45 +01:00
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*
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2009-02-27 18:52:49 +00:00
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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2009-07-13 22:58:45 +01:00
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*
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2009-02-27 18:52:49 +00:00
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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2009-07-13 22:58:45 +01:00
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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2009-02-27 18:52:49 +00:00
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/*
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* Authors:
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* Corbin Simpson <MostAwesomeDude@gmail.com>
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2009-08-28 19:05:52 +01:00
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* Joakim Sindholt <opensource@zhasha.com>
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2011-02-11 04:59:02 +00:00
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* Marek Olšák <maraeo@gmail.com>
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2009-02-27 18:52:49 +00:00
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*/
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2009-03-04 05:14:33 +00:00
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2010-12-23 09:40:54 +00:00
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#include "radeon_drm_bo.h"
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r300g: rework command submission and resource space checking
The motivation behind this rework is to get some speed by reducing
CPU overhead. The performance increase depends on many factors,
but it's measurable (I think it's about 10% increase in Torcs).
This commit replaces libdrm's radeon_cs_gem with our own implemention.
It's optimized specifically for r300g, but r600g could use it as well.
Reloc writes and space checking are faster and simpler than their
counterparts in libdrm (the time complexity of all the functions
is O(1) in nearly all scenarios, thanks to hashing).
(libdrm's radeon_bo_gem is still being used in the driver.)
It works like this:
cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and
also adds the size of 'buf' to the used_gart and used_vram winsys variables
based on the domains, which are simply or'd for the accounting purposes.
The adding is skipped if the reloc is already present in the list, but it
accounts any newly-referenced domains.
cs_validate is then called, which just checks:
used_vram/gart < vram/gart_size * 0.8
The 0.8 number allows for some memory fragmentation. If the validation
fails, the pipe driver flushes CS and tries do the validation again,
i.e. it validates only that one operation. If it fails again, it drops
the operation on the floor and prints some nasty message to stderr.
cs_write_reloc(cs, buf) just writes a reloc that has been added using
cs_add_reloc. The read_domain and write_domain parameters have been removed,
because we already specify them in cs_add_reloc.
The space checking has been tested by putting small values in vram/gart_size
variables.
2010-12-04 03:38:15 +00:00
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#include "radeon_drm_cs.h"
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2010-06-06 11:56:23 +01:00
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#include "radeon_drm_public.h"
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2010-02-27 01:46:20 +00:00
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2010-12-04 03:36:02 +00:00
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#include "pipebuffer/pb_bufmgr.h"
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2010-02-27 01:46:20 +00:00
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#include "util/u_memory.h"
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2010-12-04 03:36:02 +00:00
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#include <xf86drm.h>
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#include <stdio.h>
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2010-02-12 05:39:51 +00:00
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2011-12-02 15:20:29 +00:00
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/*
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* this are copy from radeon_drm, once an updated libdrm is released
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* we should bump configure.ac requirement for it and remove the following
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* field
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*/
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2011-07-22 19:15:47 +01:00
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#ifndef RADEON_INFO_TILING_CONFIG
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#define RADEON_INFO_TILING_CONFIG 6
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#endif
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2010-08-07 01:05:03 +01:00
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#ifndef RADEON_INFO_WANT_HYPERZ
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#define RADEON_INFO_WANT_HYPERZ 7
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#endif
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2011-07-22 19:15:47 +01:00
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2011-01-27 22:13:28 +00:00
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#ifndef RADEON_INFO_WANT_CMASK
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#define RADEON_INFO_WANT_CMASK 8
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#endif
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2011-07-22 19:15:47 +01:00
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#ifndef RADEON_INFO_CLOCK_CRYSTAL_FREQ
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#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 9
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#endif
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2011-07-22 18:25:07 +01:00
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#ifndef RADEON_INFO_NUM_BACKENDS
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2011-08-04 02:01:44 +01:00
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#define RADEON_INFO_NUM_BACKENDS 0xa
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#endif
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#ifndef RADEON_INFO_NUM_TILE_PIPES
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#define RADEON_INFO_NUM_TILE_PIPES 0xb
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#endif
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#ifndef RADEON_INFO_BACKEND_MAP
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#define RADEON_INFO_BACKEND_MAP 0xd
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2011-07-22 18:25:07 +01:00
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#endif
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2010-08-07 01:05:03 +01:00
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2011-12-02 15:20:29 +00:00
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#ifndef RADEON_INFO_VA_START
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/* virtual address start, va < start are reserved by the kernel */
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#define RADEON_INFO_VA_START 0x0e
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/* maximum size of ib using the virtual memory cs */
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#define RADEON_INFO_IB_VM_MAX_SIZE 0x0f
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#endif
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2011-05-07 18:55:45 +01:00
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/* Enable/disable feature access for one command stream.
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* If enable == TRUE, return TRUE on success.
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* Otherwise, return FALSE.
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*
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* We basically do the same thing kernel does, because we have to deal
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* with multiple contexts (here command streams) backed by one winsys. */
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static boolean radeon_set_fd_access(struct radeon_drm_cs *applier,
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struct radeon_drm_cs **owner,
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pipe_mutex *mutex,
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unsigned request, boolean enable)
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2011-01-27 22:13:28 +00:00
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{
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2011-11-10 22:55:46 +00:00
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struct drm_radeon_info info;
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2010-08-07 01:05:03 +01:00
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unsigned value = enable ? 1 : 0;
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2011-11-10 22:55:46 +00:00
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memset(&info, 0, sizeof(info));
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2011-05-07 18:55:45 +01:00
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pipe_mutex_lock(*mutex);
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/* Early exit if we are sure the request will fail. */
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if (enable) {
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if (*owner) {
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pipe_mutex_unlock(*mutex);
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return FALSE;
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}
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} else {
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if (*owner != applier) {
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pipe_mutex_unlock(*mutex);
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return FALSE;
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}
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}
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/* Pass through the request to the kernel. */
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2010-08-07 01:05:03 +01:00
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info.value = (unsigned long)&value;
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2011-01-27 22:13:28 +00:00
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info.request = request;
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2011-05-07 18:55:45 +01:00
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if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO,
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&info, sizeof(info)) != 0) {
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pipe_mutex_unlock(*mutex);
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2010-08-07 01:05:03 +01:00
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return FALSE;
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2011-05-07 18:55:45 +01:00
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}
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2010-08-07 01:05:03 +01:00
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2011-05-07 18:55:45 +01:00
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/* Update the rights in the winsys. */
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if (enable) {
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if (value) {
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*owner = applier;
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fprintf(stderr, "radeon: Acquired Hyper-Z.\n");
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pipe_mutex_unlock(*mutex);
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return TRUE;
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}
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} else {
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*owner = NULL;
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fprintf(stderr, "radeon: Released Hyper-Z.\n");
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}
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2010-08-07 01:05:03 +01:00
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2011-05-07 18:55:45 +01:00
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pipe_mutex_unlock(*mutex);
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return FALSE;
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2010-08-07 01:05:03 +01:00
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}
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2011-07-22 17:58:30 +01:00
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static boolean radeon_get_drm_value(int fd, unsigned request,
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2011-07-22 19:15:47 +01:00
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const char *errname, uint32_t *out)
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2011-07-22 17:58:30 +01:00
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{
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2011-11-10 22:55:46 +00:00
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struct drm_radeon_info info;
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2011-07-22 17:58:30 +01:00
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int retval;
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2011-11-10 22:55:46 +00:00
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memset(&info, 0, sizeof(info));
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2011-07-22 17:58:30 +01:00
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info.value = (unsigned long)out;
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info.request = request;
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retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
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2012-01-09 19:59:56 +00:00
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if (retval) {
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if (errname) {
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fprintf(stderr, "radeon: Failed to get %s, error number %d\n",
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errname, retval);
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}
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2011-07-22 17:58:30 +01:00
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return FALSE;
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}
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return TRUE;
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}
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2009-12-02 20:31:04 +00:00
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/* Helper function to do the ioctls needed for setup and init. */
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2011-07-22 17:58:30 +01:00
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static boolean do_winsys_init(struct radeon_drm_winsys *ws)
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2009-12-02 20:31:04 +00:00
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{
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2011-11-10 22:55:46 +00:00
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struct drm_radeon_gem_info gem_info;
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2009-12-02 20:31:04 +00:00
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int retval;
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2010-01-18 08:35:11 +00:00
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drmVersionPtr version;
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2009-12-02 20:31:04 +00:00
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2011-11-10 22:55:46 +00:00
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memset(&gem_info, 0, sizeof(gem_info));
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2009-12-02 20:31:04 +00:00
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/* We do things in a specific order here.
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*
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2010-01-18 08:35:11 +00:00
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* DRM version first. We need to be sure we're running on a KMS chipset.
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* This is also for some features.
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*
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* Then, the PCI ID. This is essential and should return usable numbers
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2009-12-02 20:31:04 +00:00
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* for all Radeons. If this fails, we probably got handed an FD for some
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* non-Radeon card.
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*
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2011-07-22 17:58:30 +01:00
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* The GEM info is actually bogus on the kernel side, as well as our side
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* (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
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* we don't actually use the info for anything yet.
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*
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2009-12-02 20:31:04 +00:00
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* The GB and Z pipe requests should always succeed, but they might not
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* return sensical values for all chipsets, but that's alright because
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* the pipe drivers already know that.
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2011-07-22 17:58:30 +01:00
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*/
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2010-01-17 23:57:26 +00:00
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2011-07-22 17:58:30 +01:00
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/* Get DRM version. */
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version = drmGetVersion(ws->fd);
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2011-03-02 16:51:19 +00:00
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if (version->version_major != 2 ||
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version->version_minor < 3) {
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2010-01-18 08:35:11 +00:00
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fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
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2011-07-22 17:58:30 +01:00
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"only compatible with 2.3.x (kernel 2.6.34) or later.\n",
|
2011-03-02 16:51:19 +00:00
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__FUNCTION__,
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version->version_major,
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version->version_minor,
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2010-01-18 08:35:11 +00:00
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version->version_patchlevel);
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drmFreeVersion(version);
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2011-07-22 17:58:30 +01:00
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return FALSE;
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2010-01-18 08:35:11 +00:00
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}
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2011-07-22 17:58:30 +01:00
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ws->info.drm_major = version->version_major;
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ws->info.drm_minor = version->version_minor;
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ws->info.drm_patchlevel = version->version_patchlevel;
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drmFreeVersion(version);
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2010-12-21 18:26:27 +00:00
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2011-07-22 17:58:30 +01:00
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/* Get PCI ID. */
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if (!radeon_get_drm_value(ws->fd, RADEON_INFO_DEVICE_ID, "PCI ID",
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&ws->info.pci_id))
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return FALSE;
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2009-12-02 20:31:04 +00:00
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2011-07-22 17:58:30 +01:00
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/* Check PCI ID. */
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switch (ws->info.pci_id) {
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#define CHIPSET(pci_id, name, family) case pci_id:
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#include "pci_ids/r300_pci_ids.h"
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#undef CHIPSET
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2011-07-22 18:25:07 +01:00
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ws->gen = R300;
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break;
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#define CHIPSET(pci_id, name, family) case pci_id:
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#include "pci_ids/r600_pci_ids.h"
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#undef CHIPSET
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ws->gen = R600;
|
2011-07-22 17:58:30 +01:00
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break;
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2009-12-02 20:31:04 +00:00
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2011-07-22 17:58:30 +01:00
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default:
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fprintf(stderr, "radeon: Invalid PCI ID.\n");
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return FALSE;
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2009-12-02 20:31:04 +00:00
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}
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2011-07-22 17:58:30 +01:00
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/* Get GEM info. */
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retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,
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2009-12-02 20:31:04 +00:00
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&gem_info, sizeof(gem_info));
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if (retval) {
|
2011-07-22 19:15:47 +01:00
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fprintf(stderr, "radeon: Failed to get MM info, error number %d\n",
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|
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retval);
|
2011-07-22 17:58:30 +01:00
|
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return FALSE;
|
2009-12-02 20:31:04 +00:00
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}
|
2011-07-22 17:58:30 +01:00
|
|
|
ws->info.gart_size = gem_info.gart_size;
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ws->info.vram_size = gem_info.vram_size;
|
2010-01-18 08:35:11 +00:00
|
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2011-07-22 17:58:30 +01:00
|
|
|
ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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/* Generation-specific queries. */
|
2011-07-22 18:25:07 +01:00
|
|
|
if (ws->gen == R300) {
|
|
|
|
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_GB_PIPES,
|
|
|
|
"GB pipe count",
|
|
|
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&ws->info.r300_num_gb_pipes))
|
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return FALSE;
|
2011-03-02 16:37:52 +00:00
|
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|
2011-07-22 18:25:07 +01:00
|
|
|
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_Z_PIPES,
|
|
|
|
"Z pipe count",
|
|
|
|
&ws->info.r300_num_z_pipes))
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
else if (ws->gen == R600) {
|
2011-07-22 19:15:47 +01:00
|
|
|
if (ws->info.drm_minor >= 9 &&
|
|
|
|
!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS,
|
2011-07-22 18:25:07 +01:00
|
|
|
"num backends",
|
|
|
|
&ws->info.r600_num_backends))
|
|
|
|
return FALSE;
|
2011-07-22 19:15:47 +01:00
|
|
|
|
|
|
|
/* get the GPU counter frequency, failure is not fatal */
|
|
|
|
radeon_get_drm_value(ws->fd, RADEON_INFO_CLOCK_CRYSTAL_FREQ, NULL,
|
|
|
|
&ws->info.r600_clock_crystal_freq);
|
|
|
|
|
|
|
|
radeon_get_drm_value(ws->fd, RADEON_INFO_TILING_CONFIG, NULL,
|
|
|
|
&ws->info.r600_tiling_config);
|
2011-08-04 02:01:44 +01:00
|
|
|
|
|
|
|
if (ws->info.drm_minor >= 11) {
|
|
|
|
radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
|
|
|
|
&ws->info.r600_num_tile_pipes);
|
|
|
|
|
|
|
|
if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
|
|
|
|
&ws->info.r600_backend_map))
|
|
|
|
ws->info.r600_backend_map_valid = TRUE;
|
|
|
|
}
|
2011-12-02 15:20:29 +00:00
|
|
|
ws->info.r600_virtual_address = FALSE;
|
|
|
|
if (ws->info.drm_minor >= 13) {
|
|
|
|
ws->info.r600_virtual_address = TRUE;
|
|
|
|
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_VA_START, NULL,
|
|
|
|
&ws->info.r600_va_start))
|
|
|
|
ws->info.r600_virtual_address = FALSE;
|
|
|
|
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_IB_VM_MAX_SIZE, NULL,
|
|
|
|
&ws->info.r600_ib_vm_max_size))
|
|
|
|
ws->info.r600_virtual_address = FALSE;
|
|
|
|
}
|
2011-07-22 18:25:07 +01:00
|
|
|
}
|
2011-07-22 17:58:30 +01:00
|
|
|
|
|
|
|
return TRUE;
|
2009-12-02 20:31:04 +00:00
|
|
|
}
|
|
|
|
|
2011-04-18 01:39:50 +01:00
|
|
|
static void radeon_winsys_destroy(struct radeon_winsys *rws)
|
2010-12-04 03:36:02 +00:00
|
|
|
{
|
|
|
|
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
|
|
|
|
|
2011-05-07 18:55:45 +01:00
|
|
|
pipe_mutex_destroy(ws->hyperz_owner_mutex);
|
|
|
|
pipe_mutex_destroy(ws->cmask_owner_mutex);
|
|
|
|
|
2010-12-04 03:36:02 +00:00
|
|
|
ws->cman->destroy(ws->cman);
|
|
|
|
ws->kman->destroy(ws->kman);
|
2012-02-07 14:19:28 +00:00
|
|
|
if (ws->gen == R600) {
|
|
|
|
radeon_surface_manager_free(ws->surf_man);
|
|
|
|
}
|
2010-12-04 03:36:02 +00:00
|
|
|
FREE(rws);
|
|
|
|
}
|
|
|
|
|
2011-07-22 17:58:30 +01:00
|
|
|
static void radeon_query_info(struct radeon_winsys *rws,
|
|
|
|
struct radeon_info *info)
|
2010-12-23 09:40:54 +00:00
|
|
|
{
|
2011-07-22 17:58:30 +01:00
|
|
|
*info = ((struct radeon_drm_winsys *)rws)->info;
|
2010-12-23 09:40:54 +00:00
|
|
|
}
|
|
|
|
|
2011-05-07 18:55:45 +01:00
|
|
|
static boolean radeon_cs_request_feature(struct radeon_winsys_cs *rcs,
|
|
|
|
enum radeon_feature_id fid,
|
|
|
|
boolean enable)
|
|
|
|
{
|
|
|
|
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
|
|
|
|
|
|
|
|
switch (fid) {
|
2011-07-22 18:14:23 +01:00
|
|
|
case RADEON_FID_R300_HYPERZ_ACCESS:
|
2011-05-07 18:55:45 +01:00
|
|
|
if (debug_get_bool_option("RADEON_HYPERZ", FALSE)) {
|
|
|
|
return radeon_set_fd_access(cs, &cs->ws->hyperz_owner,
|
|
|
|
&cs->ws->hyperz_owner_mutex,
|
|
|
|
RADEON_INFO_WANT_HYPERZ, enable);
|
|
|
|
} else {
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
2011-07-22 18:14:23 +01:00
|
|
|
case RADEON_FID_R300_CMASK_ACCESS:
|
2011-05-07 18:55:45 +01:00
|
|
|
if (debug_get_bool_option("RADEON_CMASK", FALSE)) {
|
|
|
|
return radeon_set_fd_access(cs, &cs->ws->cmask_owner,
|
|
|
|
&cs->ws->cmask_owner_mutex,
|
|
|
|
RADEON_INFO_WANT_CMASK, enable);
|
|
|
|
} else {
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return FALSE;
|
|
|
|
}
|
|
|
|
|
2012-01-30 22:22:13 +00:00
|
|
|
static int radeon_drm_winsys_surface_init(struct radeon_winsys *rws,
|
|
|
|
struct radeon_surface *surf)
|
|
|
|
{
|
|
|
|
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
|
|
|
|
|
|
|
|
return radeon_surface_init(ws->surf_man, surf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int radeon_drm_winsys_surface_best(struct radeon_winsys *rws,
|
|
|
|
struct radeon_surface *surf)
|
|
|
|
{
|
|
|
|
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
|
|
|
|
|
|
|
|
return radeon_surface_best(ws->surf_man, surf);
|
|
|
|
}
|
|
|
|
|
2011-04-18 01:39:50 +01:00
|
|
|
struct radeon_winsys *radeon_drm_winsys_create(int fd)
|
2009-03-04 05:14:33 +00:00
|
|
|
{
|
2010-12-04 03:36:02 +00:00
|
|
|
struct radeon_drm_winsys *ws = CALLOC_STRUCT(radeon_drm_winsys);
|
|
|
|
if (!ws) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ws->fd = fd;
|
|
|
|
|
2011-07-22 17:58:30 +01:00
|
|
|
if (!do_winsys_init(ws))
|
|
|
|
goto fail;
|
2010-02-12 05:39:51 +00:00
|
|
|
|
2010-12-04 03:36:02 +00:00
|
|
|
/* Create managers. */
|
2010-12-23 09:40:54 +00:00
|
|
|
ws->kman = radeon_bomgr_create(ws);
|
2010-12-04 03:36:02 +00:00
|
|
|
if (!ws->kman)
|
2011-12-05 23:40:53 +00:00
|
|
|
goto fail;
|
2010-12-04 03:36:02 +00:00
|
|
|
ws->cman = pb_cache_manager_create(ws->kman, 1000000);
|
|
|
|
if (!ws->cman)
|
2011-12-05 23:40:53 +00:00
|
|
|
goto fail;
|
2010-12-04 03:36:02 +00:00
|
|
|
|
2012-01-30 22:22:13 +00:00
|
|
|
/* FIXME check for libdrm version ?? */
|
2012-02-07 14:19:28 +00:00
|
|
|
if (ws->gen == R600) {
|
|
|
|
ws->surf_man = radeon_surface_manager_new(fd);
|
|
|
|
if (!ws->surf_man)
|
|
|
|
goto fail;
|
|
|
|
}
|
2012-01-30 22:22:13 +00:00
|
|
|
|
2010-12-04 03:36:02 +00:00
|
|
|
/* Set functions. */
|
|
|
|
ws->base.destroy = radeon_winsys_destroy;
|
2011-07-22 17:58:30 +01:00
|
|
|
ws->base.query_info = radeon_query_info;
|
2011-05-07 18:55:45 +01:00
|
|
|
ws->base.cs_request_feature = radeon_cs_request_feature;
|
2012-01-30 22:22:13 +00:00
|
|
|
ws->base.surface_init = radeon_drm_winsys_surface_init;
|
|
|
|
ws->base.surface_best = radeon_drm_winsys_surface_best;
|
2010-12-04 03:36:02 +00:00
|
|
|
|
2010-12-23 09:40:54 +00:00
|
|
|
radeon_bomgr_init_functions(ws);
|
r300g: rework command submission and resource space checking
The motivation behind this rework is to get some speed by reducing
CPU overhead. The performance increase depends on many factors,
but it's measurable (I think it's about 10% increase in Torcs).
This commit replaces libdrm's radeon_cs_gem with our own implemention.
It's optimized specifically for r300g, but r600g could use it as well.
Reloc writes and space checking are faster and simpler than their
counterparts in libdrm (the time complexity of all the functions
is O(1) in nearly all scenarios, thanks to hashing).
(libdrm's radeon_bo_gem is still being used in the driver.)
It works like this:
cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and
also adds the size of 'buf' to the used_gart and used_vram winsys variables
based on the domains, which are simply or'd for the accounting purposes.
The adding is skipped if the reloc is already present in the list, but it
accounts any newly-referenced domains.
cs_validate is then called, which just checks:
used_vram/gart < vram/gart_size * 0.8
The 0.8 number allows for some memory fragmentation. If the validation
fails, the pipe driver flushes CS and tries do the validation again,
i.e. it validates only that one operation. If it fails again, it drops
the operation on the floor and prints some nasty message to stderr.
cs_write_reloc(cs, buf) just writes a reloc that has been added using
cs_add_reloc. The read_domain and write_domain parameters have been removed,
because we already specify them in cs_add_reloc.
The space checking has been tested by putting small values in vram/gart_size
variables.
2010-12-04 03:38:15 +00:00
|
|
|
radeon_drm_cs_init_functions(ws);
|
2010-12-04 03:36:02 +00:00
|
|
|
|
2011-05-07 18:55:45 +01:00
|
|
|
pipe_mutex_init(ws->hyperz_owner_mutex);
|
|
|
|
pipe_mutex_init(ws->cmask_owner_mutex);
|
|
|
|
|
2010-12-04 03:36:02 +00:00
|
|
|
return &ws->base;
|
|
|
|
|
2010-02-12 05:39:51 +00:00
|
|
|
fail:
|
2010-12-04 03:36:02 +00:00
|
|
|
if (ws->cman)
|
2011-12-05 23:40:53 +00:00
|
|
|
ws->cman->destroy(ws->cman);
|
2010-12-04 03:36:02 +00:00
|
|
|
if (ws->kman)
|
2011-12-05 23:40:53 +00:00
|
|
|
ws->kman->destroy(ws->kman);
|
2012-01-30 22:22:13 +00:00
|
|
|
if (ws->surf_man)
|
|
|
|
radeon_surface_manager_free(ws->surf_man);
|
2010-12-04 03:36:02 +00:00
|
|
|
FREE(ws);
|
2010-02-12 05:39:51 +00:00
|
|
|
return NULL;
|
2009-03-04 05:14:33 +00:00
|
|
|
}
|