r600g: move more DRM queries into winsys/radeon

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

src/gallium/winsys/r600/drm/r600_drm.c

@@ -68,12 +68,12 @@ unsigned r600_get_num_backends(struct radeon *radeon)
 
 unsigned r600_get_num_tile_pipes(struct radeon *radeon)
 {
-	return radeon->num_tile_pipes;
+	return radeon->info.r600_num_tile_pipes;
 }
 
 unsigned r600_get_backend_map(struct radeon *radeon)
 {
-	return radeon->backend_map;
+	return radeon->info.r600_backend_map;
 }
 
 unsigned r600_get_minor_version(struct radeon *radeon)
@@ -185,42 +185,6 @@ static int radeon_drm_get_tiling(struct radeon *radeon)
 	}
 }
 
-static int radeon_get_num_tile_pipes(struct radeon *radeon)
-{
-	struct drm_radeon_info info = {};
-	uint32_t num_tile_pipes = 0;
-	int r;
-
-	info.request = RADEON_INFO_NUM_TILE_PIPES;
-	info.value = (uintptr_t)&num_tile_pipes;
-	r = drmCommandWriteRead(radeon->info.fd, DRM_RADEON_INFO, &info,
-			sizeof(struct drm_radeon_info));
-	if (r)
-		return r;
-
-	radeon->num_tile_pipes = num_tile_pipes;
-	return 0;
-}
-
-static int radeon_get_backend_map(struct radeon *radeon)
-{
-	struct drm_radeon_info info = {};
-	uint32_t backend_map = 0;
-	int r;
-
-	info.request = RADEON_INFO_BACKEND_MAP;
-	info.value = (uintptr_t)&backend_map;
-	r = drmCommandWriteRead(radeon->info.fd, DRM_RADEON_INFO, &info,
-			sizeof(struct drm_radeon_info));
-	if (r)
-		return r;
-
-	radeon->backend_map = backend_map;
-	radeon->backend_map_valid = TRUE;
-
-	return 0;
-}
-
 struct radeon *radeon_create(struct radeon_winsys *ws)
 {
 	struct radeon *radeon = CALLOC_STRUCT(radeon);
@@ -287,11 +251,6 @@ struct radeon *radeon_create(struct radeon_winsys *ws)
 	if (radeon_drm_get_tiling(radeon))
 		return NULL;
 
-	if (radeon->info.drm_minor >= 11) {
-		radeon_get_num_tile_pipes(radeon);
-		radeon_get_backend_map(radeon);
-	}
-
 	/* XXX disable ioctl thread offloading until the porting is done. */
 	setenv("RADEON_THREAD", "0", 0);
 

src/gallium/winsys/r600/drm/r600_hw_context.c

@@ -41,7 +41,7 @@ void r600_get_backend_mask(struct r600_context *ctx)
 	unsigned i, mask = 0;
 
 	/* if backend_map query is supported by the kernel */
-	if (ctx->radeon->backend_map_valid) {
+	if (ctx->radeon->info.r600_backend_map_valid) {
 		unsigned num_tile_pipes = r600_get_num_tile_pipes(ctx->radeon);
 		unsigned backend_map = r600_get_backend_map(ctx->radeon);
 		unsigned item_width, item_mask;

src/gallium/winsys/r600/drm/r600_priv.h

@@ -41,9 +41,6 @@ struct radeon {
 	unsigned			family;
 	enum chip_class			chip_class;
 	struct r600_tiling_info		tiling_info;
-	unsigned			num_tile_pipes;
-	unsigned			backend_map;
-	boolean				backend_map_valid;
 };
 
 /* these flags are used in register flags and added into block flags */

src/gallium/winsys/radeon/drm/radeon_drm_winsys.c

@@ -58,7 +58,15 @@
 #endif
 
 #ifndef RADEON_INFO_NUM_BACKENDS
-#define RADEON_INFO_NUM_BACKENDS 10
+#define RADEON_INFO_NUM_BACKENDS 0xa
+#endif
+
+#ifndef RADEON_INFO_NUM_TILE_PIPES
+#define RADEON_INFO_NUM_TILE_PIPES 0xb
+#endif
+
+#ifndef RADEON_INFO_BACKEND_MAP
+#define RADEON_INFO_BACKEND_MAP 0xd
 #endif
 
 /* Enable/disable feature access for one command stream.
@@ -240,6 +248,15 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
 
         radeon_get_drm_value(ws->fd, RADEON_INFO_TILING_CONFIG, NULL,
                              &ws->info.r600_tiling_config);
+
+        if (ws->info.drm_minor >= 11) {
+            radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
+                                 &ws->info.r600_num_tile_pipes);
+
+            if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
+                                      &ws->info.r600_backend_map))
+                ws->info.r600_backend_map_valid = TRUE;
+        }
     }
 
     return TRUE;

src/gallium/winsys/radeon/drm/radeon_winsys.h

@@ -85,6 +85,9 @@ struct radeon_info {
     uint32_t r600_num_backends;
     uint32_t r600_clock_crystal_freq;
     uint32_t r600_tiling_config;
+    uint32_t r600_num_tile_pipes;
+    uint32_t r600_backend_map;
+    boolean r600_backend_map_valid;
 };
 
 enum radeon_feature_id {