2018-03-15 22:42:44 +00:00
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#
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# Copyright (C) 2018 Red Hat
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# Copyright (C) 2014 Intel Corporation
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice (including the next
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# paragraph) shall be included in all copies or substantial portions of the
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# Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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# IN THE SOFTWARE.
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#
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# This file defines all the available intrinsics in one place.
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#
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# The Intrinsic class corresponds one-to-one with nir_intrinsic_info
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# structure.
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class Intrinsic(object):
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"""Class that represents all the information about an intrinsic opcode.
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NOTE: this must be kept in sync with nir_intrinsic_info.
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"""
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2018-03-26 22:50:38 +01:00
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def __init__(self, name, src_components, dest_components,
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indices, flags, sysval, bit_sizes):
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2018-03-15 22:42:44 +00:00
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"""Parameters:
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- name: the intrinsic name
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- src_components: list of the number of components per src, 0 means
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vectorized instruction with number of components given in the
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num_components field in nir_intrinsic_instr.
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- dest_components: number of destination components, -1 means no
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dest, 0 means number of components given in num_components field
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in nir_intrinsic_instr.
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- indices: list of constant indicies
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- flags: list of semantic flags
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- sysval: is this a system-value intrinsic
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- bit_sizes: allowed dest bit_sizes
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2018-03-15 22:42:44 +00:00
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"""
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assert isinstance(name, str)
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assert isinstance(src_components, list)
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if src_components:
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assert isinstance(src_components[0], int)
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assert isinstance(dest_components, int)
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assert isinstance(indices, list)
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if indices:
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assert isinstance(indices[0], str)
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assert isinstance(flags, list)
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if flags:
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assert isinstance(flags[0], str)
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assert isinstance(sysval, bool)
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if bit_sizes:
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assert isinstance(bit_sizes[0], int)
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self.name = name
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self.num_srcs = len(src_components)
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self.src_components = src_components
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self.has_dest = (dest_components >= 0)
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self.dest_components = dest_components
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self.num_indices = len(indices)
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self.indices = indices
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self.flags = flags
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self.sysval = sysval
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self.bit_sizes = bit_sizes
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2018-03-15 22:42:44 +00:00
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#
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# Possible indices:
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#
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# A constant 'base' value that is added to an offset src:
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BASE = "NIR_INTRINSIC_BASE"
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# For store instructions, a writemask:
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WRMASK = "NIR_INTRINSIC_WRMASK"
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# The stream-id for GS emit_vertex/end_primitive intrinsics:
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STREAM_ID = "NIR_INTRINSIC_STREAM_ID"
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# The clip-plane id for load_user_clip_plane intrinsics:
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UCP_ID = "NIR_INTRINSIC_UCP_ID"
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# The amount of data, starting from BASE, that this instruction
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# may access. This is used to provide bounds if the offset is
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# not constant.
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RANGE = "NIR_INTRINSIC_RANGE"
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# The vulkan descriptor set binding for vulkan_resource_index
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# intrinsic
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DESC_SET = "NIR_INTRINSIC_DESC_SET"
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# The vulkan descriptor set binding for vulkan_resource_index
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# intrinsic
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BINDING = "NIR_INTRINSIC_BINDING"
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# Component offset
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COMPONENT = "NIR_INTRINSIC_COMPONENT"
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# Interpolation mode (only meaningful for FS inputs)
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INTERP_MODE = "NIR_INTRINSIC_INTERP_MODE"
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# A binary nir_op to use when performing a reduction or scan operation
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REDUCTION_OP = "NIR_INTRINSIC_REDUCTION_OP"
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# Cluster size for reduction operations
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CLUSTER_SIZE = "NIR_INTRINSIC_CLUSTER_SIZE"
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2018-03-22 23:41:18 +00:00
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# Parameter index for a load_param intrinsic
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PARAM_IDX = "NIR_INTRINSIC_PARAM_IDX"
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# Image dimensionality for image intrinsics
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IMAGE_DIM = "NIR_INTRINSIC_IMAGE_DIM"
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# Non-zero if we are accessing an array image
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IMAGE_ARRAY = "NIR_INTRINSIC_IMAGE_ARRAY"
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2018-11-28 19:44:56 +00:00
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# Access qualifiers for image and memory access intrinsics
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ACCESS = "NIR_INTRINSIC_ACCESS"
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# Image format for image intrinsics
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FORMAT = "NIR_INTRINSIC_FORMAT"
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2018-11-13 15:45:03 +00:00
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# Offset or address alignment
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ALIGN_MUL = "NIR_INTRINSIC_ALIGN_MUL"
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ALIGN_OFFSET = "NIR_INTRINSIC_ALIGN_OFFSET"
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# The vulkan descriptor type for vulkan_resource_index
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DESC_TYPE = "NIR_INTRINSIC_DESC_TYPE"
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2018-03-15 22:42:44 +00:00
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#
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# Possible flags:
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#
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CAN_ELIMINATE = "NIR_INTRINSIC_CAN_ELIMINATE"
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CAN_REORDER = "NIR_INTRINSIC_CAN_REORDER"
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INTR_OPCODES = {}
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2018-03-26 22:50:38 +01:00
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def intrinsic(name, src_comp=[], dest_comp=-1, indices=[],
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flags=[], sysval=False, bit_sizes=[]):
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assert name not in INTR_OPCODES
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INTR_OPCODES[name] = Intrinsic(name, src_comp, dest_comp,
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indices, flags, sysval, bit_sizes)
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intrinsic("nop", flags=[CAN_ELIMINATE])
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2018-03-22 23:41:18 +00:00
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intrinsic("load_param", dest_comp=0, indices=[PARAM_IDX], flags=[CAN_ELIMINATE])
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2018-11-28 19:44:56 +00:00
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intrinsic("load_deref", dest_comp=0, src_comp=[-1],
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indices=[ACCESS], flags=[CAN_ELIMINATE])
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intrinsic("store_deref", src_comp=[-1, 0], indices=[WRMASK, ACCESS])
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intrinsic("copy_deref", src_comp=[-1, -1])
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2018-03-15 21:56:43 +00:00
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# Interpolation of input. The interp_deref_at* intrinsics are similar to the
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# load_var intrinsic acting on a shader input except that they interpolate the
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# input differently. The at_sample and at_offset intrinsics take an
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# additional source that is an integer sample id or a vec2 position offset
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# respectively.
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intrinsic("interp_deref_at_centroid", dest_comp=0, src_comp=[1],
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flags=[ CAN_ELIMINATE, CAN_REORDER])
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intrinsic("interp_deref_at_sample", src_comp=[1, 1], dest_comp=0,
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flags=[CAN_ELIMINATE, CAN_REORDER])
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intrinsic("interp_deref_at_offset", src_comp=[1, 2], dest_comp=0,
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flags=[CAN_ELIMINATE, CAN_REORDER])
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2019-03-10 13:35:00 +00:00
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# Gets the length of an unsized array at the end of a buffer
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intrinsic("deref_buffer_array_length", src_comp=[-1], dest_comp=1,
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flags=[CAN_ELIMINATE, CAN_REORDER])
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2018-03-15 22:42:44 +00:00
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# Ask the driver for the size of a given buffer. It takes the buffer index
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# as source.
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2019-01-12 16:58:33 +00:00
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intrinsic("get_buffer_size", src_comp=[-1], dest_comp=1,
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flags=[CAN_ELIMINATE, CAN_REORDER])
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# a barrier is an intrinsic with no inputs/outputs but which can't be moved
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# around/optimized in general
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def barrier(name):
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intrinsic(name)
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barrier("barrier")
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barrier("discard")
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# Memory barrier with semantics analogous to the memoryBarrier() GLSL
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# intrinsic.
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barrier("memory_barrier")
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# Shader clock intrinsic with semantics analogous to the clock2x32ARB()
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# GLSL intrinsic.
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# The latter can be used as code motion barrier, which is currently not
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# feasible with NIR.
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intrinsic("shader_clock", dest_comp=2, flags=[CAN_ELIMINATE])
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# Shader ballot intrinsics with semantics analogous to the
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#
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# ballotARB()
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# readInvocationARB()
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# readFirstInvocationARB()
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#
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# GLSL functions from ARB_shader_ballot.
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intrinsic("ballot", src_comp=[1], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("read_invocation", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("read_first_invocation", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
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# Additional SPIR-V ballot intrinsics
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#
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# These correspond to the SPIR-V opcodes
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#
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# OpGroupUniformElect
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# OpSubgroupFirstInvocationKHR
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intrinsic("elect", dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("first_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
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# Memory barrier with semantics analogous to the compute shader
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# groupMemoryBarrier(), memoryBarrierAtomicCounter(), memoryBarrierBuffer(),
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# memoryBarrierImage() and memoryBarrierShared() GLSL intrinsics.
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barrier("group_memory_barrier")
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barrier("memory_barrier_atomic_counter")
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barrier("memory_barrier_buffer")
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barrier("memory_barrier_image")
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barrier("memory_barrier_shared")
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2018-04-27 14:12:30 +01:00
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barrier("begin_invocation_interlock")
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barrier("end_invocation_interlock")
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2018-03-15 22:42:44 +00:00
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# A conditional discard, with a single boolean source.
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intrinsic("discard_if", src_comp=[1])
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# ARB_shader_group_vote intrinsics
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intrinsic("vote_any", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("vote_all", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("vote_feq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("vote_ieq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
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# Ballot ALU operations from SPIR-V.
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#
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# These operations work like their ALU counterparts except that the operate
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# on a uvec4 which is treated as a 128bit integer. Also, they are, in
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# general, free to ignore any bits which are above the subgroup size.
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intrinsic("ballot_bitfield_extract", src_comp=[4, 1], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("ballot_bit_count_reduce", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("ballot_bit_count_inclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("ballot_bit_count_exclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("ballot_find_lsb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
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intrinsic("ballot_find_msb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
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# Shuffle operations from SPIR-V.
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intrinsic("shuffle", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("shuffle_xor", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("shuffle_up", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("shuffle_down", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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# Quad operations from SPIR-V.
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intrinsic("quad_broadcast", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("quad_swap_horizontal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("quad_swap_vertical", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("quad_swap_diagonal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
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intrinsic("reduce", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP, CLUSTER_SIZE],
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flags=[CAN_ELIMINATE])
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intrinsic("inclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
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flags=[CAN_ELIMINATE])
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intrinsic("exclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
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flags=[CAN_ELIMINATE])
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# Basic Geometry Shader intrinsics.
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#
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# emit_vertex implements GLSL's EmitStreamVertex() built-in. It takes a single
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# index, which is the stream ID to write to.
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#
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# end_primitive implements GLSL's EndPrimitive() built-in.
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intrinsic("emit_vertex", indices=[STREAM_ID])
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intrinsic("end_primitive", indices=[STREAM_ID])
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# Geometry Shader intrinsics with a vertex count.
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#
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# Alternatively, drivers may implement these intrinsics, and use
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# nir_lower_gs_intrinsics() to convert from the basic intrinsics.
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#
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# These maintain a count of the number of vertices emitted, as an additional
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# unsigned integer source.
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intrinsic("emit_vertex_with_counter", src_comp=[1], indices=[STREAM_ID])
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intrinsic("end_primitive_with_counter", src_comp=[1], indices=[STREAM_ID])
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intrinsic("set_vertex_count", src_comp=[1])
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# Atomic counters
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#
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# The *_var variants take an atomic_uint nir_variable, while the other,
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# lowered, variants take a constant buffer index and register offset.
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def atomic(name, flags=[]):
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intrinsic(name + "_deref", src_comp=[-1], dest_comp=1, flags=flags)
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2018-03-15 22:42:44 +00:00
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intrinsic(name, src_comp=[1], dest_comp=1, indices=[BASE], flags=flags)
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def atomic2(name):
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intrinsic(name + "_deref", src_comp=[-1, 1], dest_comp=1)
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intrinsic(name, src_comp=[1, 1], dest_comp=1, indices=[BASE])
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def atomic3(name):
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2018-11-28 03:30:22 +00:00
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intrinsic(name + "_deref", src_comp=[-1, 1, 1], dest_comp=1)
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2018-03-15 22:42:44 +00:00
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intrinsic(name, src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
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atomic("atomic_counter_inc")
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nir: Fix OpAtomicCounterIDecrement for uniform atomic counters
From the SPIR-V 1.0 specification, section 3.32.18, "Atomic
Instructions":
"OpAtomicIDecrement:
<skip>
The instruction's result is the Original Value."
However, we were implementing it, for uniform atomic counters, as a
pre-decrement operation, as was the one available from GLSL.
Renamed the former nir intrinsic 'atomic_counter_dec*' to
'atomic_counter_pre_dec*' for clarification purposes, as it implements
a pre-decrement operation as specified for GLSL. From GLSL 4.50 spec,
section 8.10, "Atomic Counter Functions":
"uint atomicCounterDecrement (atomic_uint c)
Atomically
1. decrements the counter for c, and
2. returns the value resulting from the decrement operation.
These two steps are done atomically with respect to the atomic
counter functions in this table."
Added a new nir intrinsic 'atomic_counter_post_dec*' which implements
a post-decrement operation as required by SPIR-V.
v2: (Timothy Arceri)
* Add extra spec quotes on commit message
* Use "post" instead "pos" to avoid confusion with "position"
Signed-off-by: Antia Puentes <apuentes@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-02-22 12:50:23 +00:00
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atomic("atomic_counter_pre_dec")
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atomic("atomic_counter_post_dec")
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2018-03-15 22:42:44 +00:00
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atomic("atomic_counter_read", flags=[CAN_ELIMINATE])
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atomic2("atomic_counter_add")
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atomic2("atomic_counter_min")
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atomic2("atomic_counter_max")
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atomic2("atomic_counter_and")
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atomic2("atomic_counter_or")
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atomic2("atomic_counter_xor")
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atomic2("atomic_counter_exchange")
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atomic3("atomic_counter_comp_swap")
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2018-03-15 21:56:43 +00:00
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# Image load, store and atomic intrinsics.
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#
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2018-10-28 12:52:44 +00:00
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# All image intrinsics come in three versions. One which take an image target
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# passed as a deref chain as the first source, one which takes an index as the
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# first source, and one which takes a bindless handle as the first source.
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# In the first version, the image variable contains the memory and layout
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# qualifiers that influence the semantics of the intrinsic. In the second and
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# third, the image format and access qualifiers are provided as constant
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# indices.
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2018-03-15 21:56:43 +00:00
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#
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# All image intrinsics take a four-coordinate vector and a sample index as
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2018-06-23 23:22:42 +01:00
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# 2nd and 3rd sources, determining the location within the image that will be
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2018-03-15 21:56:43 +00:00
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# accessed by the intrinsic. Components not applicable to the image target
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# in use are undefined. Image store takes an additional four-component
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# argument with the value to be written, and image atomic operations take
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# either one or two additional scalar arguments with the same meaning as in
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# the ARB_shader_image_load_store specification.
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2018-08-16 21:11:44 +01:00
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def image(name, src_comp=[], **kwargs):
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intrinsic("image_deref_" + name, src_comp=[1] + src_comp, **kwargs)
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intrinsic("image_" + name, src_comp=[1] + src_comp,
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2018-10-28 12:52:44 +00:00
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indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
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intrinsic("bindless_image_" + name, src_comp=[1] + src_comp,
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2018-08-16 21:11:44 +01:00
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indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
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image("load", src_comp=[4, 1], dest_comp=0, flags=[CAN_ELIMINATE])
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image("store", src_comp=[4, 1, 0])
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image("atomic_add", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_min", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_max", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_and", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_or", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_xor", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_exchange", src_comp=[4, 1, 1], dest_comp=1)
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image("atomic_comp_swap", src_comp=[4, 1, 1, 1], dest_comp=1)
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image("atomic_fadd", src_comp=[1, 4, 1, 1], dest_comp=1)
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image("size", dest_comp=0, flags=[CAN_ELIMINATE, CAN_REORDER])
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image("samples", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
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2018-03-15 21:56:43 +00:00
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2018-01-27 21:19:57 +00:00
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# Intel-specific query for loading from the brw_image_param struct passed
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# into the shader as a uniform. The variable is a deref to the image
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# variable. The const index specifies which of the six parameters to load.
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intrinsic("image_deref_load_param_intel", src_comp=[1], dest_comp=0,
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indices=[BASE], flags=[CAN_ELIMINATE, CAN_REORDER])
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2018-08-16 22:23:10 +01:00
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image("load_raw_intel", src_comp=[1], dest_comp=0,
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flags=[CAN_ELIMINATE])
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image("store_raw_intel", src_comp=[1, 0])
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2018-01-27 21:19:57 +00:00
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2018-03-15 22:42:44 +00:00
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# Vulkan descriptor set intrinsics
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#
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# The Vulkan API uses a different binding model from GL. In the Vulkan
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# API, all external resources are represented by a tuple:
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#
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# (descriptor set, binding, array index)
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#
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# where the array index is the only thing allowed to be indirect. The
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# vulkan_surface_index intrinsic takes the descriptor set and binding as
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# its first two indices and the array index as its source. The third
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# index is a nir_variable_mode in case that's useful to the backend.
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#
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# The intended usage is that the shader will call vulkan_surface_index to
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# get an index and then pass that as the buffer index ubo/ssbo calls.
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#
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# The vulkan_resource_reindex intrinsic takes a resource index in src0
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# (the result of a vulkan_resource_index or vulkan_resource_reindex) which
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# corresponds to the tuple (set, binding, index) and computes an index
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# corresponding to tuple (set, binding, idx + src1).
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2019-01-12 16:58:33 +00:00
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intrinsic("vulkan_resource_index", src_comp=[1], dest_comp=0,
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2018-12-13 22:50:19 +00:00
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indices=[DESC_SET, BINDING, DESC_TYPE],
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2018-03-15 22:42:44 +00:00
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flags=[CAN_ELIMINATE, CAN_REORDER])
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2019-01-12 16:58:33 +00:00
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intrinsic("vulkan_resource_reindex", src_comp=[0, 1], dest_comp=0,
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2018-12-13 22:50:19 +00:00
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indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
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2019-01-12 16:58:33 +00:00
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intrinsic("load_vulkan_descriptor", src_comp=[-1], dest_comp=0,
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2018-12-15 00:36:01 +00:00
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indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
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2018-03-15 22:42:44 +00:00
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2018-03-15 21:56:43 +00:00
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# variable atomic intrinsics
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#
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# All of these variable atomic memory operations read a value from memory,
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# compute a new value using one of the operations below, write the new value
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# to memory, and return the original value read.
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#
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# All operations take 2 sources except CompSwap that takes 3. These sources
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# represent:
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#
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# 0: A deref to the memory on which to perform the atomic
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# 1: The data parameter to the atomic function (i.e. the value to add
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# in shared_atomic_add, etc).
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# 2: For CompSwap only: the second data parameter.
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2019-03-04 19:04:45 +00:00
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intrinsic("deref_atomic_add", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_imin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_umin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_imax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_umax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_and", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_or", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_xor", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_exchange", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_comp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_fadd", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_fmin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_fmax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("deref_atomic_fcomp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
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2018-03-15 21:56:43 +00:00
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2018-03-15 22:42:44 +00:00
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# SSBO atomic intrinsics
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#
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# All of the SSBO atomic memory operations read a value from memory,
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# compute a new value using one of the operations below, write the new
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# value to memory, and return the original value read.
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#
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# All operations take 3 sources except CompSwap that takes 4. These
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# sources represent:
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#
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# 0: The SSBO buffer index.
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# 1: The offset into the SSBO buffer of the variable that the atomic
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# operation will operate on.
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# 2: The data parameter to the atomic function (i.e. the value to add
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# in ssbo_atomic_add, etc).
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# 3: For CompSwap only: the second data parameter.
|
2019-03-04 19:04:45 +00:00
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intrinsic("ssbo_atomic_add", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_imin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_umin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_imax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_umax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_and", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_or", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_xor", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_exchange", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_comp_swap", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_fadd", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_fmin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_fmax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
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intrinsic("ssbo_atomic_fcomp_swap", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
|
2018-03-15 22:42:44 +00:00
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# CS shared variable atomic intrinsics
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#
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# All of the shared variable atomic memory operations read a value from
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# memory, compute a new value using one of the operations below, write the
|
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# new value to memory, and return the original value read.
|
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|
#
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|
# All operations take 2 sources except CompSwap that takes 3. These
|
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# sources represent:
|
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#
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|
# 0: The offset into the shared variable storage region that the atomic
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# operation will operate on.
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# 1: The data parameter to the atomic function (i.e. the value to add
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# in shared_atomic_add, etc).
|
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# 2: For CompSwap only: the second data parameter.
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|
intrinsic("shared_atomic_add", src_comp=[1, 1], dest_comp=1, indices=[BASE])
|
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|
intrinsic("shared_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_and", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_or", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_xor", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
|
2018-04-10 02:36:22 +01:00
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intrinsic("shared_atomic_fadd", src_comp=[1, 1], dest_comp=1, indices=[BASE])
|
2018-04-18 21:34:25 +01:00
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intrinsic("shared_atomic_fmin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_fmax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("shared_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
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2018-03-15 22:42:44 +00:00
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2018-11-19 19:40:35 +00:00
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# Global atomic intrinsics
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#
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# All of the shared variable atomic memory operations read a value from
|
|
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|
# memory, compute a new value using one of the operations below, write the
|
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|
|
# new value to memory, and return the original value read.
|
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|
#
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# All operations take 2 sources except CompSwap that takes 3. These
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# sources represent:
|
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|
#
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# 0: The memory address that the atomic operation will operate on.
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# 1: The data parameter to the atomic function (i.e. the value to add
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# in shared_atomic_add, etc).
|
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# 2: For CompSwap only: the second data parameter.
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intrinsic("global_atomic_add", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_and", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_or", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_xor", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_fadd", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_fmin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
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intrinsic("global_atomic_fmax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
|
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intrinsic("global_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
|
|
|
|
|
2018-07-19 12:04:43 +01:00
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|
def system_value(name, dest_comp, indices=[], bit_sizes=[32]):
|
2018-03-26 22:50:38 +01:00
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intrinsic("load_" + name, [], dest_comp, indices,
|
2018-07-19 12:04:43 +01:00
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|
flags=[CAN_ELIMINATE, CAN_REORDER], sysval=True,
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bit_sizes=bit_sizes)
|
2018-03-15 22:42:44 +00:00
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|
system_value("frag_coord", 4)
|
2018-07-19 12:04:43 +01:00
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|
system_value("front_face", 1, bit_sizes=[1, 32])
|
2018-03-15 22:42:44 +00:00
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|
system_value("vertex_id", 1)
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|
system_value("vertex_id_zero_base", 1)
|
2018-01-25 18:15:38 +00:00
|
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|
system_value("first_vertex", 1)
|
2018-04-28 13:09:18 +01:00
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|
system_value("is_indexed_draw", 1)
|
2018-03-15 22:42:44 +00:00
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|
system_value("base_vertex", 1)
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|
system_value("instance_id", 1)
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|
system_value("base_instance", 1)
|
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|
|
system_value("draw_id", 1)
|
|
|
|
system_value("sample_id", 1)
|
2018-06-01 19:07:15 +01:00
|
|
|
# sample_id_no_per_sample is like sample_id but does not imply per-
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|
# sample shading. See the lower_helper_invocation option.
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|
system_value("sample_id_no_per_sample", 1)
|
2018-03-15 22:42:44 +00:00
|
|
|
system_value("sample_pos", 2)
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|
|
system_value("sample_mask_in", 1)
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|
|
system_value("primitive_id", 1)
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|
|
system_value("invocation_id", 1)
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|
|
system_value("tess_coord", 3)
|
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|
|
system_value("tess_level_outer", 4)
|
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|
system_value("tess_level_inner", 2)
|
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|
system_value("patch_vertices_in", 1)
|
|
|
|
system_value("local_invocation_id", 3)
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|
|
|
system_value("local_invocation_index", 1)
|
|
|
|
system_value("work_group_id", 3)
|
|
|
|
system_value("user_clip_plane", 4, indices=[UCP_ID])
|
|
|
|
system_value("num_work_groups", 3)
|
2018-07-19 12:04:43 +01:00
|
|
|
system_value("helper_invocation", 1, bit_sizes=[1, 32])
|
2018-03-15 22:42:44 +00:00
|
|
|
system_value("alpha_ref_float", 1)
|
|
|
|
system_value("layer_id", 1)
|
|
|
|
system_value("view_index", 1)
|
|
|
|
system_value("subgroup_size", 1)
|
|
|
|
system_value("subgroup_invocation", 1)
|
2018-07-19 12:04:43 +01:00
|
|
|
system_value("subgroup_eq_mask", 0, bit_sizes=[32, 64])
|
|
|
|
system_value("subgroup_ge_mask", 0, bit_sizes=[32, 64])
|
|
|
|
system_value("subgroup_gt_mask", 0, bit_sizes=[32, 64])
|
|
|
|
system_value("subgroup_le_mask", 0, bit_sizes=[32, 64])
|
|
|
|
system_value("subgroup_lt_mask", 0, bit_sizes=[32, 64])
|
2018-03-15 22:42:44 +00:00
|
|
|
system_value("num_subgroups", 1)
|
|
|
|
system_value("subgroup_id", 1)
|
|
|
|
system_value("local_group_size", 3)
|
2018-07-19 15:39:58 +01:00
|
|
|
system_value("global_invocation_id", 3, bit_sizes=[32, 64])
|
2019-01-14 17:36:37 +00:00
|
|
|
system_value("global_invocation_index", 1, bit_sizes=[32, 64])
|
2018-03-08 19:18:59 +00:00
|
|
|
system_value("work_dim", 1)
|
2019-02-22 22:26:26 +00:00
|
|
|
# Driver-specific viewport scale/offset parameters.
|
|
|
|
#
|
|
|
|
# VC4 and V3D need to emit a scaled version of the position in the vertex
|
|
|
|
# shaders for binning, and having system values lets us move the math for that
|
|
|
|
# into NIR.
|
|
|
|
system_value("viewport_x_scale", 1)
|
|
|
|
system_value("viewport_y_scale", 1)
|
|
|
|
system_value("viewport_z_scale", 1)
|
|
|
|
system_value("viewport_z_offset", 1)
|
2018-03-15 22:42:44 +00:00
|
|
|
|
|
|
|
# Blend constant color values. Float values are clamped.#
|
|
|
|
system_value("blend_const_color_r_float", 1)
|
|
|
|
system_value("blend_const_color_g_float", 1)
|
|
|
|
system_value("blend_const_color_b_float", 1)
|
|
|
|
system_value("blend_const_color_a_float", 1)
|
|
|
|
system_value("blend_const_color_rgba8888_unorm", 1)
|
|
|
|
system_value("blend_const_color_aaaa8888_unorm", 1)
|
|
|
|
|
|
|
|
# Barycentric coordinate intrinsics.
|
|
|
|
#
|
|
|
|
# These set up the barycentric coordinates for a particular interpolation.
|
|
|
|
# The first three are for the simple cases: pixel, centroid, or per-sample
|
|
|
|
# (at gl_SampleID). The next two handle interpolating at a specified
|
|
|
|
# sample location, or interpolating with a vec2 offset,
|
|
|
|
#
|
|
|
|
# The interp_mode index should be either the INTERP_MODE_SMOOTH or
|
|
|
|
# INTERP_MODE_NOPERSPECTIVE enum values.
|
|
|
|
#
|
|
|
|
# The vec2 value produced by these intrinsics is intended for use as the
|
|
|
|
# barycoord source of a load_interpolated_input intrinsic.
|
|
|
|
|
|
|
|
def barycentric(name, src_comp=[]):
|
|
|
|
intrinsic("load_barycentric_" + name, src_comp=src_comp, dest_comp=2,
|
|
|
|
indices=[INTERP_MODE], flags=[CAN_ELIMINATE, CAN_REORDER])
|
|
|
|
|
|
|
|
# no sources. const_index[] = { interp_mode }
|
|
|
|
barycentric("pixel")
|
|
|
|
barycentric("centroid")
|
|
|
|
barycentric("sample")
|
|
|
|
# src[] = { sample_id }. const_index[] = { interp_mode }
|
|
|
|
barycentric("at_sample", [1])
|
|
|
|
# src[] = { offset.xy }. const_index[] = { interp_mode }
|
|
|
|
barycentric("at_offset", [2])
|
|
|
|
|
|
|
|
# Load operations pull data from some piece of GPU memory. All load
|
|
|
|
# operations operate in terms of offsets into some piece of theoretical
|
|
|
|
# memory. Loads from externally visible memory (UBO and SSBO) simply take a
|
|
|
|
# byte offset as a source. Loads from opaque memory (uniforms, inputs, etc.)
|
|
|
|
# take a base+offset pair where the base (const_index[0]) gives the location
|
|
|
|
# of the start of the variable being loaded and and the offset source is a
|
|
|
|
# offset into that variable.
|
|
|
|
#
|
|
|
|
# Uniform load operations have a second "range" index that specifies the
|
|
|
|
# range (starting at base) of the data from which we are loading. If
|
|
|
|
# const_index[1] == 0, then the range is unknown.
|
|
|
|
#
|
|
|
|
# Some load operations such as UBO/SSBO load and per_vertex loads take an
|
|
|
|
# additional source to specify which UBO/SSBO/vertex to load from.
|
|
|
|
#
|
|
|
|
# The exact address type depends on the lowering pass that generates the
|
|
|
|
# load/store intrinsics. Typically, this is vec4 units for things such as
|
|
|
|
# varying slots and float units for fragment shader inputs. UBO and SSBO
|
|
|
|
# offsets are always in bytes.
|
|
|
|
|
|
|
|
def load(name, num_srcs, indices=[], flags=[]):
|
|
|
|
intrinsic("load_" + name, [1] * num_srcs, dest_comp=0, indices=indices,
|
|
|
|
flags=flags)
|
|
|
|
|
|
|
|
# src[] = { offset }. const_index[] = { base, range }
|
|
|
|
load("uniform", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
|
2018-11-13 15:45:03 +00:00
|
|
|
# src[] = { buffer_index, offset }. const_index[] = { align_mul, align_offset }
|
|
|
|
load("ubo", 2, [ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE, CAN_REORDER])
|
2018-03-15 22:42:44 +00:00
|
|
|
# src[] = { offset }. const_index[] = { base, component }
|
|
|
|
load("input", 1, [BASE, COMPONENT], [CAN_ELIMINATE, CAN_REORDER])
|
|
|
|
# src[] = { vertex, offset }. const_index[] = { base, component }
|
|
|
|
load("per_vertex_input", 2, [BASE, COMPONENT], [CAN_ELIMINATE, CAN_REORDER])
|
|
|
|
# src[] = { barycoord, offset }. const_index[] = { base, component }
|
|
|
|
intrinsic("load_interpolated_input", src_comp=[2, 1], dest_comp=0,
|
|
|
|
indices=[BASE, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
|
|
|
|
|
2018-11-13 15:45:03 +00:00
|
|
|
# src[] = { buffer_index, offset }.
|
|
|
|
# const_index[] = { access, align_mul, align_offset }
|
|
|
|
load("ssbo", 2, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
|
2018-03-15 22:42:44 +00:00
|
|
|
# src[] = { offset }. const_index[] = { base, component }
|
|
|
|
load("output", 1, [BASE, COMPONENT], flags=[CAN_ELIMINATE])
|
|
|
|
# src[] = { vertex, offset }. const_index[] = { base }
|
|
|
|
load("per_vertex_output", 2, [BASE, COMPONENT], [CAN_ELIMINATE])
|
2018-11-13 15:45:03 +00:00
|
|
|
# src[] = { offset }. const_index[] = { base, align_mul, align_offset }
|
|
|
|
load("shared", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
|
2018-03-15 22:42:44 +00:00
|
|
|
# src[] = { offset }. const_index[] = { base, range }
|
|
|
|
load("push_constant", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
|
2018-06-29 03:16:19 +01:00
|
|
|
# src[] = { offset }. const_index[] = { base, range }
|
|
|
|
load("constant", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
|
2018-11-19 19:40:35 +00:00
|
|
|
# src[] = { address }.
|
|
|
|
# const_index[] = { access, align_mul, align_offset }
|
|
|
|
load("global", 1, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
|
2019-01-31 00:56:25 +00:00
|
|
|
# src[] = { address }. const_index[] = { base, range, align_mul, align_offset }
|
|
|
|
load("kernel_input", 1, [BASE, RANGE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE, CAN_REORDER])
|
2018-03-15 22:42:44 +00:00
|
|
|
|
|
|
|
# Stores work the same way as loads, except now the first source is the value
|
|
|
|
# to store and the second (and possibly third) source specify where to store
|
|
|
|
# the value. SSBO and shared memory stores also have a write mask as
|
|
|
|
# const_index[0].
|
|
|
|
|
|
|
|
def store(name, num_srcs, indices=[], flags=[]):
|
|
|
|
intrinsic("store_" + name, [0] + ([1] * (num_srcs - 1)), indices=indices, flags=flags)
|
|
|
|
|
|
|
|
# src[] = { value, offset }. const_index[] = { base, write_mask, component }
|
|
|
|
store("output", 2, [BASE, WRMASK, COMPONENT])
|
|
|
|
# src[] = { value, vertex, offset }.
|
|
|
|
# const_index[] = { base, write_mask, component }
|
|
|
|
store("per_vertex_output", 3, [BASE, WRMASK, COMPONENT])
|
2018-11-13 15:45:03 +00:00
|
|
|
# src[] = { value, block_index, offset }
|
|
|
|
# const_index[] = { write_mask, access, align_mul, align_offset }
|
|
|
|
store("ssbo", 3, [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
|
|
|
|
# src[] = { value, offset }.
|
|
|
|
# const_index[] = { base, write_mask, align_mul, align_offset }
|
|
|
|
store("shared", 2, [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
|
2018-11-19 19:40:35 +00:00
|
|
|
# src[] = { value, address }.
|
|
|
|
# const_index[] = { write_mask, align_mul, align_offset }
|
|
|
|
store("global", 2, [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
|
2019-02-26 07:45:07 +00:00
|
|
|
|
|
|
|
|
|
|
|
# IR3-specific version of most SSBO intrinsics. The only different
|
|
|
|
# compare to the originals is that they add an extra source to hold
|
|
|
|
# the dword-offset, which is needed by the backend code apart from
|
|
|
|
# the byte-offset already provided by NIR in one of the sources.
|
|
|
|
#
|
|
|
|
# NIR lowering pass 'ir3_nir_lower_io_offset' will replace the
|
|
|
|
# original SSBO intrinsics by these, placing the computed
|
|
|
|
# dword-offset always in the last source.
|
|
|
|
#
|
|
|
|
# The float versions are not handled because those are not supported
|
|
|
|
# by the backend.
|
|
|
|
intrinsic("store_ssbo_ir3", src_comp=[0, 1, 1, 1],
|
|
|
|
indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
|
|
|
|
intrinsic("load_ssbo_ir3", src_comp=[1, 1, 1], dest_comp=0,
|
|
|
|
indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
|
|
|
|
intrinsic("ssbo_atomic_add_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_imin_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_umin_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_imax_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_umax_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_and_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_or_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_xor_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_exchange_ir3", src_comp=[1, 1, 1, 1], dest_comp=1)
|
|
|
|
intrinsic("ssbo_atomic_comp_swap_ir3", src_comp=[1, 1, 1, 1, 1], dest_comp=1)
|