mesa/src/intel/compiler/brw_disasm_info.h

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/*
* Copyright © 2014 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef _INTEL_ASM_ANNOTATION_H
#define _INTEL_ASM_ANNOTATION_H
#include "compiler/glsl/list.h"
#ifdef __cplusplus
extern "C" {
#endif
struct cfg_t;
struct backend_instruction;
struct intel_device_info;
struct inst_group {
struct exec_node link;
int offset;
size_t error_length;
char *error;
/* Pointers to the basic block in the CFG if the instruction group starts
* or ends a basic block.
*/
struct bblock_t *block_start;
struct bblock_t *block_end;
/* Annotation for the generated IR. One of the two can be set. */
const void *ir;
const char *annotation;
};
struct disasm_info {
struct exec_list group_list;
const struct brw_isa_info *isa;
const struct cfg_t *cfg;
/** Block index in the cfg. */
int cur_block;
bool use_tail;
};
void
dump_assembly(void *assembly, int start_offset, int end_offset,
struct disasm_info *disasm, const unsigned *block_latency);
struct disasm_info *
disasm_initialize(const struct brw_isa_info *isa,
const struct cfg_t *cfg);
struct inst_group *
disasm_new_inst_group(struct disasm_info *disasm, unsigned offset);
void
disasm_annotate(struct disasm_info *disasm,
struct backend_instruction *inst, unsigned offset);
void
disasm_insert_error(struct disasm_info *disasm, unsigned offset,
intel/eu: Handle compaction when inserting validation errors When the EU validator encountered an error, it would add an annotation to the disassembly. Unfortunately, the code to insert an error assumed that the next instruction would start at (offset + sizeof(brw_inst)), which is not true if the instruction with an error is compacted. This could lead to cascading disassembly errors, where we started trying to decode the next instruction at the wrong offset, and getting lots of scary looking output: ERROR: Register Regioning patterns where [...] (-f0.1.any16h) illegal(*** invalid execution size value 6 ) { align1 $7.src atomic }; (+f0.1.any16h) illegal.sat(*** invalid execution size value 6 ) { align1 $9.src AccWrEnable }; illegal(*** invalid execution size value 6 ) { align1 $11.src }; (+f0.1) illegal.sat(*** invalid execution size value 6 ) { align1 F@2 AccWrEnable }; (+f0.1) illegal.sat(*** invalid execution size value 6 ) { align1 F@2 AccWrEnable }; (+f0.1) illegal.sat(*** invalid execution size value 6 ) { align1 $15.src AccWrEnable }; illegal(*** invalid execution size value 6 ) { align1 $15.src }; (+f0.1) illegal.sat.g.f0.1(*** invalid execution size value 6 ) { align1 $13.src AccWrEnable }; Only the first instruction was actually wrong - the rest are just a result of starting the disassembler at the wrong offset. Trash ensues! To fix this, just pass the instruction size in a few layers so we can record the next offset properly. Cc: mesa-stable Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17624>
2022-07-19 08:27:29 +01:00
unsigned inst_size, const char *error);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* _INTEL_ASM_ANNOTATION_H */