2010-07-23 22:32:32 +01:00
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/*
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* Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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2010-09-29 19:26:29 +01:00
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#include <stdio.h>
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#include <errno.h>
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2010-12-04 01:47:02 +00:00
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#include "util/u_format.h"
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2010-07-23 22:32:32 +01:00
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#include "util/u_memory.h"
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2010-11-18 19:29:16 +00:00
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#include "pipe/p_shader_tokens.h"
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2010-09-29 19:26:29 +01:00
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#include "r600_pipe.h"
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2010-07-23 22:32:32 +01:00
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#include "r600_sq.h"
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2010-09-07 23:49:00 +01:00
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#include "r600_opcodes.h"
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2010-09-15 16:47:32 +01:00
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#include "r600_asm.h"
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2010-12-04 01:47:02 +00:00
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#include "r600_formats.h"
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#include "r600d.h"
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2010-07-23 22:32:32 +01:00
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2010-09-08 05:09:40 +01:00
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static inline unsigned int r600_bc_get_num_operands(struct r600_bc_alu *alu)
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{
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if(alu->is_op3)
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return 3;
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switch (alu->inst) {
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP:
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return 0;
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGT:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLGE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_KILLNE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MAX:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MIN:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETNE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGT:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETGE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGT:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETGE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_PRED_SETNE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_DOT4_IEEE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_CUBE:
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2010-11-17 22:20:59 +00:00
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return 2;
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2010-09-08 05:09:40 +01:00
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_FLOOR:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FRACT:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLOOR:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_EXP_IEEE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_CLAMPED:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SIN:
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case V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_COS:
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return 1;
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default: R600_ERR(
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"Need instruction operand number for 0x%x.\n", alu->inst);
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};
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2010-11-17 22:20:59 +00:00
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2010-09-08 05:09:40 +01:00
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return 3;
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}
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2010-07-23 22:32:32 +01:00
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int r700_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsigned id);
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static struct r600_bc_cf *r600_bc_cf(void)
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{
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struct r600_bc_cf *cf = CALLOC_STRUCT(r600_bc_cf);
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if (cf == NULL)
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return NULL;
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LIST_INITHEAD(&cf->list);
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LIST_INITHEAD(&cf->alu);
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LIST_INITHEAD(&cf->vtx);
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2010-07-24 01:55:48 +01:00
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LIST_INITHEAD(&cf->tex);
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2010-07-23 22:32:32 +01:00
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return cf;
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}
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static struct r600_bc_alu *r600_bc_alu(void)
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{
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struct r600_bc_alu *alu = CALLOC_STRUCT(r600_bc_alu);
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if (alu == NULL)
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return NULL;
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LIST_INITHEAD(&alu->list);
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2010-09-08 05:09:40 +01:00
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LIST_INITHEAD(&alu->bs_list);
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2010-07-23 22:32:32 +01:00
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return alu;
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}
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static struct r600_bc_vtx *r600_bc_vtx(void)
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{
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struct r600_bc_vtx *vtx = CALLOC_STRUCT(r600_bc_vtx);
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if (vtx == NULL)
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return NULL;
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LIST_INITHEAD(&vtx->list);
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return vtx;
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}
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2010-07-24 01:55:48 +01:00
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static struct r600_bc_tex *r600_bc_tex(void)
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{
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struct r600_bc_tex *tex = CALLOC_STRUCT(r600_bc_tex);
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if (tex == NULL)
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return NULL;
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LIST_INITHEAD(&tex->list);
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return tex;
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}
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2010-07-23 22:32:32 +01:00
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int r600_bc_init(struct r600_bc *bc, enum radeon_family family)
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{
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LIST_INITHEAD(&bc->cf);
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bc->family = family;
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2010-08-19 05:43:11 +01:00
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switch (bc->family) {
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case CHIP_R600:
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case CHIP_RV610:
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case CHIP_RV630:
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case CHIP_RV670:
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case CHIP_RV620:
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case CHIP_RV635:
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case CHIP_RS780:
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case CHIP_RS880:
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2010-11-19 20:32:02 +00:00
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bc->chiprev = CHIPREV_R600;
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2010-08-19 05:43:11 +01:00
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break;
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case CHIP_RV770:
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case CHIP_RV730:
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case CHIP_RV710:
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case CHIP_RV740:
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2010-11-19 20:32:02 +00:00
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bc->chiprev = CHIPREV_R700;
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2010-08-19 05:43:11 +01:00
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break;
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2010-09-03 05:38:41 +01:00
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case CHIP_CEDAR:
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case CHIP_REDWOOD:
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case CHIP_JUNIPER:
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case CHIP_CYPRESS:
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case CHIP_HEMLOCK:
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2010-11-22 22:47:24 +00:00
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case CHIP_PALM:
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2011-01-06 23:05:16 +00:00
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case CHIP_BARTS:
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case CHIP_TURKS:
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case CHIP_CAICOS:
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2010-11-19 20:32:02 +00:00
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bc->chiprev = CHIPREV_EVERGREEN;
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2010-09-03 05:38:41 +01:00
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break;
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2010-08-19 05:43:11 +01:00
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default:
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R600_ERR("unknown family %d\n", bc->family);
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return -EINVAL;
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}
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2010-07-23 22:32:32 +01:00
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return 0;
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}
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static int r600_bc_add_cf(struct r600_bc *bc)
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{
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struct r600_bc_cf *cf = r600_bc_cf();
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if (cf == NULL)
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return -ENOMEM;
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LIST_ADDTAIL(&cf->list, &bc->cf);
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if (bc->cf_last)
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cf->id = bc->cf_last->id + 2;
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bc->cf_last = cf;
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bc->ncf++;
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bc->ndw += 2;
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2010-08-03 19:14:58 +01:00
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bc->force_add_cf = 0;
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2010-07-23 22:32:32 +01:00
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return 0;
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}
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int r600_bc_add_output(struct r600_bc *bc, const struct r600_bc_output *output)
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{
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int r;
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r = r600_bc_add_cf(bc);
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if (r)
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return r;
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bc->cf_last->inst = output->inst;
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memcpy(&bc->cf_last->output, output, sizeof(struct r600_bc_output));
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return 0;
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}
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2010-09-08 05:09:40 +01:00
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const unsigned bank_swizzle_vec[8] = {SQ_ALU_VEC_210, //000
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SQ_ALU_VEC_120, //001
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SQ_ALU_VEC_102, //010
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SQ_ALU_VEC_201, //011
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SQ_ALU_VEC_012, //100
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SQ_ALU_VEC_021, //101
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SQ_ALU_VEC_012, //110
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SQ_ALU_VEC_012}; //111
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const unsigned bank_swizzle_scl[8] = {SQ_ALU_SCL_210, //000
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2010-11-17 22:20:59 +00:00
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SQ_ALU_SCL_122, //001
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2010-09-08 05:09:40 +01:00
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SQ_ALU_SCL_122, //010
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2010-11-17 22:20:59 +00:00
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2010-09-08 05:09:40 +01:00
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SQ_ALU_SCL_221, //011
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SQ_ALU_SCL_212, //100
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SQ_ALU_SCL_122, //101
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SQ_ALU_SCL_122, //110
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SQ_ALU_SCL_122}; //111
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static int init_gpr(struct r600_bc_alu *alu)
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{
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int cycle, component;
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/* set up gpr use */
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for (cycle = 0; cycle < NUM_OF_CYCLES; cycle++)
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for (component = 0; component < NUM_OF_COMPONENTS; component++)
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alu->hw_gpr[cycle][component] = -1;
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return 0;
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}
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2010-09-10 05:07:49 +01:00
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#if 0
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2010-09-08 05:09:40 +01:00
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static int reserve_gpr(struct r600_bc_alu *alu, unsigned sel, unsigned chan, unsigned cycle)
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{
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if (alu->hw_gpr[cycle][chan] < 0)
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alu->hw_gpr[cycle][chan] = sel;
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else if (alu->hw_gpr[cycle][chan] != (int)sel) {
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R600_ERR("Another scalar operation has already used GPR read port for channel\n");
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return -1;
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}
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return 0;
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}
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static int cycle_for_scalar_bank_swizzle(const int swiz, const int sel, unsigned *p_cycle)
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{
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int table[3];
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int ret = 0;
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switch (swiz) {
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case SQ_ALU_SCL_210:
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table[0] = 2; table[1] = 1; table[2] = 0;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_SCL_122:
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table[0] = 1; table[1] = 2; table[2] = 2;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_SCL_212:
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table[0] = 2; table[1] = 1; table[2] = 2;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_SCL_221:
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table[0] = 2; table[1] = 2; table[2] = 1;
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*p_cycle = table[sel];
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break;
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break;
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default:
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R600_ERR("bad scalar bank swizzle value\n");
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ret = -1;
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break;
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}
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return ret;
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}
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static int cycle_for_vector_bank_swizzle(const int swiz, const int sel, unsigned *p_cycle)
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{
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int table[3];
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int ret;
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switch (swiz) {
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case SQ_ALU_VEC_012:
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table[0] = 0; table[1] = 1; table[2] = 2;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_VEC_021:
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table[0] = 0; table[1] = 2; table[2] = 1;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_VEC_120:
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table[0] = 1; table[1] = 2; table[2] = 0;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_VEC_102:
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table[0] = 1; table[1] = 0; table[2] = 2;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_VEC_201:
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table[0] = 2; table[1] = 0; table[2] = 1;
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*p_cycle = table[sel];
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break;
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case SQ_ALU_VEC_210:
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table[0] = 2; table[1] = 1; table[2] = 0;
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*p_cycle = table[sel];
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break;
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default:
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|
R600_ERR("bad vector bank swizzle value\n");
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ret = -1;
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break;
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}
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return ret;
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}
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|
2010-09-10 05:07:49 +01:00
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|
2010-09-08 05:09:40 +01:00
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|
|
static void update_chan_counter(struct r600_bc_alu *alu, int *chan_counter)
|
|
|
|
{
|
|
|
|
int num_src;
|
|
|
|
int i;
|
|
|
|
int channel_swizzle;
|
|
|
|
|
|
|
|
num_src = r600_bc_get_num_operands(alu);
|
|
|
|
|
|
|
|
for (i = 0; i < num_src; i++) {
|
|
|
|
channel_swizzle = alu->src[i].chan;
|
|
|
|
if ((alu->src[i].sel > 0 && alu->src[i].sel < 128) && channel_swizzle <= 3)
|
|
|
|
chan_counter[channel_swizzle]++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* we need something like this I think - but this is bogus */
|
|
|
|
int check_read_slots(struct r600_bc *bc, struct r600_bc_alu *alu_first)
|
|
|
|
{
|
|
|
|
struct r600_bc_alu *alu;
|
|
|
|
int chan_counter[4] = { 0 };
|
|
|
|
|
|
|
|
update_chan_counter(alu_first, chan_counter);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(alu, &alu_first->bs_list, bs_list) {
|
|
|
|
update_chan_counter(alu, chan_counter);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan_counter[0] > 3 ||
|
|
|
|
chan_counter[1] > 3 ||
|
|
|
|
chan_counter[2] > 3 ||
|
|
|
|
chan_counter[3] > 3) {
|
|
|
|
R600_ERR("needed to split instruction for input ran out of banks %x %d %d %d %d\n",
|
|
|
|
alu_first->inst, chan_counter[0], chan_counter[1], chan_counter[2], chan_counter[3]);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-01-07 16:06:11 +00:00
|
|
|
/* CB constants start at 512, and get translated to a kcache index when ALU
|
|
|
|
* clauses are constructed. Note that we handle kcache constants the same way
|
|
|
|
* as (the now gone) cfile constants, is that really required? */
|
2010-09-10 05:07:49 +01:00
|
|
|
static int is_const(int sel)
|
|
|
|
{
|
2011-01-07 16:06:11 +00:00
|
|
|
if (sel > 511 && sel < 4607)
|
2010-09-10 05:07:49 +01:00
|
|
|
return 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-08 05:09:40 +01:00
|
|
|
static int check_scalar(struct r600_bc *bc, struct r600_bc_alu *alu)
|
|
|
|
{
|
|
|
|
unsigned swizzle_key;
|
|
|
|
|
2010-09-03 05:38:41 +01:00
|
|
|
if (alu->bank_swizzle_force) {
|
|
|
|
alu->bank_swizzle = alu->bank_swizzle_force;
|
2010-09-10 05:07:49 +01:00
|
|
|
return 0;
|
2010-09-03 05:38:41 +01:00
|
|
|
}
|
2010-09-08 05:09:40 +01:00
|
|
|
swizzle_key = (is_const(alu->src[0].sel) ? 4 : 0 ) +
|
|
|
|
(is_const(alu->src[1].sel) ? 2 : 0 ) +
|
|
|
|
(is_const(alu->src[2].sel) ? 1 : 0 );
|
|
|
|
|
|
|
|
alu->bank_swizzle = bank_swizzle_scl[swizzle_key];
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int check_vector(struct r600_bc *bc, struct r600_bc_alu *alu)
|
|
|
|
{
|
|
|
|
unsigned swizzle_key;
|
|
|
|
|
2010-09-03 05:38:41 +01:00
|
|
|
if (alu->bank_swizzle_force) {
|
|
|
|
alu->bank_swizzle = alu->bank_swizzle_force;
|
2010-09-10 05:07:49 +01:00
|
|
|
return 0;
|
2010-09-03 05:38:41 +01:00
|
|
|
}
|
2010-09-08 05:09:40 +01:00
|
|
|
swizzle_key = (is_const(alu->src[0].sel) ? 4 : 0 ) +
|
|
|
|
(is_const(alu->src[1].sel) ? 2 : 0 ) +
|
|
|
|
(is_const(alu->src[2].sel) ? 1 : 0 );
|
|
|
|
|
|
|
|
alu->bank_swizzle = bank_swizzle_vec[swizzle_key];
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int check_and_set_bank_swizzle(struct r600_bc *bc, struct r600_bc_alu *alu_first)
|
|
|
|
{
|
2010-09-15 13:31:31 +01:00
|
|
|
struct r600_bc_alu *alu = NULL;
|
2010-09-08 05:09:40 +01:00
|
|
|
int num_instr = 1;
|
|
|
|
|
|
|
|
init_gpr(alu_first);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(alu, &alu_first->bs_list, bs_list) {
|
|
|
|
num_instr++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (num_instr == 1) {
|
|
|
|
check_scalar(bc, alu_first);
|
|
|
|
|
|
|
|
} else {
|
|
|
|
/* check_read_slots(bc, bc->cf_last->curr_bs_head);*/
|
|
|
|
check_vector(bc, alu_first);
|
|
|
|
LIST_FOR_EACH_ENTRY(alu, &alu_first->bs_list, bs_list) {
|
|
|
|
check_vector(bc, alu);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-01-07 16:06:11 +00:00
|
|
|
/* This code handles kcache lines as single blocks of 32 constants. We could
|
|
|
|
* probably do slightly better by recognizing that we actually have two
|
|
|
|
* consecutive lines of 16 constants, but the resulting code would also be
|
|
|
|
* somewhat more complicated. */
|
|
|
|
static int r600_bc_alloc_kcache_lines(struct r600_bc *bc, struct r600_bc_alu *alu, int type)
|
|
|
|
{
|
|
|
|
struct r600_bc_kcache *kcache = bc->cf_last->kcache;
|
|
|
|
unsigned int required_lines;
|
|
|
|
unsigned int free_lines = 0;
|
|
|
|
unsigned int cache_line[3];
|
|
|
|
unsigned int count = 0;
|
|
|
|
unsigned int i, j;
|
|
|
|
int r;
|
|
|
|
|
|
|
|
/* Collect required cache lines. */
|
|
|
|
for (i = 0; i < 3; ++i) {
|
|
|
|
bool found = false;
|
|
|
|
unsigned int line;
|
|
|
|
|
|
|
|
if (alu->src[i].sel < 512)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
line = ((alu->src[i].sel - 512) / 32) * 2;
|
|
|
|
|
|
|
|
for (j = 0; j < count; ++j) {
|
|
|
|
if (cache_line[j] == line) {
|
|
|
|
found = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!found)
|
|
|
|
cache_line[count++] = line;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This should never actually happen. */
|
|
|
|
if (count >= 3) return -ENOMEM;
|
|
|
|
|
|
|
|
for (i = 0; i < 2; ++i) {
|
|
|
|
if (kcache[i].mode == V_SQ_CF_KCACHE_NOP) {
|
|
|
|
++free_lines;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Filter lines pulled in by previous intructions. Note that this is
|
|
|
|
* only for the required_lines count, we can't remove these from the
|
|
|
|
* cache_line array since we may have to start a new ALU clause. */
|
|
|
|
for (i = 0, required_lines = count; i < count; ++i) {
|
|
|
|
for (j = 0; j < 2; ++j) {
|
|
|
|
if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
|
|
|
|
kcache[j].addr == cache_line[i]) {
|
|
|
|
--required_lines;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Start a new ALU clause if needed. */
|
|
|
|
if (required_lines > free_lines) {
|
|
|
|
if ((r = r600_bc_add_cf(bc))) {
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
bc->cf_last->inst = (type << 3);
|
|
|
|
kcache = bc->cf_last->kcache;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Setup the kcache lines. */
|
|
|
|
for (i = 0; i < count; ++i) {
|
|
|
|
bool found = false;
|
|
|
|
|
|
|
|
for (j = 0; j < 2; ++j) {
|
|
|
|
if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
|
|
|
|
kcache[j].addr == cache_line[i]) {
|
|
|
|
found = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (found) continue;
|
|
|
|
|
|
|
|
for (j = 0; j < 2; ++j) {
|
|
|
|
if (kcache[j].mode == V_SQ_CF_KCACHE_NOP) {
|
|
|
|
kcache[j].bank = 0;
|
|
|
|
kcache[j].addr = cache_line[i];
|
|
|
|
kcache[j].mode = V_SQ_CF_KCACHE_LOCK_2;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Alter the src operands to refer to the kcache. */
|
|
|
|
for (i = 0; i < 3; ++i) {
|
|
|
|
static const unsigned int base[] = {128, 160, 256, 288};
|
|
|
|
unsigned int line;
|
|
|
|
|
|
|
|
if (alu->src[i].sel < 512)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
alu->src[i].sel -= 512;
|
|
|
|
line = (alu->src[i].sel / 32) * 2;
|
|
|
|
|
|
|
|
for (j = 0; j < 2; ++j) {
|
|
|
|
if (kcache[j].mode == V_SQ_CF_KCACHE_LOCK_2 &&
|
|
|
|
kcache[j].addr == line) {
|
|
|
|
alu->src[i].sel &= 0x1f;
|
|
|
|
alu->src[i].sel += base[j];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-08-25 06:57:41 +01:00
|
|
|
int r600_bc_add_alu_type(struct r600_bc *bc, const struct r600_bc_alu *alu, int type)
|
2010-07-23 22:32:32 +01:00
|
|
|
{
|
|
|
|
struct r600_bc_alu *nalu = r600_bc_alu();
|
|
|
|
struct r600_bc_alu *lalu;
|
|
|
|
int i, r;
|
|
|
|
|
|
|
|
if (nalu == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
memcpy(nalu, alu, sizeof(struct r600_bc_alu));
|
|
|
|
nalu->nliteral = 0;
|
|
|
|
|
|
|
|
/* cf can contains only alu or only vtx or only tex */
|
2010-08-25 06:57:41 +01:00
|
|
|
if (bc->cf_last == NULL || bc->cf_last->inst != (type << 3) ||
|
2010-08-03 19:14:58 +01:00
|
|
|
bc->force_add_cf) {
|
2010-07-23 22:32:32 +01:00
|
|
|
r = r600_bc_add_cf(bc);
|
|
|
|
if (r) {
|
|
|
|
free(nalu);
|
|
|
|
return r;
|
|
|
|
}
|
2010-08-25 06:57:41 +01:00
|
|
|
bc->cf_last->inst = (type << 3);
|
2010-07-23 22:32:32 +01:00
|
|
|
}
|
2011-01-07 16:06:11 +00:00
|
|
|
|
|
|
|
/* Setup the kcache for this ALU instruction. This will start a new
|
|
|
|
* ALU clause if needed. */
|
|
|
|
if ((r = r600_bc_alloc_kcache_lines(bc, nalu, type))) {
|
|
|
|
free(nalu);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
2010-09-08 05:09:40 +01:00
|
|
|
if (!bc->cf_last->curr_bs_head) {
|
|
|
|
bc->cf_last->curr_bs_head = nalu;
|
|
|
|
LIST_INITHEAD(&nalu->bs_list);
|
|
|
|
} else {
|
|
|
|
LIST_ADDTAIL(&nalu->bs_list, &bc->cf_last->curr_bs_head->bs_list);
|
|
|
|
}
|
2010-09-24 11:26:19 +01:00
|
|
|
/* at most 128 slots, one add alu can add 4 slots + 4 constants(2 slots)
|
|
|
|
* worst case */
|
2011-01-07 16:06:11 +00:00
|
|
|
if (nalu->last && (bc->cf_last->ndw >> 1) >= 120) {
|
2010-08-03 19:14:58 +01:00
|
|
|
bc->force_add_cf = 1;
|
|
|
|
}
|
2010-07-23 22:32:32 +01:00
|
|
|
/* number of gpr == the last gpr used in any alu */
|
|
|
|
for (i = 0; i < 3; i++) {
|
2011-01-07 16:06:11 +00:00
|
|
|
if (nalu->src[i].sel >= bc->ngpr && nalu->src[i].sel < 128) {
|
|
|
|
bc->ngpr = nalu->src[i].sel + 1;
|
2010-07-23 22:32:32 +01:00
|
|
|
}
|
|
|
|
/* compute how many literal are needed
|
|
|
|
* either 2 or 4 literals
|
|
|
|
*/
|
2011-01-07 16:06:11 +00:00
|
|
|
if (nalu->src[i].sel == 253) {
|
|
|
|
if (((nalu->src[i].chan + 2) & 0x6) > nalu->nliteral) {
|
|
|
|
nalu->nliteral = (nalu->src[i].chan + 2) & 0x6;
|
2010-07-23 22:32:32 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!LIST_IS_EMPTY(&bc->cf_last->alu)) {
|
|
|
|
lalu = LIST_ENTRY(struct r600_bc_alu, bc->cf_last->alu.prev, list);
|
|
|
|
if (!lalu->last && lalu->nliteral > nalu->nliteral) {
|
|
|
|
nalu->nliteral = lalu->nliteral;
|
|
|
|
}
|
|
|
|
}
|
2011-01-07 16:06:11 +00:00
|
|
|
if (nalu->dst.sel >= bc->ngpr) {
|
|
|
|
bc->ngpr = nalu->dst.sel + 1;
|
2010-07-23 22:32:32 +01:00
|
|
|
}
|
|
|
|
LIST_ADDTAIL(&nalu->list, &bc->cf_last->alu);
|
|
|
|
/* each alu use 2 dwords */
|
|
|
|
bc->cf_last->ndw += 2;
|
|
|
|
bc->ndw += 2;
|
2010-09-07 23:41:57 +01:00
|
|
|
|
2010-09-08 05:09:40 +01:00
|
|
|
/* process cur ALU instructions for bank swizzle */
|
2011-01-07 16:06:11 +00:00
|
|
|
if (nalu->last) {
|
2010-09-08 05:09:40 +01:00
|
|
|
check_and_set_bank_swizzle(bc, bc->cf_last->curr_bs_head);
|
|
|
|
bc->cf_last->curr_bs_head = NULL;
|
|
|
|
}
|
2010-07-23 22:32:32 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-08-25 06:57:41 +01:00
|
|
|
int r600_bc_add_alu(struct r600_bc *bc, const struct r600_bc_alu *alu)
|
|
|
|
{
|
2010-09-03 05:38:41 +01:00
|
|
|
return r600_bc_add_alu_type(bc, alu, BC_INST(bc, V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU));
|
2010-08-25 06:57:41 +01:00
|
|
|
}
|
|
|
|
|
2010-07-23 22:32:32 +01:00
|
|
|
int r600_bc_add_literal(struct r600_bc *bc, const u32 *value)
|
|
|
|
{
|
|
|
|
struct r600_bc_alu *alu;
|
|
|
|
|
2010-07-24 01:55:48 +01:00
|
|
|
if (bc->cf_last == NULL) {
|
2010-08-11 19:26:07 +01:00
|
|
|
return 0;
|
2010-07-24 01:55:48 +01:00
|
|
|
}
|
|
|
|
if (bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_TEX) {
|
|
|
|
return 0;
|
|
|
|
}
|
2010-09-03 05:38:41 +01:00
|
|
|
/* all same on EG */
|
2010-08-25 06:57:41 +01:00
|
|
|
if (bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_JUMP ||
|
|
|
|
bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_ELSE ||
|
2010-08-27 07:08:55 +01:00
|
|
|
bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL ||
|
|
|
|
bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK ||
|
|
|
|
bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE ||
|
|
|
|
bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END ||
|
2010-08-25 06:57:41 +01:00
|
|
|
bc->cf_last->inst == V_SQ_CF_WORD1_SQ_CF_INST_POP) {
|
|
|
|
return 0;
|
|
|
|
}
|
2010-09-03 05:38:41 +01:00
|
|
|
/* same on EG */
|
2010-08-25 06:57:41 +01:00
|
|
|
if (((bc->cf_last->inst != (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3)) &&
|
2010-12-13 23:43:53 +00:00
|
|
|
(bc->cf_last->inst != (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3)) &&
|
|
|
|
(bc->cf_last->inst != (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3)) &&
|
2010-08-25 06:57:41 +01:00
|
|
|
(bc->cf_last->inst != (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3))) ||
|
2010-07-23 22:32:32 +01:00
|
|
|
LIST_IS_EMPTY(&bc->cf_last->alu)) {
|
|
|
|
R600_ERR("last CF is not ALU (%p)\n", bc->cf_last);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
alu = LIST_ENTRY(struct r600_bc_alu, bc->cf_last->alu.prev, list);
|
2010-08-10 16:52:00 +01:00
|
|
|
if (!alu->last || !alu->nliteral || alu->literal_added) {
|
2010-07-23 22:32:32 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
memcpy(alu->value, value, 4 * 4);
|
|
|
|
bc->cf_last->ndw += alu->nliteral;
|
|
|
|
bc->ndw += alu->nliteral;
|
2010-08-10 16:52:00 +01:00
|
|
|
alu->literal_added = 1;
|
2010-07-23 22:32:32 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int r600_bc_add_vtx(struct r600_bc *bc, const struct r600_bc_vtx *vtx)
|
|
|
|
{
|
|
|
|
struct r600_bc_vtx *nvtx = r600_bc_vtx();
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (nvtx == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
memcpy(nvtx, vtx, sizeof(struct r600_bc_vtx));
|
|
|
|
|
|
|
|
/* cf can contains only alu or only vtx or only tex */
|
|
|
|
if (bc->cf_last == NULL ||
|
|
|
|
(bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX &&
|
2010-09-21 02:24:49 +01:00
|
|
|
bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC) ||
|
|
|
|
bc->force_add_cf) {
|
2010-07-23 22:32:32 +01:00
|
|
|
r = r600_bc_add_cf(bc);
|
|
|
|
if (r) {
|
|
|
|
free(nvtx);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_VTX;
|
|
|
|
}
|
|
|
|
LIST_ADDTAIL(&nvtx->list, &bc->cf_last->vtx);
|
2010-07-24 01:55:48 +01:00
|
|
|
/* each fetch use 4 dwords */
|
2010-07-23 22:32:32 +01:00
|
|
|
bc->cf_last->ndw += 4;
|
|
|
|
bc->ndw += 4;
|
2010-12-16 21:23:48 +00:00
|
|
|
if ((bc->cf_last->ndw / 4) > 7)
|
2010-09-21 02:24:49 +01:00
|
|
|
bc->force_add_cf = 1;
|
2010-07-23 22:32:32 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-07-24 01:55:48 +01:00
|
|
|
int r600_bc_add_tex(struct r600_bc *bc, const struct r600_bc_tex *tex)
|
|
|
|
{
|
|
|
|
struct r600_bc_tex *ntex = r600_bc_tex();
|
|
|
|
int r;
|
|
|
|
|
|
|
|
if (ntex == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
memcpy(ntex, tex, sizeof(struct r600_bc_tex));
|
|
|
|
|
|
|
|
/* cf can contains only alu or only vtx or only tex */
|
|
|
|
if (bc->cf_last == NULL ||
|
2010-09-21 02:24:49 +01:00
|
|
|
bc->cf_last->inst != V_SQ_CF_WORD1_SQ_CF_INST_TEX ||
|
|
|
|
bc->force_add_cf) {
|
2010-07-24 01:55:48 +01:00
|
|
|
r = r600_bc_add_cf(bc);
|
|
|
|
if (r) {
|
|
|
|
free(ntex);
|
|
|
|
return r;
|
|
|
|
}
|
|
|
|
bc->cf_last->inst = V_SQ_CF_WORD1_SQ_CF_INST_TEX;
|
|
|
|
}
|
|
|
|
LIST_ADDTAIL(&ntex->list, &bc->cf_last->tex);
|
|
|
|
/* each texture fetch use 4 dwords */
|
|
|
|
bc->cf_last->ndw += 4;
|
|
|
|
bc->ndw += 4;
|
2010-12-16 21:23:48 +00:00
|
|
|
if ((bc->cf_last->ndw / 4) > 7)
|
2010-09-21 02:24:49 +01:00
|
|
|
bc->force_add_cf = 1;
|
2010-07-24 01:55:48 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-08-25 06:57:41 +01:00
|
|
|
int r600_bc_add_cfinst(struct r600_bc *bc, int inst)
|
|
|
|
{
|
|
|
|
int r;
|
|
|
|
r = r600_bc_add_cf(bc);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
|
|
|
|
bc->cf_last->cond = V_SQ_CF_COND_ACTIVE;
|
|
|
|
bc->cf_last->inst = inst;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-03 05:38:41 +01:00
|
|
|
/* common to all 3 families */
|
2010-07-24 01:55:48 +01:00
|
|
|
static int r600_bc_vtx_build(struct r600_bc *bc, struct r600_bc_vtx *vtx, unsigned id)
|
2010-07-23 22:32:32 +01:00
|
|
|
{
|
2010-11-18 19:29:16 +00:00
|
|
|
unsigned fetch_resource_start = 0;
|
|
|
|
|
|
|
|
/* check if we are fetch shader */
|
|
|
|
/* fetch shader can also access vertex resource,
|
|
|
|
* first fetch shader resource is at 160
|
|
|
|
*/
|
|
|
|
if (bc->type == -1) {
|
|
|
|
switch (bc->chiprev) {
|
|
|
|
/* r600 */
|
2010-11-19 20:32:02 +00:00
|
|
|
case CHIPREV_R600:
|
2010-11-18 19:29:16 +00:00
|
|
|
/* r700 */
|
2010-11-19 20:32:02 +00:00
|
|
|
case CHIPREV_R700:
|
2010-11-18 19:29:16 +00:00
|
|
|
fetch_resource_start = 160;
|
|
|
|
break;
|
|
|
|
/* evergreen */
|
2010-11-19 20:32:02 +00:00
|
|
|
case CHIPREV_EVERGREEN:
|
2010-11-18 19:29:16 +00:00
|
|
|
fetch_resource_start = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "%s:%s:%d unknown chiprev %d\n",
|
|
|
|
__FILE__, __func__, __LINE__, bc->chiprev);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
bc->bytecode[id++] = S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id + fetch_resource_start) |
|
|
|
|
S_SQ_VTX_WORD0_SRC_GPR(vtx->src_gpr) |
|
|
|
|
S_SQ_VTX_WORD0_SRC_SEL_X(vtx->src_sel_x) |
|
|
|
|
S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(vtx->mega_fetch_count);
|
2010-07-23 22:32:32 +01:00
|
|
|
bc->bytecode[id++] = S_SQ_VTX_WORD1_DST_SEL_X(vtx->dst_sel_x) |
|
|
|
|
S_SQ_VTX_WORD1_DST_SEL_Y(vtx->dst_sel_y) |
|
|
|
|
S_SQ_VTX_WORD1_DST_SEL_Z(vtx->dst_sel_z) |
|
|
|
|
S_SQ_VTX_WORD1_DST_SEL_W(vtx->dst_sel_w) |
|
2010-10-01 02:38:40 +01:00
|
|
|
S_SQ_VTX_WORD1_USE_CONST_FIELDS(vtx->use_const_fields) |
|
|
|
|
S_SQ_VTX_WORD1_DATA_FORMAT(vtx->data_format) |
|
|
|
|
S_SQ_VTX_WORD1_NUM_FORMAT_ALL(vtx->num_format_all) |
|
|
|
|
S_SQ_VTX_WORD1_FORMAT_COMP_ALL(vtx->format_comp_all) |
|
|
|
|
S_SQ_VTX_WORD1_SRF_MODE_ALL(vtx->srf_mode_all) |
|
2010-07-23 22:32:32 +01:00
|
|
|
S_SQ_VTX_WORD1_GPR_DST_GPR(vtx->dst_gpr);
|
|
|
|
bc->bytecode[id++] = S_SQ_VTX_WORD2_MEGA_FETCH(1);
|
|
|
|
bc->bytecode[id++] = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-03 05:38:41 +01:00
|
|
|
/* common to all 3 families */
|
2010-07-24 01:55:48 +01:00
|
|
|
static int r600_bc_tex_build(struct r600_bc *bc, struct r600_bc_tex *tex, unsigned id)
|
|
|
|
{
|
|
|
|
bc->bytecode[id++] = S_SQ_TEX_WORD0_TEX_INST(tex->inst) |
|
|
|
|
S_SQ_TEX_WORD0_RESOURCE_ID(tex->resource_id) |
|
|
|
|
S_SQ_TEX_WORD0_SRC_GPR(tex->src_gpr) |
|
|
|
|
S_SQ_TEX_WORD0_SRC_REL(tex->src_rel);
|
|
|
|
bc->bytecode[id++] = S_SQ_TEX_WORD1_DST_GPR(tex->dst_gpr) |
|
|
|
|
S_SQ_TEX_WORD1_DST_REL(tex->dst_rel) |
|
|
|
|
S_SQ_TEX_WORD1_DST_SEL_X(tex->dst_sel_x) |
|
|
|
|
S_SQ_TEX_WORD1_DST_SEL_Y(tex->dst_sel_y) |
|
|
|
|
S_SQ_TEX_WORD1_DST_SEL_Z(tex->dst_sel_z) |
|
|
|
|
S_SQ_TEX_WORD1_DST_SEL_W(tex->dst_sel_w) |
|
|
|
|
S_SQ_TEX_WORD1_LOD_BIAS(tex->lod_bias) |
|
|
|
|
S_SQ_TEX_WORD1_COORD_TYPE_X(tex->coord_type_x) |
|
|
|
|
S_SQ_TEX_WORD1_COORD_TYPE_Y(tex->coord_type_y) |
|
|
|
|
S_SQ_TEX_WORD1_COORD_TYPE_Z(tex->coord_type_z) |
|
|
|
|
S_SQ_TEX_WORD1_COORD_TYPE_W(tex->coord_type_w);
|
|
|
|
bc->bytecode[id++] = S_SQ_TEX_WORD2_OFFSET_X(tex->offset_x) |
|
|
|
|
S_SQ_TEX_WORD2_OFFSET_Y(tex->offset_y) |
|
|
|
|
S_SQ_TEX_WORD2_OFFSET_Z(tex->offset_z) |
|
|
|
|
S_SQ_TEX_WORD2_SAMPLER_ID(tex->sampler_id) |
|
|
|
|
S_SQ_TEX_WORD2_SRC_SEL_X(tex->src_sel_x) |
|
|
|
|
S_SQ_TEX_WORD2_SRC_SEL_Y(tex->src_sel_y) |
|
|
|
|
S_SQ_TEX_WORD2_SRC_SEL_Z(tex->src_sel_z) |
|
|
|
|
S_SQ_TEX_WORD2_SRC_SEL_W(tex->src_sel_w);
|
|
|
|
bc->bytecode[id++] = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-03 05:38:41 +01:00
|
|
|
/* r600 only, r700/eg bits in r700_asm.c */
|
2010-08-09 13:57:56 +01:00
|
|
|
static int r600_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsigned id)
|
2010-07-23 22:32:32 +01:00
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
/* don't replace gpr by pv or ps for destination register */
|
2010-08-30 05:13:01 +01:00
|
|
|
bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
|
2010-08-30 06:19:20 +01:00
|
|
|
S_SQ_ALU_WORD0_SRC0_REL(alu->src[0].rel) |
|
2010-08-30 05:13:01 +01:00
|
|
|
S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
|
|
|
|
S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
|
|
|
|
S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
|
2010-08-30 06:19:20 +01:00
|
|
|
S_SQ_ALU_WORD0_SRC1_REL(alu->src[1].rel) |
|
2010-08-30 05:13:01 +01:00
|
|
|
S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
|
|
|
|
S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
|
|
|
|
S_SQ_ALU_WORD0_LAST(alu->last);
|
|
|
|
|
2010-07-23 22:32:32 +01:00
|
|
|
if (alu->is_op3) {
|
|
|
|
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
|
|
|
|
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
|
2010-08-30 06:19:20 +01:00
|
|
|
S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
|
2010-07-29 19:51:06 +01:00
|
|
|
S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
|
2010-07-23 22:32:32 +01:00
|
|
|
S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu->src[2].sel) |
|
2010-08-30 06:19:20 +01:00
|
|
|
S_SQ_ALU_WORD1_OP3_SRC2_REL(alu->src[2].rel) |
|
2010-07-23 22:32:32 +01:00
|
|
|
S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu->src[2].chan) |
|
|
|
|
S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu->src[2].neg) |
|
|
|
|
S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) |
|
2010-09-08 05:09:40 +01:00
|
|
|
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle);
|
2010-07-23 22:32:32 +01:00
|
|
|
} else {
|
|
|
|
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
|
|
|
|
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
|
2010-08-30 06:19:20 +01:00
|
|
|
S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
|
2010-07-29 19:51:06 +01:00
|
|
|
S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
|
2010-07-23 22:32:32 +01:00
|
|
|
S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu->src[0].abs) |
|
|
|
|
S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu->src[1].abs) |
|
|
|
|
S_SQ_ALU_WORD1_OP2_WRITE_MASK(alu->dst.write) |
|
|
|
|
S_SQ_ALU_WORD1_OP2_ALU_INST(alu->inst) |
|
2010-09-08 05:09:40 +01:00
|
|
|
S_SQ_ALU_WORD1_BANK_SWIZZLE(alu->bank_swizzle) |
|
2010-11-17 22:20:59 +00:00
|
|
|
S_SQ_ALU_WORD1_OP2_UPDATE_EXECUTE_MASK(alu->predicate) |
|
|
|
|
S_SQ_ALU_WORD1_OP2_UPDATE_PRED(alu->predicate);
|
2010-07-23 22:32:32 +01:00
|
|
|
}
|
|
|
|
if (alu->last) {
|
2010-08-31 00:02:02 +01:00
|
|
|
if (alu->nliteral && !alu->literal_added) {
|
2010-09-06 00:13:12 +01:00
|
|
|
R600_ERR("Bug in ALU processing for instruction 0x%08x, literal not added correctly\n", alu->inst);
|
2010-08-31 00:02:02 +01:00
|
|
|
}
|
2010-07-23 22:32:32 +01:00
|
|
|
for (i = 0; i < alu->nliteral; i++) {
|
|
|
|
bc->bytecode[id++] = alu->value[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-03 05:38:41 +01:00
|
|
|
/* common for r600/r700 - eg in eg_asm.c */
|
2010-08-09 13:57:56 +01:00
|
|
|
static int r600_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
|
2010-07-23 22:32:32 +01:00
|
|
|
{
|
|
|
|
unsigned id = cf->id;
|
|
|
|
|
|
|
|
switch (cf->inst) {
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
|
2010-08-25 06:57:41 +01:00
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
|
2010-12-13 23:43:53 +00:00
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
|
2010-09-07 23:41:57 +01:00
|
|
|
bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
|
2011-01-07 16:06:11 +00:00
|
|
|
S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
|
|
|
|
S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
|
|
|
|
S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
|
2010-09-07 23:41:57 +01:00
|
|
|
|
2010-07-23 22:32:32 +01:00
|
|
|
bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(cf->inst >> 3) |
|
2011-01-07 16:06:11 +00:00
|
|
|
S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
|
|
|
|
S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
|
|
|
|
S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
|
2010-07-23 22:32:32 +01:00
|
|
|
S_SQ_CF_ALU_WORD1_BARRIER(1) |
|
2010-11-19 20:32:02 +00:00
|
|
|
S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chiprev == CHIPREV_R600 ? cf->r6xx_uses_waterfall : 0) |
|
2010-07-23 22:32:32 +01:00
|
|
|
S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
|
|
|
|
break;
|
2010-07-24 01:55:48 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
|
2010-07-23 22:32:32 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
|
|
|
|
bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
|
|
|
|
bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
|
|
|
|
break;
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
|
|
|
|
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type);
|
|
|
|
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(cf->output.inst) |
|
|
|
|
S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program);
|
|
|
|
break;
|
2010-08-25 06:57:41 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_POP:
|
2010-08-27 07:08:55 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
|
2010-11-18 19:29:16 +00:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
|
2010-08-25 06:57:41 +01:00
|
|
|
bc->bytecode[id++] = S_SQ_CF_WORD0_ADDR(cf->cf_addr >> 1);
|
|
|
|
bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(cf->inst) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COND(cf->cond) |
|
|
|
|
S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
|
|
|
|
|
|
|
|
break;
|
2010-07-23 22:32:32 +01:00
|
|
|
default:
|
|
|
|
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int r600_bc_build(struct r600_bc *bc)
|
|
|
|
{
|
|
|
|
struct r600_bc_cf *cf;
|
|
|
|
struct r600_bc_alu *alu;
|
|
|
|
struct r600_bc_vtx *vtx;
|
2010-07-24 01:55:48 +01:00
|
|
|
struct r600_bc_tex *tex;
|
2010-07-23 22:32:32 +01:00
|
|
|
unsigned addr;
|
|
|
|
int r;
|
|
|
|
|
2010-08-27 07:08:55 +01:00
|
|
|
if (bc->callstack[0].max > 0)
|
2010-11-17 22:20:59 +00:00
|
|
|
bc->nstack = ((bc->callstack[0].max + 3) >> 2) + 2;
|
2010-11-18 19:29:16 +00:00
|
|
|
if (bc->type == TGSI_PROCESSOR_VERTEX && !bc->nstack) {
|
|
|
|
bc->nstack = 1;
|
|
|
|
}
|
2010-08-27 07:08:55 +01:00
|
|
|
|
2010-07-23 22:32:32 +01:00
|
|
|
/* first path compute addr of each CF block */
|
|
|
|
/* addr start after all the CF instructions */
|
|
|
|
addr = bc->cf_last->id + 2;
|
|
|
|
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
|
|
|
|
switch (cf->inst) {
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
|
2010-12-13 23:43:53 +00:00
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
|
2010-08-25 06:57:41 +01:00
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
|
2010-07-23 22:32:32 +01:00
|
|
|
break;
|
2010-07-24 01:55:48 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
|
2010-07-23 22:32:32 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
|
|
|
|
/* fetch node need to be 16 bytes aligned*/
|
|
|
|
addr += 3;
|
|
|
|
addr &= 0xFFFFFFFCUL;
|
|
|
|
break;
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
|
2010-09-03 05:38:41 +01:00
|
|
|
case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
|
|
|
|
case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
|
2010-07-23 22:32:32 +01:00
|
|
|
break;
|
2010-08-25 06:57:41 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_POP:
|
2010-08-27 07:08:55 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
|
2010-11-18 19:29:16 +00:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
|
2010-08-25 06:57:41 +01:00
|
|
|
break;
|
2010-07-23 22:32:32 +01:00
|
|
|
default:
|
|
|
|
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
cf->addr = addr;
|
|
|
|
addr += cf->ndw;
|
|
|
|
bc->ndw = cf->addr + cf->ndw;
|
|
|
|
}
|
|
|
|
free(bc->bytecode);
|
|
|
|
bc->bytecode = calloc(1, bc->ndw * 4);
|
|
|
|
if (bc->bytecode == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
|
|
|
|
addr = cf->addr;
|
2010-11-19 20:32:02 +00:00
|
|
|
if (bc->chiprev == CHIPREV_EVERGREEN)
|
2010-09-03 05:38:41 +01:00
|
|
|
r = eg_bc_cf_build(bc, cf);
|
|
|
|
else
|
|
|
|
r = r600_bc_cf_build(bc, cf);
|
2010-07-23 22:32:32 +01:00
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
switch (cf->inst) {
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
|
2010-12-13 23:43:53 +00:00
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
|
2010-08-25 06:57:41 +01:00
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
|
2010-07-23 22:32:32 +01:00
|
|
|
LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
|
2010-08-19 05:43:11 +01:00
|
|
|
switch(bc->chiprev) {
|
2010-11-19 20:32:02 +00:00
|
|
|
case CHIPREV_R600:
|
2010-07-23 22:32:32 +01:00
|
|
|
r = r600_bc_alu_build(bc, alu, addr);
|
|
|
|
break;
|
2010-11-19 20:32:02 +00:00
|
|
|
case CHIPREV_R700:
|
|
|
|
case CHIPREV_EVERGREEN: /* eg alu is same encoding as r700 */
|
2010-07-23 22:32:32 +01:00
|
|
|
r = r700_bc_alu_build(bc, alu, addr);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
R600_ERR("unknown family %d\n", bc->family);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
addr += 2;
|
|
|
|
if (alu->last) {
|
|
|
|
addr += alu->nliteral;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
|
|
|
|
LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
|
|
|
|
r = r600_bc_vtx_build(bc, vtx, addr);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
addr += 4;
|
|
|
|
}
|
|
|
|
break;
|
2010-07-24 01:55:48 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
|
|
|
|
LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
|
|
|
|
r = r600_bc_tex_build(bc, tex, addr);
|
|
|
|
if (r)
|
|
|
|
return r;
|
|
|
|
addr += 4;
|
|
|
|
}
|
|
|
|
break;
|
2010-07-23 22:32:32 +01:00
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
|
2010-09-03 05:38:41 +01:00
|
|
|
case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
|
|
|
|
case EG_V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
|
2010-08-27 07:08:55 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
|
2010-08-25 06:57:41 +01:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_POP:
|
2010-11-18 19:29:16 +00:00
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
|
2010-07-23 22:32:32 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
R600_ERR("unsupported CF instruction (0x%X)\n", cf->inst);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
2010-10-23 12:33:22 +01:00
|
|
|
|
|
|
|
void r600_bc_clear(struct r600_bc *bc)
|
|
|
|
{
|
2010-10-27 17:26:27 +01:00
|
|
|
struct r600_bc_cf *cf = NULL, *next_cf;
|
2010-10-23 12:33:22 +01:00
|
|
|
|
|
|
|
free(bc->bytecode);
|
|
|
|
bc->bytecode = NULL;
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY_SAFE(cf, next_cf, &bc->cf, list) {
|
2010-10-27 17:26:27 +01:00
|
|
|
struct r600_bc_alu *alu = NULL, *next_alu;
|
|
|
|
struct r600_bc_tex *tex = NULL, *next_tex;
|
|
|
|
struct r600_bc_tex *vtx = NULL, *next_vtx;
|
2010-10-23 12:33:22 +01:00
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY_SAFE(alu, next_alu, &cf->alu, list) {
|
|
|
|
free(alu);
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_INITHEAD(&cf->alu);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY_SAFE(tex, next_tex, &cf->tex, list) {
|
|
|
|
free(tex);
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_INITHEAD(&cf->tex);
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY_SAFE(vtx, next_vtx, &cf->vtx, list) {
|
|
|
|
free(vtx);
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_INITHEAD(&cf->vtx);
|
|
|
|
|
|
|
|
free(cf);
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_INITHEAD(&cf->list);
|
|
|
|
}
|
2010-12-03 16:34:47 +00:00
|
|
|
|
|
|
|
void r600_bc_dump(struct r600_bc *bc)
|
|
|
|
{
|
2010-12-16 21:05:33 +00:00
|
|
|
struct r600_bc_cf *cf;
|
|
|
|
struct r600_bc_alu *alu;
|
|
|
|
struct r600_bc_vtx *vtx;
|
|
|
|
struct r600_bc_tex *tex;
|
|
|
|
|
|
|
|
unsigned i, id;
|
2010-12-03 16:34:47 +00:00
|
|
|
char chip = '6';
|
|
|
|
|
|
|
|
switch (bc->chiprev) {
|
|
|
|
case 1:
|
|
|
|
chip = '7';
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
chip = 'E';
|
|
|
|
break;
|
|
|
|
case 0:
|
|
|
|
default:
|
|
|
|
chip = '6';
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
fprintf(stderr, "bytecode %d dw -----------------------\n", bc->ndw);
|
|
|
|
fprintf(stderr, " %c\n", chip);
|
2010-12-16 21:05:33 +00:00
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
|
|
|
|
id = cf->id;
|
|
|
|
|
|
|
|
switch (cf->inst) {
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP_AFTER << 3):
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_POP2_AFTER << 3):
|
|
|
|
case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
|
|
|
|
fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "ADDR:%d ", cf->addr);
|
|
|
|
fprintf(stderr, "KCACHE_MODE0:%X ", cf->kcache[0].mode);
|
|
|
|
fprintf(stderr, "KCACHE_BANK0:%X ", cf->kcache[0].bank);
|
|
|
|
fprintf(stderr, "KCACHE_BANK1:%X\n", cf->kcache[1].bank);
|
|
|
|
id++;
|
|
|
|
fprintf(stderr, "%04d %08X ALU ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "INST:%d ", cf->inst);
|
|
|
|
fprintf(stderr, "KCACHE_MODE1:%X ", cf->kcache[1].mode);
|
|
|
|
fprintf(stderr, "KCACHE_ADDR0:%X ", cf->kcache[0].addr);
|
|
|
|
fprintf(stderr, "KCACHE_ADDR1:%X ", cf->kcache[1].addr);
|
|
|
|
fprintf(stderr, "COUNT:%d\n", cf->ndw / 2);
|
|
|
|
break;
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_TEX:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC:
|
|
|
|
fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "ADDR:%d\n", cf->addr);
|
|
|
|
id++;
|
|
|
|
fprintf(stderr, "%04d %08X TEX/VTX ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "INST:%d ", cf->inst);
|
|
|
|
fprintf(stderr, "COUNT:%d\n", cf->ndw / 4);
|
|
|
|
break;
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT:
|
|
|
|
case V_SQ_CF_ALLOC_EXPORT_WORD1_SQ_CF_INST_EXPORT_DONE:
|
|
|
|
fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "GPR:%X ", cf->output.gpr);
|
|
|
|
fprintf(stderr, "ELEM_SIZE:%X ", cf->output.elem_size);
|
|
|
|
fprintf(stderr, "ARRAY_BASE:%X ", cf->output.array_base);
|
|
|
|
fprintf(stderr, "TYPE:%X\n", cf->output.type);
|
|
|
|
id++;
|
|
|
|
fprintf(stderr, "%04d %08X EXPORT ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "SWIZ_X:%X ", cf->output.swizzle_x);
|
|
|
|
fprintf(stderr, "SWIZ_Y:%X ", cf->output.swizzle_y);
|
|
|
|
fprintf(stderr, "SWIZ_Z:%X ", cf->output.swizzle_z);
|
|
|
|
fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w);
|
|
|
|
fprintf(stderr, "SWIZ_W:%X ", cf->output.swizzle_w);
|
|
|
|
fprintf(stderr, "BARRIER:%X ", cf->output.barrier);
|
|
|
|
fprintf(stderr, "INST:%d ", cf->output.inst);
|
|
|
|
fprintf(stderr, "EOP:%X\n", cf->output.end_of_program);
|
|
|
|
break;
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_JUMP:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_ELSE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_POP:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_START_NO_AL:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_END:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_CONTINUE:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_LOOP_BREAK:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_CALL_FS:
|
|
|
|
case V_SQ_CF_WORD1_SQ_CF_INST_RETURN:
|
|
|
|
fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "ADDR:%d\n", cf->cf_addr);
|
|
|
|
id++;
|
|
|
|
fprintf(stderr, "%04d %08X CF ", id, bc->bytecode[id]);
|
|
|
|
fprintf(stderr, "INST:%d ", cf->inst);
|
|
|
|
fprintf(stderr, "COND:%X ", cf->cond);
|
|
|
|
fprintf(stderr, "POP_COUNT:%X\n", cf->pop_count);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2010-12-17 21:57:36 +00:00
|
|
|
id = cf->addr;
|
2010-12-16 21:05:33 +00:00
|
|
|
LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
|
2010-12-17 21:57:36 +00:00
|
|
|
fprintf(stderr, "%04d %08X ", id, bc->bytecode[id]);
|
2010-12-16 21:05:33 +00:00
|
|
|
fprintf(stderr, "SRC0(SEL:%d ", alu->src[0].sel);
|
|
|
|
fprintf(stderr, "REL:%d ", alu->src[0].rel);
|
|
|
|
fprintf(stderr, "CHAN:%d ", alu->src[0].chan);
|
|
|
|
fprintf(stderr, "NEG:%d) ", alu->src[0].neg);
|
|
|
|
fprintf(stderr, "SRC1(SEL:%d ", alu->src[1].sel);
|
|
|
|
fprintf(stderr, "REL:%d ", alu->src[1].rel);
|
|
|
|
fprintf(stderr, "CHAN:%d ", alu->src[1].chan);
|
|
|
|
fprintf(stderr, "NEG:%d) ", alu->src[1].neg);
|
|
|
|
fprintf(stderr, "LAST:%d)\n", alu->last);
|
|
|
|
id++;
|
2010-12-17 21:57:36 +00:00
|
|
|
fprintf(stderr, "%04d %08X %c ", id, bc->bytecode[id], alu->last ? '*' : ' ');
|
|
|
|
fprintf(stderr, "INST:%d ", alu->inst);
|
|
|
|
fprintf(stderr, "DST(SEL:%d ", alu->dst.sel);
|
|
|
|
fprintf(stderr, "CHAN:%d ", alu->dst.chan);
|
|
|
|
fprintf(stderr, "REL:%d ", alu->dst.rel);
|
|
|
|
fprintf(stderr, "CLAMP:%d) ", alu->dst.clamp);
|
|
|
|
fprintf(stderr, "BANK_SWIZZLE:%d ", alu->bank_swizzle);
|
2010-12-16 21:05:33 +00:00
|
|
|
if (alu->is_op3) {
|
|
|
|
fprintf(stderr, "SRC2(SEL:%d ", alu->src[2].sel);
|
|
|
|
fprintf(stderr, "REL:%d ", alu->src[2].rel);
|
|
|
|
fprintf(stderr, "CHAN:%d ", alu->src[2].chan);
|
2010-12-17 21:57:36 +00:00
|
|
|
fprintf(stderr, "NEG:%d)\n", alu->src[2].neg);
|
2010-12-16 21:05:33 +00:00
|
|
|
} else {
|
|
|
|
fprintf(stderr, "SRC0_ABS:%d ", alu->src[0].abs);
|
|
|
|
fprintf(stderr, "SRC1_ABS:%d ", alu->src[1].abs);
|
|
|
|
fprintf(stderr, "WRITE_MASK:%d ", alu->dst.write);
|
|
|
|
fprintf(stderr, "EXECUTE_MASK:%d ", alu->predicate);
|
|
|
|
fprintf(stderr, "UPDATE_PRED:%d\n", alu->predicate);
|
|
|
|
}
|
|
|
|
|
2010-12-17 21:57:36 +00:00
|
|
|
id++;
|
2010-12-16 21:05:33 +00:00
|
|
|
if (alu->last) {
|
2010-12-17 21:57:36 +00:00
|
|
|
for (i = 0; i < alu->nliteral; i++, id++) {
|
2010-12-16 21:05:33 +00:00
|
|
|
float *f = (float*)(bc->bytecode + id);
|
2010-12-17 21:57:36 +00:00
|
|
|
fprintf(stderr, "%04d %08X\t%f\n", id, bc->bytecode[id], *f);
|
2010-12-16 21:05:33 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(tex, &cf->tex, list) {
|
|
|
|
//TODO
|
|
|
|
}
|
|
|
|
|
|
|
|
LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
|
|
|
|
//TODO
|
|
|
|
}
|
2010-12-03 16:34:47 +00:00
|
|
|
}
|
2010-12-16 21:05:33 +00:00
|
|
|
|
2010-12-03 16:34:47 +00:00
|
|
|
fprintf(stderr, "--------------------------------------\n");
|
|
|
|
}
|
2010-12-04 01:47:02 +00:00
|
|
|
|
|
|
|
void r600_cf_vtx(struct r600_vertex_element *ve, u32 *bytecode, unsigned count)
|
|
|
|
{
|
|
|
|
struct r600_pipe_state *rstate;
|
|
|
|
unsigned i = 0;
|
|
|
|
|
|
|
|
if (count > 8) {
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT(8 - 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(40 >> 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT(count - 8 - 1);
|
|
|
|
} else {
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT(count - 1);
|
|
|
|
}
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(0);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_RETURN) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1);
|
|
|
|
|
|
|
|
rstate = &ve->rstate;
|
|
|
|
rstate->id = R600_PIPE_STATE_FETCH_SHADER;
|
|
|
|
rstate->nregs = 0;
|
|
|
|
r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_RESOURCES_FS,
|
|
|
|
0x00000000, 0xFFFFFFFF, NULL);
|
|
|
|
r600_pipe_state_add_reg(rstate, R_0288DC_SQ_PGM_CF_OFFSET_FS,
|
|
|
|
0x00000000, 0xFFFFFFFF, NULL);
|
|
|
|
r600_pipe_state_add_reg(rstate, R_028894_SQ_PGM_START_FS,
|
|
|
|
r600_bo_offset(ve->fetch_shader) >> 8,
|
|
|
|
0xFFFFFFFF, ve->fetch_shader);
|
|
|
|
}
|
|
|
|
|
|
|
|
void r600_cf_vtx_tc(struct r600_vertex_element *ve, u32 *bytecode, unsigned count)
|
|
|
|
{
|
|
|
|
struct r600_pipe_state *rstate;
|
|
|
|
unsigned i = 0;
|
|
|
|
|
|
|
|
if (count > 8) {
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT(8 - 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(40 >> 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT((count - 8) - 1);
|
|
|
|
} else {
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(8 >> 1);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_VTX_TC) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1) |
|
|
|
|
S_SQ_CF_WORD1_COUNT(count - 1);
|
|
|
|
}
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD0_ADDR(0);
|
|
|
|
bytecode[i++] = S_SQ_CF_WORD1_CF_INST(V_SQ_CF_WORD1_SQ_CF_INST_RETURN) |
|
|
|
|
S_SQ_CF_WORD1_BARRIER(1);
|
|
|
|
|
|
|
|
rstate = &ve->rstate;
|
|
|
|
rstate->id = R600_PIPE_STATE_FETCH_SHADER;
|
|
|
|
rstate->nregs = 0;
|
|
|
|
r600_pipe_state_add_reg(rstate, R_0288A4_SQ_PGM_RESOURCES_FS,
|
|
|
|
0x00000000, 0xFFFFFFFF, NULL);
|
|
|
|
r600_pipe_state_add_reg(rstate, R_0288DC_SQ_PGM_CF_OFFSET_FS,
|
|
|
|
0x00000000, 0xFFFFFFFF, NULL);
|
|
|
|
r600_pipe_state_add_reg(rstate, R_028894_SQ_PGM_START_FS,
|
|
|
|
r600_bo_offset(ve->fetch_shader) >> 8,
|
|
|
|
0xFFFFFFFF, ve->fetch_shader);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format,
|
|
|
|
unsigned *num_format, unsigned *format_comp)
|
|
|
|
{
|
|
|
|
const struct util_format_description *desc;
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
*format = 0;
|
|
|
|
*num_format = 0;
|
|
|
|
*format_comp = 0;
|
|
|
|
|
|
|
|
desc = util_format_description(pformat);
|
|
|
|
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) {
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Find the first non-VOID channel. */
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (desc->channel[i].type) {
|
|
|
|
/* Half-floats, floats, doubles */
|
|
|
|
case UTIL_FORMAT_TYPE_FLOAT:
|
|
|
|
switch (desc->channel[i].size) {
|
|
|
|
case 16:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
|
|
|
*format = FMT_16_FLOAT;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
*format = FMT_16_16_FLOAT;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
*format = FMT_16_16_16_FLOAT;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
*format = FMT_16_16_16_16_FLOAT;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 32:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
|
|
|
*format = FMT_32_FLOAT;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
*format = FMT_32_32_FLOAT;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
*format = FMT_32_32_32_FLOAT;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
*format = FMT_32_32_32_32_FLOAT;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
/* Unsigned ints */
|
|
|
|
case UTIL_FORMAT_TYPE_UNSIGNED:
|
|
|
|
/* Signed ints */
|
|
|
|
case UTIL_FORMAT_TYPE_SIGNED:
|
|
|
|
switch (desc->channel[i].size) {
|
|
|
|
case 8:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
|
|
|
*format = FMT_8;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
*format = FMT_8_8;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
// *format = FMT_8_8_8; /* fails piglit draw-vertices test */
|
|
|
|
// break;
|
|
|
|
case 4:
|
|
|
|
*format = FMT_8_8_8_8;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 16:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
|
|
|
*format = FMT_16;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
*format = FMT_16_16;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
// *format = FMT_16_16_16; /* fails piglit draw-vertices test */
|
|
|
|
// break;
|
|
|
|
case 4:
|
|
|
|
*format = FMT_16_16_16_16;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 32:
|
|
|
|
switch (desc->nr_channels) {
|
|
|
|
case 1:
|
|
|
|
*format = FMT_32;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
*format = FMT_32_32;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
*format = FMT_32_32_32;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
*format = FMT_32_32_32_32;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto out_unknown;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
|
|
|
|
*format_comp = 1;
|
|
|
|
}
|
|
|
|
if (desc->channel[i].normalized) {
|
|
|
|
*num_format = 0;
|
|
|
|
} else {
|
|
|
|
*num_format = 2;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
out_unknown:
|
|
|
|
R600_ERR("unsupported vertex format %s\n", util_format_name(pformat));
|
|
|
|
}
|
|
|
|
|
|
|
|
int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, struct r600_vertex_element *ve)
|
|
|
|
{
|
|
|
|
unsigned ndw, i;
|
|
|
|
u32 *bytecode;
|
|
|
|
unsigned fetch_resource_start = 0, format, num_format, format_comp;
|
|
|
|
struct pipe_vertex_element *elements = ve->elements;
|
|
|
|
const struct util_format_description *desc;
|
|
|
|
|
|
|
|
/* 2 dwords for cf aligned to 4 + 4 dwords per input */
|
|
|
|
ndw = 8 + ve->count * 4;
|
|
|
|
ve->fs_size = ndw * 4;
|
|
|
|
|
|
|
|
/* use PIPE_BIND_VERTEX_BUFFER so we use the cache buffer manager */
|
|
|
|
ve->fetch_shader = r600_bo(rctx->radeon, ndw*4, 256, PIPE_BIND_VERTEX_BUFFER, 0);
|
|
|
|
if (ve->fetch_shader == NULL) {
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
bytecode = r600_bo_map(rctx->radeon, ve->fetch_shader, 0, NULL);
|
|
|
|
if (bytecode == NULL) {
|
|
|
|
r600_bo_reference(rctx->radeon, &ve->fetch_shader, NULL);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rctx->family >= CHIP_CEDAR) {
|
|
|
|
eg_cf_vtx(ve, &bytecode[0], (ndw - 8) / 4);
|
|
|
|
} else {
|
|
|
|
r600_cf_vtx(ve, &bytecode[0], (ndw - 8) / 4);
|
|
|
|
fetch_resource_start = 160;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* vertex elements offset need special handling, if offset is bigger
|
|
|
|
* than what we can put in fetch instruction then we need to alterate
|
|
|
|
* the vertex resource offset. In such case in order to simplify code
|
|
|
|
* we will bound one resource per elements. It's a worst case scenario.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < ve->count; i++) {
|
|
|
|
ve->vbuffer_offset[i] = C_SQ_VTX_WORD2_OFFSET & elements[i].src_offset;
|
|
|
|
if (ve->vbuffer_offset[i]) {
|
|
|
|
ve->vbuffer_need_offset = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < ve->count; i++) {
|
|
|
|
unsigned vbuffer_index;
|
|
|
|
r600_vertex_data_type(ve->hw_format[i], &format, &num_format, &format_comp);
|
|
|
|
desc = util_format_description(ve->hw_format[i]);
|
|
|
|
if (desc == NULL) {
|
|
|
|
R600_ERR("unknown format %d\n", ve->hw_format[i]);
|
|
|
|
r600_bo_reference(rctx->radeon, &ve->fetch_shader, NULL);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* see above for vbuffer_need_offset explanation */
|
|
|
|
vbuffer_index = elements[i].vertex_buffer_index;
|
|
|
|
if (ve->vbuffer_need_offset) {
|
|
|
|
bytecode[8 + i * 4 + 0] = S_SQ_VTX_WORD0_BUFFER_ID(i + fetch_resource_start);
|
|
|
|
} else {
|
|
|
|
bytecode[8 + i * 4 + 0] = S_SQ_VTX_WORD0_BUFFER_ID(vbuffer_index + fetch_resource_start);
|
|
|
|
}
|
|
|
|
bytecode[8 + i * 4 + 0] |= S_SQ_VTX_WORD0_SRC_GPR(0) |
|
|
|
|
S_SQ_VTX_WORD0_SRC_SEL_X(0) |
|
|
|
|
S_SQ_VTX_WORD0_MEGA_FETCH_COUNT(0x1F);
|
|
|
|
bytecode[8 + i * 4 + 1] = S_SQ_VTX_WORD1_DST_SEL_X(desc->swizzle[0]) |
|
|
|
|
S_SQ_VTX_WORD1_DST_SEL_Y(desc->swizzle[1]) |
|
|
|
|
S_SQ_VTX_WORD1_DST_SEL_Z(desc->swizzle[2]) |
|
|
|
|
S_SQ_VTX_WORD1_DST_SEL_W(desc->swizzle[3]) |
|
|
|
|
S_SQ_VTX_WORD1_USE_CONST_FIELDS(0) |
|
|
|
|
S_SQ_VTX_WORD1_DATA_FORMAT(format) |
|
|
|
|
S_SQ_VTX_WORD1_NUM_FORMAT_ALL(num_format) |
|
|
|
|
S_SQ_VTX_WORD1_FORMAT_COMP_ALL(format_comp) |
|
|
|
|
S_SQ_VTX_WORD1_SRF_MODE_ALL(1) |
|
|
|
|
S_SQ_VTX_WORD1_GPR_DST_GPR(i + 1);
|
|
|
|
bytecode[8 + i * 4 + 2] = S_SQ_VTX_WORD2_OFFSET(elements[i].src_offset) |
|
|
|
|
S_SQ_VTX_WORD2_MEGA_FETCH(1);
|
|
|
|
bytecode[8 + i * 4 + 3] = 0;
|
|
|
|
}
|
|
|
|
r600_bo_unmap(rctx->radeon, ve->fetch_shader);
|
|
|
|
return 0;
|
|
|
|
}
|