mirror of https://gitlab.freedesktop.org/mesa/mesa
519 lines
16 KiB
C
519 lines
16 KiB
C
/**************************************************************************
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*
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* Copyright 2003 VMware, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#include "i915_batch.h"
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#include "i915_context.h"
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#include "i915_debug.h"
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#include "i915_fpc.h"
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#include "i915_reg.h"
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#include "i915_resource.h"
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#include "pipe/p_context.h"
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#include "pipe/p_defines.h"
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#include "util/format/u_formats.h"
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#include "util/format/u_format.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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struct i915_tracked_hw_state {
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const char *name;
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void (*validate)(struct i915_context *, unsigned *batch_space);
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void (*emit)(struct i915_context *);
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unsigned dirty, batch_space;
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};
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static void
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validate_flush(struct i915_context *i915, unsigned *batch_space)
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{
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*batch_space = i915->flush_dirty ? 1 : 0;
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}
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static void
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emit_flush(struct i915_context *i915)
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{
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/* Cache handling is very cheap atm. State handling can request to flushes:
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* - I915_FLUSH_CACHE which is a flush everything request and
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* - I915_PIPELINE_FLUSH which is specifically for the draw_offset flush.
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* Because the cache handling is so dumb, no explicit "invalidate map cache".
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* Also, the first is a strict superset of the latter, so the following logic
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* works. */
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if (i915->flush_dirty & I915_FLUSH_CACHE)
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OUT_BATCH(MI_FLUSH | FLUSH_MAP_CACHE);
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else if (i915->flush_dirty & I915_PIPELINE_FLUSH)
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OUT_BATCH(MI_FLUSH | INHIBIT_FLUSH_RENDER_CACHE);
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}
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uint32_t invariant_state[] = {
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_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 |
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AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0,
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_3DSTATE_DFLT_DIFFUSE_CMD, 0,
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_3DSTATE_DFLT_SPEC_CMD, 0,
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_3DSTATE_DFLT_Z_CMD, 0,
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_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) |
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CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) |
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CSB_TCB(7, 7),
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_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE |
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OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX |
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ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) |
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TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D,
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_3DSTATE_DEPTH_SUBRECT_DISABLE,
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/* disable indirect state for now
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*/
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_3DSTATE_LOAD_INDIRECT | 0, 0};
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static void
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emit_invariant(struct i915_context *i915)
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{
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i915_winsys_batchbuffer_write(
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i915->batch, invariant_state,
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ARRAY_SIZE(invariant_state) * sizeof(uint32_t));
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}
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static void
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validate_immediate(struct i915_context *i915, unsigned *batch_space)
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{
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unsigned dirty = (1 << I915_IMMEDIATE_S0 | 1 << I915_IMMEDIATE_S1 |
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1 << I915_IMMEDIATE_S2 | 1 << I915_IMMEDIATE_S3 |
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1 << I915_IMMEDIATE_S3 | 1 << I915_IMMEDIATE_S4 |
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1 << I915_IMMEDIATE_S5 | 1 << I915_IMMEDIATE_S6) &
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i915->immediate_dirty;
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if (i915->immediate_dirty & (1 << I915_IMMEDIATE_S0) && i915->vbo)
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i915->validation_buffers[i915->num_validation_buffers++] = i915->vbo;
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*batch_space = 1 + util_bitcount(dirty);
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}
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static void
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emit_immediate_s5(struct i915_context *i915, uint32_t imm)
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{
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struct i915_surface *surf = i915_surface(i915->framebuffer.cbufs[0]);
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if (surf) {
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uint32_t writemask = imm & S5_WRITEDISABLE_MASK;
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imm &= ~S5_WRITEDISABLE_MASK;
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/* The register bits are not in order. */
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static const uint32_t writedisables[4] = {
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S5_WRITEDISABLE_RED,
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S5_WRITEDISABLE_GREEN,
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S5_WRITEDISABLE_BLUE,
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S5_WRITEDISABLE_ALPHA,
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};
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for (int i = 0; i < 4; i++) {
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if (writemask & writedisables[surf->color_swizzle[i]])
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imm |= writedisables[i];
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}
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}
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OUT_BATCH(imm);
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}
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static void
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emit_immediate(struct i915_context *i915)
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{
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/* remove unwanted bits and S7 */
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unsigned dirty = (1 << I915_IMMEDIATE_S0 | 1 << I915_IMMEDIATE_S1 |
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1 << I915_IMMEDIATE_S2 | 1 << I915_IMMEDIATE_S3 |
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1 << I915_IMMEDIATE_S3 | 1 << I915_IMMEDIATE_S4 |
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1 << I915_IMMEDIATE_S5 | 1 << I915_IMMEDIATE_S6) &
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i915->immediate_dirty;
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int i, num = util_bitcount(dirty);
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assert(num && num <= I915_MAX_IMMEDIATE);
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OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | dirty << 4 | (num - 1));
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if (i915->immediate_dirty & (1 << I915_IMMEDIATE_S0)) {
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if (i915->vbo)
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OUT_RELOC(i915->vbo, I915_USAGE_VERTEX,
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i915->current.immediate[I915_IMMEDIATE_S0]);
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else
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OUT_BATCH(0);
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}
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for (i = 1; i < I915_MAX_IMMEDIATE; i++) {
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if (dirty & (1 << i)) {
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if (i == I915_IMMEDIATE_S5)
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emit_immediate_s5(i915, i915->current.immediate[i]);
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else
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OUT_BATCH(i915->current.immediate[i]);
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}
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}
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}
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static void
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validate_dynamic(struct i915_context *i915, unsigned *batch_space)
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{
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*batch_space =
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util_bitcount(i915->dynamic_dirty & ((1 << I915_MAX_DYNAMIC) - 1));
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}
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static void
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emit_dynamic(struct i915_context *i915)
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{
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int i;
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for (i = 0; i < I915_MAX_DYNAMIC; i++) {
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if (i915->dynamic_dirty & (1 << i))
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OUT_BATCH(i915->current.dynamic[i]);
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}
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}
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static void
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validate_static(struct i915_context *i915, unsigned *batch_space)
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{
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*batch_space = 0;
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if (i915->current.cbuf_bo && (i915->static_dirty & I915_DST_BUF_COLOR)) {
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i915->validation_buffers[i915->num_validation_buffers++] =
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i915->current.cbuf_bo;
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*batch_space += 3;
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}
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if (i915->current.depth_bo && (i915->static_dirty & I915_DST_BUF_DEPTH)) {
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i915->validation_buffers[i915->num_validation_buffers++] =
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i915->current.depth_bo;
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*batch_space += 3;
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}
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if (i915->static_dirty & I915_DST_VARS)
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*batch_space += 2;
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if (i915->static_dirty & I915_DST_RECT)
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*batch_space += 5;
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}
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static void
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emit_static(struct i915_context *i915)
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{
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if (i915->current.cbuf_bo && (i915->static_dirty & I915_DST_BUF_COLOR)) {
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OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
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OUT_BATCH(i915->current.cbuf_flags);
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OUT_RELOC(i915->current.cbuf_bo, I915_USAGE_RENDER, 0);
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}
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/* What happens if no zbuf??
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*/
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if (i915->current.depth_bo && (i915->static_dirty & I915_DST_BUF_DEPTH)) {
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OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
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OUT_BATCH(i915->current.depth_flags);
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OUT_RELOC(i915->current.depth_bo, I915_USAGE_RENDER, 0);
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}
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if (i915->static_dirty & I915_DST_VARS) {
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OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
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OUT_BATCH(i915->current.dst_buf_vars);
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}
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}
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static void
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validate_map(struct i915_context *i915, unsigned *batch_space)
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{
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const uint32_t enabled = i915->current.sampler_enable_flags;
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uint32_t unit;
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struct i915_texture *tex;
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*batch_space = i915->current.sampler_enable_nr
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? 2 + 3 * i915->current.sampler_enable_nr
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: 0;
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for (unit = 0; unit < I915_TEX_UNITS; unit++) {
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if (enabled & (1 << unit)) {
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tex = i915_texture(i915->fragment_sampler_views[unit]->texture);
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i915->validation_buffers[i915->num_validation_buffers++] = tex->buffer;
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}
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}
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}
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static void
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emit_map(struct i915_context *i915)
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{
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const uint32_t nr = i915->current.sampler_enable_nr;
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if (nr) {
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const uint32_t enabled = i915->current.sampler_enable_flags;
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uint32_t unit;
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uint32_t count = 0;
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OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
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OUT_BATCH(enabled);
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for (unit = 0; unit < I915_TEX_UNITS; unit++) {
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if (enabled & (1 << unit)) {
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struct i915_texture *texture =
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i915_texture(i915->fragment_sampler_views[unit]->texture);
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struct i915_winsys_buffer *buf = texture->buffer;
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unsigned offset = i915->current.texbuffer[unit][2];
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assert(buf);
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count++;
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OUT_RELOC(buf, I915_USAGE_SAMPLER, offset);
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OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
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OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
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}
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}
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assert(count == nr);
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}
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}
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static void
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validate_sampler(struct i915_context *i915, unsigned *batch_space)
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{
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*batch_space = i915->current.sampler_enable_nr
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? 2 + 3 * i915->current.sampler_enable_nr
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: 0;
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}
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static void
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emit_sampler(struct i915_context *i915)
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{
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if (i915->current.sampler_enable_nr) {
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int i;
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OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * i915->current.sampler_enable_nr));
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OUT_BATCH(i915->current.sampler_enable_flags);
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for (i = 0; i < I915_TEX_UNITS; i++) {
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if (i915->current.sampler_enable_flags & (1 << i)) {
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OUT_BATCH(i915->current.sampler[i][0]);
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OUT_BATCH(i915->current.sampler[i][1]);
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OUT_BATCH(i915->current.sampler[i][2]);
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}
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}
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}
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}
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static void
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validate_constants(struct i915_context *i915, unsigned *batch_space)
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{
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int nr = i915->fs->num_constants ? 2 + 4 * i915->fs->num_constants : 0;
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*batch_space = nr;
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}
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static void
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emit_constants(struct i915_context *i915)
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{
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/* Collate the user-defined constants with the fragment shader's
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* immediates according to the constant_flags[] array.
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*/
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const uint32_t nr = i915->fs->num_constants;
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assert(nr <= I915_MAX_CONSTANT);
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if (nr) {
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uint32_t i;
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OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4));
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OUT_BATCH((1 << nr) - 1);
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for (i = 0; i < nr; i++) {
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const uint32_t *c;
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if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
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/* grab user-defined constant */
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c = (uint32_t *)i915_buffer(i915->constants[PIPE_SHADER_FRAGMENT])
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->data;
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c += 4 * i;
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} else {
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/* emit program constant */
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c = (uint32_t *)i915->fs->constants[i];
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}
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#if 0 /* debug */
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{
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float *f = (float *) c;
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printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
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(i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
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? "user" : "immediate"));
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}
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#endif
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OUT_BATCH(*c++);
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OUT_BATCH(*c++);
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OUT_BATCH(*c++);
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OUT_BATCH(*c++);
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}
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}
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}
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static void
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validate_program(struct i915_context *i915, unsigned *batch_space)
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{
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/* we need more batch space if we want to emulate rgba framebuffers */
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*batch_space = i915->fs->program_len + (i915->current.fixup_swizzle ? 3 : 0);
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}
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static void
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emit_program(struct i915_context *i915)
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{
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/* we should always have, at least, a pass-through program */
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assert(i915->fs->program_len > 0);
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/* If we're doing a fixup swizzle, that's 3 more dwords to add. */
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uint32_t additional_size = 0;
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if (i915->current.fixup_swizzle)
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additional_size = 3;
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/* output the program: 1 dword of header, then 3 dwords per decl/instruction */
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assert(i915->fs->program_len % 3 == 1);
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/* first word has the size, adjust it for fixup swizzle */
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OUT_BATCH(i915->fs->program[0] + additional_size);
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for (int i = 1; i < i915->fs->program_len; i++)
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OUT_BATCH(i915->fs->program[i]);
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/* we emit an additional mov with swizzle to fake RGBA framebuffers */
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if (i915->current.fixup_swizzle) {
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/* mov out_color, out_color.zyxw */
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OUT_BATCH(A0_MOV | (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
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A0_DEST_CHANNEL_ALL | (REG_TYPE_OC << A0_SRC0_TYPE_SHIFT) |
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(T_DIFFUSE << A0_SRC0_NR_SHIFT));
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OUT_BATCH(i915->current.fixup_swizzle);
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OUT_BATCH(0);
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}
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}
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static void
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emit_draw_rect(struct i915_context *i915)
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{
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if (i915->static_dirty & I915_DST_RECT) {
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OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
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OUT_BATCH(DRAW_RECT_DIS_DEPTH_OFS);
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OUT_BATCH(i915->current.draw_offset);
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OUT_BATCH(i915->current.draw_size);
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OUT_BATCH(i915->current.draw_offset);
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}
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}
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static bool
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i915_validate_state(struct i915_context *i915, unsigned *batch_space)
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{
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unsigned tmp;
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i915->num_validation_buffers = 0;
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if (i915->hardware_dirty & I915_HW_INVARIANT)
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*batch_space = ARRAY_SIZE(invariant_state);
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else
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*batch_space = 0;
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#if 0
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static int counter_total = 0;
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#define VALIDATE_ATOM(atom, hw_dirty) \
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if (i915->hardware_dirty & hw_dirty) { \
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static int counter_##atom = 0; \
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validate_##atom(i915, &tmp); \
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*batch_space += tmp; \
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counter_##atom += tmp; \
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counter_total += tmp; \
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printf("%s: \t%d/%d \t%2.2f\n", #atom, counter_##atom, counter_total, \
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counter_##atom * 100.f / counter_total); \
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}
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#else
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#define VALIDATE_ATOM(atom, hw_dirty) \
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if (i915->hardware_dirty & hw_dirty) { \
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validate_##atom(i915, &tmp); \
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*batch_space += tmp; \
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}
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#endif
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VALIDATE_ATOM(flush, I915_HW_FLUSH);
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VALIDATE_ATOM(immediate, I915_HW_IMMEDIATE);
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VALIDATE_ATOM(dynamic, I915_HW_DYNAMIC);
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VALIDATE_ATOM(static, I915_HW_STATIC);
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VALIDATE_ATOM(map, I915_HW_MAP);
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VALIDATE_ATOM(sampler, I915_HW_SAMPLER);
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VALIDATE_ATOM(constants, I915_HW_CONSTANTS);
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VALIDATE_ATOM(program, I915_HW_PROGRAM);
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#undef VALIDATE_ATOM
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if (i915->num_validation_buffers == 0)
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return true;
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if (!i915_winsys_validate_buffers(i915->batch, i915->validation_buffers,
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i915->num_validation_buffers))
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return false;
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|
|
|
return true;
|
|
}
|
|
|
|
/* Push the state into the sarea and/or texture memory.
|
|
*/
|
|
void
|
|
i915_emit_hardware_state(struct i915_context *i915)
|
|
{
|
|
unsigned batch_space;
|
|
uintptr_t save_ptr;
|
|
|
|
assert(i915->dirty == 0);
|
|
|
|
if (I915_DBG_ON(DBG_ATOMS))
|
|
i915_dump_hardware_dirty(i915, __func__);
|
|
|
|
if (!i915_validate_state(i915, &batch_space)) {
|
|
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
|
|
assert(i915_validate_state(i915, &batch_space));
|
|
}
|
|
|
|
if (!BEGIN_BATCH(batch_space)) {
|
|
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
|
|
assert(i915_validate_state(i915, &batch_space));
|
|
assert(BEGIN_BATCH(batch_space));
|
|
}
|
|
|
|
save_ptr = (uintptr_t)i915->batch->ptr;
|
|
|
|
#define EMIT_ATOM(atom, hw_dirty) \
|
|
if (i915->hardware_dirty & hw_dirty) \
|
|
emit_##atom(i915);
|
|
EMIT_ATOM(flush, I915_HW_FLUSH);
|
|
EMIT_ATOM(invariant, I915_HW_INVARIANT);
|
|
EMIT_ATOM(immediate, I915_HW_IMMEDIATE);
|
|
EMIT_ATOM(dynamic, I915_HW_DYNAMIC);
|
|
EMIT_ATOM(static, I915_HW_STATIC);
|
|
EMIT_ATOM(map, I915_HW_MAP);
|
|
EMIT_ATOM(sampler, I915_HW_SAMPLER);
|
|
EMIT_ATOM(constants, I915_HW_CONSTANTS);
|
|
EMIT_ATOM(program, I915_HW_PROGRAM);
|
|
EMIT_ATOM(draw_rect, I915_HW_STATIC);
|
|
#undef EMIT_ATOM
|
|
|
|
I915_DBG(DBG_EMIT, "%s: used %d dwords, %d dwords reserved\n", __func__,
|
|
((uintptr_t)i915->batch->ptr - save_ptr) / 4, batch_space);
|
|
assert(((uintptr_t)i915->batch->ptr - save_ptr) / 4 == batch_space);
|
|
|
|
i915->hardware_dirty = 0;
|
|
i915->immediate_dirty = 0;
|
|
i915->dynamic_dirty = 0;
|
|
i915->static_dirty = 0;
|
|
i915->flush_dirty = 0;
|
|
}
|