mirror of https://gitlab.freedesktop.org/mesa/mesa
192 lines
8.4 KiB
C
192 lines
8.4 KiB
C
/*
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* Copyright 2014, 2015 Red Hat.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef VIRGL_WINSYS_H
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#define VIRGL_WINSYS_H
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#include "pipe/p_defines.h"
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#include "virtio-gpu/virgl_hw.h"
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struct pipe_box;
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struct pipe_resource;
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struct pipe_fence_handle;
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struct winsys_handle;
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struct virgl_hw_res;
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#define VIRGL_MAX_TBUF_DWORDS 1024
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#define VIRGL_MAX_CMDBUF_DWORDS ((64 * 1024) + VIRGL_MAX_TBUF_DWORDS)
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#define VIRGL_MAX_PLANE_COUNT 3
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struct virgl_drm_caps {
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union virgl_caps caps;
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};
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struct virgl_cmd_buf {
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unsigned cdw;
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uint32_t *buf;
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};
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struct virgl_winsys {
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unsigned pci_id;
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int supports_fences; /* In/Out fences are supported */
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int supports_encoded_transfers; /* Encoded transfers are supported */
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int supports_coherent; /* Coherent memory is supported */
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void (*destroy)(struct virgl_winsys *vws);
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int (*get_fd)(struct virgl_winsys *vws);
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int (*transfer_put)(struct virgl_winsys *vws,
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struct virgl_hw_res *res,
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const struct pipe_box *box,
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uint32_t stride, uint32_t layer_stride,
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uint32_t buf_offset, uint32_t level);
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int (*transfer_get)(struct virgl_winsys *vws,
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struct virgl_hw_res *res,
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const struct pipe_box *box,
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uint32_t stride, uint32_t layer_stride,
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uint32_t buf_offset, uint32_t level);
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struct virgl_hw_res *(*resource_create)(struct virgl_winsys *vws,
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enum pipe_texture_target target,
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const void *map_front_private,
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uint32_t format, uint32_t bind,
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uint32_t width, uint32_t height,
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uint32_t depth, uint32_t array_size,
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uint32_t last_level, uint32_t nr_samples,
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uint32_t flags, uint32_t size);
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void (*resource_reference)(struct virgl_winsys *qws,
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struct virgl_hw_res **dres,
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struct virgl_hw_res *sres);
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void *(*resource_map)(struct virgl_winsys *vws, struct virgl_hw_res *res);
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void (*resource_wait)(struct virgl_winsys *vws, struct virgl_hw_res *res);
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bool (*resource_is_busy)(struct virgl_winsys *vws,
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struct virgl_hw_res *res);
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struct virgl_hw_res *(*resource_create_from_handle)(struct virgl_winsys *vws,
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struct winsys_handle *whandle,
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struct pipe_resource *templ,
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uint32_t *plane,
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uint32_t *stride,
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uint32_t *plane_offset,
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uint64_t *modifier,
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uint32_t *blob_mem);
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void (*resource_set_type)(struct virgl_winsys *vws,
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struct virgl_hw_res *res,
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uint32_t format, uint32_t bind,
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uint32_t width, uint32_t height,
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uint32_t usage, uint64_t modifier,
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uint32_t plane_count,
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const uint32_t *plane_strides,
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const uint32_t *plane_offsets);
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bool (*resource_get_handle)(struct virgl_winsys *vws,
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struct virgl_hw_res *res,
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uint32_t stride,
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struct winsys_handle *whandle);
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uint32_t (*resource_get_storage_size)(struct virgl_winsys* vws,
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struct virgl_hw_res* res);
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struct virgl_cmd_buf *(*cmd_buf_create)(struct virgl_winsys *ws, uint32_t size);
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void (*cmd_buf_destroy)(struct virgl_cmd_buf *buf);
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void (*emit_res)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf, struct virgl_hw_res *res, bool write_buffer);
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int (*submit_cmd)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf,
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struct pipe_fence_handle **fence);
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bool (*res_is_referenced)(struct virgl_winsys *vws,
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struct virgl_cmd_buf *buf,
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struct virgl_hw_res *res);
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int (*get_caps)(struct virgl_winsys *vws, struct virgl_drm_caps *caps);
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/* fence */
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struct pipe_fence_handle *(*cs_create_fence)(struct virgl_winsys *vws, int fd);
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bool (*fence_wait)(struct virgl_winsys *vws,
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struct pipe_fence_handle *fence,
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uint64_t timeout);
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void (*fence_reference)(struct virgl_winsys *vws,
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struct pipe_fence_handle **dst,
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struct pipe_fence_handle *src);
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/* for sw paths */
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void (*flush_frontbuffer)(struct virgl_winsys *vws,
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struct virgl_cmd_buf *cbuf,
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struct virgl_hw_res *res,
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unsigned level, unsigned layer,
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void *winsys_drawable_handle,
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struct pipe_box *sub_box);
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void (*fence_server_sync)(struct virgl_winsys *vws,
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struct virgl_cmd_buf *cbuf,
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struct pipe_fence_handle *fence);
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int (*fence_get_fd)(struct virgl_winsys *vws,
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struct pipe_fence_handle *fence);
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};
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/* this defaults all newer caps,
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* the kernel will overwrite these if newer version is available.
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*/
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static inline void virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps *caps)
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{
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caps->caps.v2.min_aliased_point_size = 1.f;
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caps->caps.v2.max_aliased_point_size = 255.f;
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caps->caps.v2.min_smooth_point_size = 1.f;
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caps->caps.v2.max_smooth_point_size = 190.f;
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caps->caps.v2.min_aliased_line_width = 1.f;
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caps->caps.v2.max_aliased_line_width = 10.f;
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caps->caps.v2.min_smooth_line_width = 0.f;
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caps->caps.v2.max_smooth_line_width = 10.f;
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caps->caps.v2.max_texture_lod_bias = 15.0f;
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caps->caps.v2.max_geom_output_vertices = 256;
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caps->caps.v2.max_geom_total_output_components = 1024;
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caps->caps.v2.max_vertex_outputs = 32;
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caps->caps.v2.max_vertex_attribs = 16;
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caps->caps.v2.max_shader_patch_varyings = 30;
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caps->caps.v2.min_texel_offset = -8;
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caps->caps.v2.max_texel_offset = 7;
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caps->caps.v2.min_texture_gather_offset = -8;
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caps->caps.v2.max_texture_gather_offset = 7;
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caps->caps.v2.texture_buffer_offset_alignment = 0;
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caps->caps.v2.uniform_buffer_offset_alignment = 256;
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caps->caps.v2.shader_buffer_offset_alignment = 32;
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caps->caps.v2.capability_bits = 0;
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caps->caps.v2.max_vertex_attrib_stride = 0;
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caps->caps.v2.max_image_samples = 0;
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caps->caps.v2.max_compute_work_group_invocations = 0;
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caps->caps.v2.max_compute_shared_memory_size = 0;
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caps->caps.v2.host_feature_check_version = 0;
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caps->caps.v2.max_shader_sampler_views = 16;
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for (int shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
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caps->caps.v2.max_const_buffer_size[shader_type] = 4096 * sizeof(float[4]);
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}
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}
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extern enum virgl_formats pipe_to_virgl_format(enum pipe_format format);
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extern enum pipe_format virgl_to_pipe_format(enum virgl_formats format);
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#endif
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