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Jesse Natalie ad7f7ea007 dzn: Don't use write-combine memory for cache-coherent UMA 
Cache coherent UMA implies that the GPU is reading data through the
CPU caches. Using write-combined CPU pages for such a system would
be bad, since the GPU would then be reading uncached data. One
example of such a system is WARP. This significantly improves WARP's
performance for some apps (including the CTS).

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22225>
(cherry picked from commit eaa8c8097c)
 		2023-04-20 16:05:00 -07:00
..
ci dzn: For CmdBindIndexBuffer, look at the graphics pipeline instead of last used 2023-01-04 11:12:34 -08:00
clc microsoft/clc: Set features that are used by CL tests 2023-02-22 23:33:44 +00:00
compiler microsoft/compiler: Fix setting bit 31 in feature flags 2023-04-04 10:47:22 -07:00
spirv_to_dxil microsoft/spirv_to_dxil: Let linking report the need of runtime data 2023-01-10 13:43:01 +00:00
vulkan dzn: Don't use write-combine memory for cache-coherent UMA 2023-04-20 16:05:00 -07:00
meson.build
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