mirror of https://gitlab.freedesktop.org/mesa/mesa
729 lines
24 KiB
C
729 lines
24 KiB
C
/*
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* Copyright © 2016 Red Hat
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* based on intel anv code:
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "radv_meta.h"
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#include "vk_util.h"
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#include <fcntl.h>
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#include <limits.h>
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#ifndef _WIN32
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#include <pwd.h>
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#endif
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#include <sys/stat.h>
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static void
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radv_suspend_queries(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer)
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{
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/* Pipeline statistics queries. */
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if (cmd_buffer->state.active_pipeline_queries > 0) {
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cmd_buffer->state.flush_bits &= ~RADV_CMD_FLAG_START_PIPELINE_STATS;
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cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_STOP_PIPELINE_STATS;
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state->active_pipeline_gds_queries = cmd_buffer->state.active_pipeline_gds_queries;
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cmd_buffer->state.active_pipeline_gds_queries = 0;
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}
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/* Occlusion queries. */
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if (cmd_buffer->state.active_occlusion_queries > 0) {
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radv_set_db_count_control(cmd_buffer, false);
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}
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/* Primitives generated queries (legacy). */
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if (cmd_buffer->state.active_prims_gen_queries) {
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cmd_buffer->state.suspend_streamout = true;
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radv_emit_streamout_enable(cmd_buffer);
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}
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/* Primitives generated queries (NGG). */
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if (cmd_buffer->state.active_prims_gen_gds_queries) {
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state->active_prims_gen_gds_queries = cmd_buffer->state.active_prims_gen_gds_queries;
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cmd_buffer->state.active_prims_gen_gds_queries = 0;
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}
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/* Transform feedback queries (NGG). */
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if (cmd_buffer->state.active_prims_xfb_gds_queries) {
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state->active_prims_xfb_gds_queries = cmd_buffer->state.active_prims_xfb_gds_queries;
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cmd_buffer->state.active_prims_xfb_gds_queries = 0;
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}
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}
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static void
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radv_resume_queries(const struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer)
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{
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/* Pipeline statistics queries. */
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if (cmd_buffer->state.active_pipeline_queries > 0) {
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cmd_buffer->state.flush_bits &= ~RADV_CMD_FLAG_STOP_PIPELINE_STATS;
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cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_START_PIPELINE_STATS;
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cmd_buffer->state.active_pipeline_gds_queries = state->active_pipeline_gds_queries;
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}
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/* Occlusion queries. */
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if (cmd_buffer->state.active_occlusion_queries > 0) {
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radv_set_db_count_control(cmd_buffer, true);
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}
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/* Primitives generated queries (legacy). */
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if (cmd_buffer->state.active_prims_gen_queries) {
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cmd_buffer->state.suspend_streamout = false;
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radv_emit_streamout_enable(cmd_buffer);
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}
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/* Primitives generated queries (NGG). */
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if (state->active_prims_gen_gds_queries) {
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cmd_buffer->state.active_prims_gen_gds_queries = state->active_prims_gen_gds_queries;
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}
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/* Transform feedback queries (NGG). */
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if (state->active_prims_xfb_gds_queries) {
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cmd_buffer->state.active_prims_xfb_gds_queries = state->active_prims_xfb_gds_queries;
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}
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}
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void
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radv_meta_save(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer,
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uint32_t flags)
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{
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VkPipelineBindPoint bind_point = flags & RADV_META_SAVE_GRAPHICS_PIPELINE
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? VK_PIPELINE_BIND_POINT_GRAPHICS
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: VK_PIPELINE_BIND_POINT_COMPUTE;
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struct radv_descriptor_state *descriptors_state =
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radv_get_descriptors_state(cmd_buffer, bind_point);
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assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE | RADV_META_SAVE_COMPUTE_PIPELINE));
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state->flags = flags;
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state->active_prims_gen_gds_queries = 0;
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state->active_prims_xfb_gds_queries = 0;
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if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
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assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE));
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state->old_graphics_pipeline = cmd_buffer->state.graphics_pipeline;
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/* Save all dynamic states. */
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state->dynamic = cmd_buffer->state.dynamic;
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}
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if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
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assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE));
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state->old_compute_pipeline = cmd_buffer->state.compute_pipeline;
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}
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if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
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state->old_descriptor_set0 = descriptors_state->sets[0];
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if (!(descriptors_state->valid & 1))
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state->flags &= ~RADV_META_SAVE_DESCRIPTORS;
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}
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if (state->flags & RADV_META_SAVE_CONSTANTS) {
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memcpy(state->push_constants, cmd_buffer->push_constants, MAX_PUSH_CONSTANTS_SIZE);
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}
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if (state->flags & RADV_META_SAVE_RENDER) {
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state->render = cmd_buffer->state.render;
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radv_cmd_buffer_reset_rendering(cmd_buffer);
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}
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if (state->flags & RADV_META_SUSPEND_PREDICATING) {
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state->predicating = cmd_buffer->state.predicating;
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cmd_buffer->state.predicating = false;
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}
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radv_suspend_queries(state, cmd_buffer);
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}
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void
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radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer)
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{
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VkPipelineBindPoint bind_point = state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE
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? VK_PIPELINE_BIND_POINT_GRAPHICS
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: VK_PIPELINE_BIND_POINT_COMPUTE;
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if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
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if (state->old_graphics_pipeline) {
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radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS,
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radv_pipeline_to_handle(&state->old_graphics_pipeline->base));
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} else {
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cmd_buffer->state.graphics_pipeline = NULL;
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}
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/* Restore all dynamic states. */
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cmd_buffer->state.dynamic = state->dynamic;
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cmd_buffer->state.dirty |= RADV_DYNAMIC_ALL;
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/* Re-emit the guardband state because meta operations changed dynamic states. */
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND;
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}
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if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
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if (state->old_compute_pipeline) {
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radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE,
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radv_pipeline_to_handle(&state->old_compute_pipeline->base));
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} else {
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cmd_buffer->state.compute_pipeline = NULL;
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}
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}
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if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
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radv_set_descriptor_set(cmd_buffer, bind_point, state->old_descriptor_set0, 0);
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}
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if (state->flags & RADV_META_SAVE_CONSTANTS) {
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VkShaderStageFlags stages = VK_SHADER_STAGE_COMPUTE_BIT;
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if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE)
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stages |= VK_SHADER_STAGE_ALL_GRAPHICS;
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radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), VK_NULL_HANDLE, stages, 0,
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MAX_PUSH_CONSTANTS_SIZE, state->push_constants);
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}
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if (state->flags & RADV_META_SAVE_RENDER) {
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cmd_buffer->state.render = state->render;
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cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER;
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}
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if (state->flags & RADV_META_SUSPEND_PREDICATING)
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cmd_buffer->state.predicating = state->predicating;
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radv_resume_queries(state, cmd_buffer);
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}
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VkImageViewType
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radv_meta_get_view_type(const struct radv_image *image)
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{
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switch (image->vk.image_type) {
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case VK_IMAGE_TYPE_1D:
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return VK_IMAGE_VIEW_TYPE_1D;
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case VK_IMAGE_TYPE_2D:
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return VK_IMAGE_VIEW_TYPE_2D;
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case VK_IMAGE_TYPE_3D:
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return VK_IMAGE_VIEW_TYPE_3D;
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default:
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unreachable("bad VkImageViewType");
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}
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}
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/**
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* When creating a destination VkImageView, this function provides the needed
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* VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
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*/
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uint32_t
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radv_meta_get_iview_layer(const struct radv_image *dest_image,
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const VkImageSubresourceLayers *dest_subresource,
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const VkOffset3D *dest_offset)
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{
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switch (dest_image->vk.image_type) {
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case VK_IMAGE_TYPE_1D:
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case VK_IMAGE_TYPE_2D:
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return dest_subresource->baseArrayLayer;
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case VK_IMAGE_TYPE_3D:
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/* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
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* but meta does it anyway. When doing so, we translate the
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* destination's z offset into an array offset.
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*/
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return dest_offset->z;
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default:
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assert(!"bad VkImageType");
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return 0;
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}
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}
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static VKAPI_ATTR void * VKAPI_CALL
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meta_alloc(void *_device, size_t size, size_t alignment, VkSystemAllocationScope allocationScope)
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{
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struct radv_device *device = _device;
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return device->vk.alloc.pfnAllocation(device->vk.alloc.pUserData, size, alignment,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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}
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static VKAPI_ATTR void * VKAPI_CALL
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meta_realloc(void *_device, void *original, size_t size, size_t alignment,
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VkSystemAllocationScope allocationScope)
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{
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struct radv_device *device = _device;
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return device->vk.alloc.pfnReallocation(device->vk.alloc.pUserData, original, size, alignment,
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VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
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}
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static VKAPI_ATTR void VKAPI_CALL
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meta_free(void *_device, void *data)
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{
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struct radv_device *device = _device;
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device->vk.alloc.pfnFree(device->vk.alloc.pUserData, data);
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}
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#ifndef _WIN32
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static bool
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radv_builtin_cache_path(char *path)
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{
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char *xdg_cache_home = getenv("XDG_CACHE_HOME");
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const char *suffix = "/radv_builtin_shaders";
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const char *suffix2 = "/.cache/radv_builtin_shaders";
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struct passwd pwd, *result;
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char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
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int ret;
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if (xdg_cache_home) {
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ret = snprintf(path, PATH_MAX + 1, "%s%s%zd", xdg_cache_home, suffix, sizeof(void *) * 8);
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return ret > 0 && ret < PATH_MAX + 1;
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}
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getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
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if (!result)
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return false;
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strcpy(path, pwd.pw_dir);
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strcat(path, "/.cache");
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if (mkdir(path, 0755) && errno != EEXIST)
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return false;
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ret = snprintf(path, PATH_MAX + 1, "%s%s%zd", pwd.pw_dir, suffix2, sizeof(void *) * 8);
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return ret > 0 && ret < PATH_MAX + 1;
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}
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#endif
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static bool
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radv_load_meta_pipeline(struct radv_device *device)
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{
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#ifdef _WIN32
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return false;
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#else
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char path[PATH_MAX + 1];
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struct stat st;
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void *data = NULL;
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bool ret = false;
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int fd = -1;
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VkResult result = VK_SUCCESS;
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VkPipelineCacheCreateInfo create_info = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO,
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};
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if (!radv_builtin_cache_path(path))
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goto fail;
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fd = open(path, O_RDONLY);
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if (fd < 0)
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goto fail;
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if (fstat(fd, &st))
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goto fail;
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data = malloc(st.st_size);
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if (!data)
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goto fail;
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if (read(fd, data, st.st_size) == -1)
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goto fail;
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create_info.initialDataSize = st.st_size;
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create_info.pInitialData = data;
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fail:
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result = radv_CreatePipelineCache(radv_device_to_handle(device), &create_info, NULL, &device->meta_state.cache);
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if (result == VK_SUCCESS) {
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device->meta_state.initial_cache_entries = radv_pipeline_cache_from_handle(device->meta_state.cache)->kernel_count;
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ret = device->meta_state.initial_cache_entries > 0;
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}
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free(data);
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if (fd >= 0)
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close(fd);
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return ret;
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#endif
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}
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static void
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radv_store_meta_pipeline(struct radv_device *device)
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{
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#ifndef _WIN32
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char path[PATH_MAX + 1], path2[PATH_MAX + 7];
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size_t size;
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void *data = NULL;
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if (device->meta_state.cache == VK_NULL_HANDLE)
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return;
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/* Skip serialization if no entries were added. */
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if (radv_pipeline_cache_from_handle(device->meta_state.cache)->kernel_count <= device->meta_state.initial_cache_entries)
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return;
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if (radv_GetPipelineCacheData(radv_device_to_handle(device),
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device->meta_state.cache, &size,
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NULL))
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return;
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if (!radv_builtin_cache_path(path))
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return;
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strcpy(path2, path);
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strcat(path2, "XXXXXX");
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int fd = mkstemp(path2); // open(path, O_WRONLY | O_CREAT, 0600);
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if (fd < 0)
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return;
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data = malloc(size);
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if (!data)
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goto fail;
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if (radv_GetPipelineCacheData(radv_device_to_handle(device),
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device->meta_state.cache, &size,
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data))
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goto fail;
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if (write(fd, data, size) == -1)
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goto fail;
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rename(path2, path);
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fail:
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free(data);
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close(fd);
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unlink(path2);
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#endif
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}
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VkResult
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radv_device_init_meta(struct radv_device *device)
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{
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VkResult result;
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memset(&device->meta_state, 0, sizeof(device->meta_state));
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device->meta_state.alloc = (VkAllocationCallbacks){
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.pUserData = device,
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.pfnAllocation = meta_alloc,
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.pfnReallocation = meta_realloc,
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.pfnFree = meta_free,
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};
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bool loaded_cache = radv_load_meta_pipeline(device);
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bool on_demand = !loaded_cache;
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mtx_init(&device->meta_state.mtx, mtx_plain);
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device->app_shaders_internal = true;
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result = radv_device_init_meta_clear_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_clear;
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result = radv_device_init_meta_resolve_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_resolve;
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result = radv_device_init_meta_blit_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_blit;
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result = radv_device_init_meta_blit2d_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_blit2d;
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result = radv_device_init_meta_bufimage_state(device);
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if (result != VK_SUCCESS)
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goto fail_bufimage;
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result = radv_device_init_meta_depth_decomp_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_depth_decomp;
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result = radv_device_init_meta_buffer_state(device);
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if (result != VK_SUCCESS)
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goto fail_buffer;
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result = radv_device_init_meta_query_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_query;
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result = radv_device_init_meta_fast_clear_flush_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_fast_clear;
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result = radv_device_init_meta_resolve_compute_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_resolve_compute;
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result = radv_device_init_meta_resolve_fragment_state(device, on_demand);
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if (result != VK_SUCCESS)
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goto fail_resolve_fragment;
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|
|
if (device->physical_device->use_fmask) {
|
|
result = radv_device_init_meta_fmask_expand_state(device);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_fmask_expand;
|
|
|
|
result = radv_device_init_meta_fmask_copy_state(device);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_fmask_copy;
|
|
}
|
|
|
|
if (radv_enable_rt(device->physical_device, false)) {
|
|
result = radv_device_init_accel_struct_build_state(device);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_accel_struct_build;
|
|
}
|
|
|
|
result = radv_device_init_meta_etc_decode_state(device, on_demand);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_etc_decode;
|
|
|
|
if (device->uses_device_generated_commands) {
|
|
result = radv_device_init_dgc_prepare_state(device);
|
|
if (result != VK_SUCCESS)
|
|
goto fail_dgc;
|
|
}
|
|
|
|
device->app_shaders_internal = false;
|
|
|
|
return VK_SUCCESS;
|
|
|
|
fail_dgc:
|
|
radv_device_finish_dgc_prepare_state(device);
|
|
fail_etc_decode:
|
|
radv_device_finish_meta_etc_decode_state(device);
|
|
fail_accel_struct_build:
|
|
radv_device_finish_accel_struct_build_state(device);
|
|
fail_fmask_copy:
|
|
radv_device_finish_meta_fmask_copy_state(device);
|
|
fail_fmask_expand:
|
|
radv_device_finish_meta_fmask_expand_state(device);
|
|
fail_resolve_fragment:
|
|
radv_device_finish_meta_resolve_fragment_state(device);
|
|
fail_resolve_compute:
|
|
radv_device_finish_meta_resolve_compute_state(device);
|
|
fail_fast_clear:
|
|
radv_device_finish_meta_fast_clear_flush_state(device);
|
|
fail_query:
|
|
radv_device_finish_meta_query_state(device);
|
|
fail_buffer:
|
|
radv_device_finish_meta_buffer_state(device);
|
|
fail_depth_decomp:
|
|
radv_device_finish_meta_depth_decomp_state(device);
|
|
fail_bufimage:
|
|
radv_device_finish_meta_bufimage_state(device);
|
|
fail_blit2d:
|
|
radv_device_finish_meta_blit2d_state(device);
|
|
fail_blit:
|
|
radv_device_finish_meta_blit_state(device);
|
|
fail_resolve:
|
|
radv_device_finish_meta_resolve_state(device);
|
|
fail_clear:
|
|
radv_device_finish_meta_clear_state(device);
|
|
|
|
mtx_destroy(&device->meta_state.mtx);
|
|
radv_DestroyPipelineCache(radv_device_to_handle(device), device->meta_state.cache, NULL);
|
|
return result;
|
|
}
|
|
|
|
void
|
|
radv_device_finish_meta(struct radv_device *device)
|
|
{
|
|
radv_device_finish_dgc_prepare_state(device);
|
|
radv_device_finish_meta_etc_decode_state(device);
|
|
radv_device_finish_accel_struct_build_state(device);
|
|
radv_device_finish_meta_clear_state(device);
|
|
radv_device_finish_meta_resolve_state(device);
|
|
radv_device_finish_meta_blit_state(device);
|
|
radv_device_finish_meta_blit2d_state(device);
|
|
radv_device_finish_meta_bufimage_state(device);
|
|
radv_device_finish_meta_depth_decomp_state(device);
|
|
radv_device_finish_meta_query_state(device);
|
|
radv_device_finish_meta_buffer_state(device);
|
|
radv_device_finish_meta_fast_clear_flush_state(device);
|
|
radv_device_finish_meta_resolve_compute_state(device);
|
|
radv_device_finish_meta_resolve_fragment_state(device);
|
|
radv_device_finish_meta_fmask_expand_state(device);
|
|
radv_device_finish_meta_dcc_retile_state(device);
|
|
radv_device_finish_meta_copy_vrs_htile_state(device);
|
|
radv_device_finish_meta_fmask_copy_state(device);
|
|
|
|
radv_store_meta_pipeline(device);
|
|
radv_DestroyPipelineCache(radv_device_to_handle(device), device->meta_state.cache, NULL);
|
|
mtx_destroy(&device->meta_state.mtx);
|
|
}
|
|
|
|
nir_builder PRINTFLIKE(3, 4)
|
|
radv_meta_init_shader(struct radv_device *dev, gl_shader_stage stage, const char *name, ...)
|
|
{
|
|
nir_builder b = nir_builder_init_simple_shader(stage, NULL, NULL);
|
|
if (name) {
|
|
va_list args;
|
|
va_start(args, name);
|
|
b.shader->info.name = ralloc_vasprintf(b.shader, name, args);
|
|
va_end(args);
|
|
}
|
|
|
|
b.shader->options = &dev->physical_device->nir_options[stage];
|
|
b.shader->info.workgroup_size[0] = 1;
|
|
b.shader->info.workgroup_size[1] = 1;
|
|
b.shader->info.workgroup_size[2] = 1;
|
|
|
|
return b;
|
|
}
|
|
|
|
/* vertex shader that generates vertices */
|
|
nir_shader *
|
|
radv_meta_build_nir_vs_generate_vertices(struct radv_device *dev)
|
|
{
|
|
const struct glsl_type *vec4 = glsl_vec4_type();
|
|
|
|
nir_variable *v_position;
|
|
|
|
nir_builder b = radv_meta_init_shader(dev, MESA_SHADER_VERTEX, "meta_vs_gen_verts");
|
|
|
|
nir_ssa_def *outvec = nir_gen_rect_vertices(&b, NULL, NULL);
|
|
|
|
v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4, "gl_Position");
|
|
v_position->data.location = VARYING_SLOT_POS;
|
|
|
|
nir_store_var(&b, v_position, outvec, 0xf);
|
|
|
|
return b.shader;
|
|
}
|
|
|
|
nir_shader *
|
|
radv_meta_build_nir_fs_noop(struct radv_device *dev)
|
|
{
|
|
return radv_meta_init_shader(dev, MESA_SHADER_FRAGMENT, "meta_noop_fs").shader;
|
|
}
|
|
|
|
void
|
|
radv_meta_build_resolve_shader_core(struct radv_device *device, nir_builder *b, bool is_integer,
|
|
int samples, nir_variable *input_img, nir_variable *color,
|
|
nir_ssa_def *img_coord)
|
|
{
|
|
/* do a txf_ms on each sample */
|
|
nir_ssa_def *tmp;
|
|
|
|
nir_ssa_def *input_img_deref = &nir_build_deref_var(b, input_img)->dest.ssa;
|
|
|
|
nir_tex_instr *tex = nir_tex_instr_create(b->shader, 3);
|
|
tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
|
|
tex->op = nir_texop_txf_ms;
|
|
tex->src[0].src_type = nir_tex_src_coord;
|
|
tex->src[0].src = nir_src_for_ssa(img_coord);
|
|
tex->src[1].src_type = nir_tex_src_ms_index;
|
|
tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
|
|
tex->src[2].src_type = nir_tex_src_texture_deref;
|
|
tex->src[2].src = nir_src_for_ssa(input_img_deref);
|
|
tex->dest_type = nir_get_nir_type_for_glsl_base_type(glsl_get_sampler_result_type(input_img->type));
|
|
tex->is_array = false;
|
|
tex->coord_components = 2;
|
|
|
|
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
|
|
nir_builder_instr_insert(b, &tex->instr);
|
|
|
|
tmp = &tex->dest.ssa;
|
|
|
|
if (is_integer || samples <= 1) {
|
|
nir_store_var(b, color, &tex->dest.ssa, 0xf);
|
|
return;
|
|
}
|
|
|
|
if (device->physical_device->use_fmask) {
|
|
nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 2);
|
|
tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
|
|
tex_all_same->op = nir_texop_samples_identical;
|
|
tex_all_same->src[0].src_type = nir_tex_src_coord;
|
|
tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
|
|
tex_all_same->src[1].src_type = nir_tex_src_texture_deref;
|
|
tex_all_same->src[1].src = nir_src_for_ssa(input_img_deref);
|
|
tex_all_same->dest_type = nir_type_bool1;
|
|
tex_all_same->is_array = false;
|
|
tex_all_same->coord_components = 2;
|
|
|
|
nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 1, "tex");
|
|
nir_builder_instr_insert(b, &tex_all_same->instr);
|
|
|
|
nir_ssa_def *not_all_same = nir_inot(b, &tex_all_same->dest.ssa);
|
|
nir_push_if(b, not_all_same);
|
|
}
|
|
|
|
for (int i = 1; i < samples; i++) {
|
|
nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3);
|
|
tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
|
|
tex_add->op = nir_texop_txf_ms;
|
|
tex_add->src[0].src_type = nir_tex_src_coord;
|
|
tex_add->src[0].src = nir_src_for_ssa(img_coord);
|
|
tex_add->src[1].src_type = nir_tex_src_ms_index;
|
|
tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
|
|
tex_add->src[2].src_type = nir_tex_src_texture_deref;
|
|
tex_add->src[2].src = nir_src_for_ssa(input_img_deref);
|
|
tex_add->dest_type = nir_type_float32;
|
|
tex_add->is_array = false;
|
|
tex_add->coord_components = 2;
|
|
|
|
nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
|
|
nir_builder_instr_insert(b, &tex_add->instr);
|
|
|
|
tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
|
|
}
|
|
|
|
tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
|
|
nir_store_var(b, color, tmp, 0xf);
|
|
|
|
if (device->physical_device->use_fmask) {
|
|
nir_push_else(b, NULL);
|
|
nir_store_var(b, color, &tex->dest.ssa, 0xf);
|
|
nir_pop_if(b, NULL);
|
|
}
|
|
}
|
|
|
|
nir_ssa_def *
|
|
radv_meta_load_descriptor(nir_builder *b, unsigned desc_set, unsigned binding)
|
|
{
|
|
nir_ssa_def *rsrc = nir_vulkan_resource_index(b, 3, 32, nir_imm_int(b, 0), .desc_set = desc_set,
|
|
.binding = binding);
|
|
return nir_channels(b, rsrc, 0x3);
|
|
}
|
|
|
|
nir_ssa_def *
|
|
get_global_ids(nir_builder *b, unsigned num_components)
|
|
{
|
|
unsigned mask = BITFIELD_MASK(num_components);
|
|
|
|
nir_ssa_def *local_ids = nir_channels(b, nir_load_local_invocation_id(b), mask);
|
|
nir_ssa_def *block_ids = nir_channels(b, nir_load_workgroup_id(b, 32), mask);
|
|
nir_ssa_def *block_size = nir_channels(
|
|
b,
|
|
nir_imm_ivec4(b, b->shader->info.workgroup_size[0], b->shader->info.workgroup_size[1],
|
|
b->shader->info.workgroup_size[2], 0),
|
|
mask);
|
|
|
|
return nir_iadd(b, nir_imul(b, block_ids, block_size), local_ids);
|
|
}
|
|
|
|
void
|
|
radv_break_on_count(nir_builder *b, nir_variable *var, nir_ssa_def *count)
|
|
{
|
|
nir_ssa_def *counter = nir_load_var(b, var);
|
|
|
|
nir_push_if(b, nir_uge(b, counter, count));
|
|
nir_jump(b, nir_jump_break);
|
|
nir_pop_if(b, NULL);
|
|
|
|
counter = nir_iadd_imm(b, counter, 1);
|
|
nir_store_var(b, var, counter, 0x1);
|
|
}
|