mirror of https://gitlab.freedesktop.org/mesa/mesa
177 lines
6.2 KiB
C
177 lines
6.2 KiB
C
/*
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* Copyright © 2016 Red Hat.
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* based in part on anv driver which is:
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef RADV_ACO_SHADER_INFO_H
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#define RADV_ACO_SHADER_INFO_H
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/* this will convert from radv shader info to the ACO one. */
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#include "aco_shader_info.h"
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#define ASSIGN_FIELD(x) aco_info->x = radv->x
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#define ASSIGN_FIELD_CP(x) memcpy(&aco_info->x, &radv->x, sizeof(radv->x))
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static inline void
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radv_aco_convert_shader_so_info(struct aco_shader_info *aco_info,
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const struct radv_shader_info *radv)
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{
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ASSIGN_FIELD(so.num_outputs);
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ASSIGN_FIELD_CP(so.outputs);
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ASSIGN_FIELD_CP(so.strides);
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/* enabled_stream_buffers_mask unused */
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}
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static inline void
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radv_aco_convert_shader_vp_info(struct aco_vp_output_info *aco_info,
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const struct radv_vs_output_info *radv)
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{
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ASSIGN_FIELD_CP(vs_output_param_offset);
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ASSIGN_FIELD(clip_dist_mask);
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ASSIGN_FIELD(cull_dist_mask);
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ASSIGN_FIELD(param_exports);
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ASSIGN_FIELD(prim_param_exports);
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ASSIGN_FIELD(writes_pointsize);
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ASSIGN_FIELD(writes_layer);
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ASSIGN_FIELD(writes_layer_per_primitive);
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ASSIGN_FIELD(writes_viewport_index);
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ASSIGN_FIELD(writes_viewport_index_per_primitive);
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ASSIGN_FIELD(writes_primitive_shading_rate);
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ASSIGN_FIELD(writes_primitive_shading_rate_per_primitive);
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ASSIGN_FIELD(export_prim_id);
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ASSIGN_FIELD(export_clip_dists);
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/* don't use export params */
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}
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static inline void
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radv_aco_convert_shader_info(struct aco_shader_info *aco_info,
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const struct radv_shader_info *radv)
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{
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ASSIGN_FIELD(wave_size);
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ASSIGN_FIELD(is_ngg);
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ASSIGN_FIELD(has_ngg_culling);
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ASSIGN_FIELD(has_ngg_early_prim_export);
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ASSIGN_FIELD(workgroup_size);
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radv_aco_convert_shader_vp_info(&aco_info->outinfo, &radv->outinfo);
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ASSIGN_FIELD(vs.as_es);
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ASSIGN_FIELD(vs.as_ls);
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ASSIGN_FIELD(vs.tcs_in_out_eq);
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ASSIGN_FIELD(vs.tcs_temp_only_input_mask);
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ASSIGN_FIELD(vs.use_per_attribute_vb_descs);
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ASSIGN_FIELD(vs.vb_desc_usage_mask);
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ASSIGN_FIELD(vs.input_slot_usage_mask);
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ASSIGN_FIELD(vs.has_prolog);
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ASSIGN_FIELD(vs.dynamic_inputs);
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ASSIGN_FIELD_CP(gs.output_usage_mask);
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ASSIGN_FIELD_CP(gs.num_stream_output_components);
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ASSIGN_FIELD_CP(gs.output_streams);
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ASSIGN_FIELD(gs.vertices_out);
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ASSIGN_FIELD(tcs.num_lds_blocks);
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ASSIGN_FIELD(tes.as_es);
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ASSIGN_FIELD(ps.writes_z);
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ASSIGN_FIELD(ps.writes_stencil);
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ASSIGN_FIELD(ps.writes_sample_mask);
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ASSIGN_FIELD(ps.has_epilog);
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ASSIGN_FIELD(ps.num_interp);
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ASSIGN_FIELD(ps.spi_ps_input);
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ASSIGN_FIELD(cs.subgroup_size);
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radv_aco_convert_shader_so_info(aco_info, radv);
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aco_info->gfx9_gs_ring_lds_size = radv->gs_ring_info.lds_size;
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}
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#define ASSIGN_VS_STATE_FIELD(x) aco_info->state.x = radv->state->x
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#define ASSIGN_VS_STATE_FIELD_CP(x) memcpy(&aco_info->state.x, &radv->state->x, sizeof(radv->state->x))
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static inline void
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radv_aco_convert_vs_prolog_key(struct aco_vs_prolog_key *aco_info,
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const struct radv_vs_prolog_key *radv)
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{
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ASSIGN_VS_STATE_FIELD(instance_rate_inputs);
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ASSIGN_VS_STATE_FIELD(nontrivial_divisors);
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ASSIGN_VS_STATE_FIELD(post_shuffle);
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ASSIGN_VS_STATE_FIELD(alpha_adjust_lo);
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ASSIGN_VS_STATE_FIELD(alpha_adjust_hi);
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ASSIGN_VS_STATE_FIELD_CP(divisors);
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ASSIGN_VS_STATE_FIELD_CP(formats);
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ASSIGN_FIELD(num_attributes);
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ASSIGN_FIELD(misaligned_mask);
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ASSIGN_FIELD(is_ngg);
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ASSIGN_FIELD(next_stage);
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}
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static inline void
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radv_aco_convert_ps_epilog_key(struct aco_ps_epilog_key *aco_info,
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const struct radv_ps_epilog_key *radv)
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{
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ASSIGN_FIELD(spi_shader_col_format);
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ASSIGN_FIELD(color_is_int8);
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ASSIGN_FIELD(color_is_int10);
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ASSIGN_FIELD(enable_mrt_output_nan_fixup);
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ASSIGN_FIELD(mrt0_is_dual_src);
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}
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static inline void
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radv_aco_convert_pipe_key(struct aco_stage_input *aco_info,
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const struct radv_pipeline_key *radv)
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{
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ASSIGN_FIELD(optimisations_disabled);
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ASSIGN_FIELD(image_2d_view_of_3d);
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ASSIGN_FIELD(vs.instance_rate_inputs);
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ASSIGN_FIELD_CP(vs.instance_rate_divisors);
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ASSIGN_FIELD_CP(vs.vertex_attribute_formats);
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ASSIGN_FIELD_CP(vs.vertex_attribute_bindings);
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ASSIGN_FIELD_CP(vs.vertex_attribute_offsets);
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ASSIGN_FIELD_CP(vs.vertex_attribute_strides);
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ASSIGN_FIELD_CP(vs.vertex_binding_align);
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ASSIGN_FIELD(tcs.tess_input_vertices);
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ASSIGN_FIELD(ps.col_format);
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ASSIGN_FIELD(ps.alpha_to_coverage_via_mrtz);
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ASSIGN_FIELD(ps.mrt0_is_dual_src);
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}
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static inline void
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radv_aco_convert_opts(struct aco_compiler_options *aco_info,
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const struct radv_nir_compiler_options *radv)
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{
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radv_aco_convert_pipe_key(&aco_info->key, &radv->key);
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ASSIGN_FIELD(robust_buffer_access);
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ASSIGN_FIELD(dump_shader);
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ASSIGN_FIELD(dump_preoptir);
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ASSIGN_FIELD(record_ir);
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ASSIGN_FIELD(record_stats);
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ASSIGN_FIELD(has_ls_vgpr_init_bug);
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ASSIGN_FIELD(wgp_mode);
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ASSIGN_FIELD(family);
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ASSIGN_FIELD(gfx_level);
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ASSIGN_FIELD(address32_hi);
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ASSIGN_FIELD(debug.func);
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ASSIGN_FIELD(debug.private_data);
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}
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#undef ASSIGN_VS_STATE_FIELD
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#undef ASSIGN_VS_STATE_FIELD_CP
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#undef ASSIGN_FIELD
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#undef ASSIGN_FIELD_CP
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#endif
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