mirror of https://gitlab.freedesktop.org/mesa/mesa
7ac6176ea5
mem_access_bit_size needs to split up 64x4 into 2 loads. Fixes: dEQP-VK.spirv_assembly.instruction.compute.64bit_compare.int64.comp_opiequal_vector Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635> |
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| .. | ||
| test | ||
| agx_builder.h.py | ||
| agx_compile.c | ||
| agx_compile.h | ||
| agx_compiler.h | ||
| agx_dce.c | ||
| agx_debug.h | ||
| agx_insert_waits.c | ||
| agx_internal_formats.h | ||
| agx_ir.c | ||
| agx_liveness.c | ||
| agx_lower_64bit.c | ||
| agx_lower_parallel_copy.c | ||
| agx_lower_pseudo.c | ||
| agx_lower_uniform_sources.c | ||
| agx_minifloat.h | ||
| agx_nir.h | ||
| agx_nir_algebraic.py | ||
| agx_nir_fence_images.c | ||
| agx_nir_lower_address.c | ||
| agx_nir_lower_discard_zs_emit.c | ||
| agx_nir_lower_frag_sidefx.c | ||
| agx_nir_lower_interpolation.c | ||
| agx_nir_lower_load_mask.c | ||
| agx_nir_lower_sample_mask.c | ||
| agx_nir_lower_shared_bitsize.c | ||
| agx_nir_lower_texture.c | ||
| agx_nir_lower_ubo.c | ||
| agx_nir_opt_preamble.c | ||
| agx_opcodes.c.py | ||
| agx_opcodes.h.py | ||
| agx_opcodes.py | ||
| agx_opt_cse.c | ||
| agx_opt_empty_else.c | ||
| agx_optimizer.c | ||
| agx_pack.c | ||
| agx_performance.c | ||
| agx_print.c | ||
| agx_register_allocate.c | ||
| agx_validate.c | ||
| meson.build | ||