mesa/src/amd/registers
Marek Olšák c62170fe57 winsys/amdgpu: fix (enable) preemption for chained IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19131>
2022-10-18 22:42:28 +00:00
..
canonicalize.py
gfx6.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx7.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx8.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx9.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx10-rsrc.json
gfx10.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx11-rsrc.json amd/registers: add gfx11-rsrc.json 2022-05-10 04:29:54 +00:00
gfx11.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx81.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
gfx103.json radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
makeregheader.py amd: enable gfx11 in header generator, fix drivers with renamed gfx6-10 defs 2022-05-10 04:29:54 +00:00
mergedbs.py
parse_kernel_headers.py radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
parseheader.py
pkt3.json winsys/amdgpu: fix (enable) preemption for chained IBs 2022-10-18 22:42:28 +00:00
regdb.py
registers-manually-defined.json