mirror of https://gitlab.freedesktop.org/mesa/mesa
637 lines
19 KiB
C++
637 lines
19 KiB
C++
/*
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* Copyright 2011 Christoph Bumiller
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "nv50_ir_target_nv50.h"
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namespace nv50_ir {
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Target *getTargetNV50(unsigned int chipset)
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{
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return new TargetNV50(chipset);
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}
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TargetNV50::TargetNV50(unsigned int card) : Target(true, true, false)
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{
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chipset = card;
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wposMask = 0;
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for (unsigned int i = 0; i <= SV_LAST; ++i)
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sysvalLocation[i] = ~0;
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initOpInfo();
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}
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#if 0
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// BULTINS / LIBRARY FUNCTIONS:
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// TODO
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static const uint32_t nvc0_builtin_code[] =
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{
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};
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static const uint16_t nvc0_builtin_offsets[NV50_BUILTIN_COUNT] =
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{
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};
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#endif
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void
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TargetNV50::getBuiltinCode(const uint32_t **code, uint32_t *size) const
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{
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*code = NULL;
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*size = 0;
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}
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uint32_t
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TargetNV50::getBuiltinOffset(int builtin) const
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{
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return 0;
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}
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struct nv50_opProperties
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{
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operation op;
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unsigned int mNeg : 4;
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unsigned int mAbs : 4;
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unsigned int mNot : 4;
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unsigned int mSat : 4;
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unsigned int fConst : 3;
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unsigned int fShared : 3;
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unsigned int fAttrib : 3;
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unsigned int fImm : 3;
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};
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static const struct nv50_opProperties _initProps[] =
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{
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// neg abs not sat c[] s[], a[], imm
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{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
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{ OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
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{ OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
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{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
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{ OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
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{ OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
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{ OP_ABS, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1, 0x1, 0x0 },
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{ OP_NEG, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x1, 0x0 },
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{ OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x0, 0x1, 0x1, 0x0 },
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{ OP_AND, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
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{ OP_OR, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
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{ OP_XOR, 0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
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{ OP_SHL, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2 },
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{ OP_SHR, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2 },
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{ OP_SET, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
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{ OP_PREEX2, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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{ OP_PRESIN, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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{ OP_EX2, 0x0, 0x0, 0x0, 0x8, 0x0, 0x0, 0x0, 0x0 },
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{ OP_LG2, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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{ OP_RCP, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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{ OP_RSQ, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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{ OP_DFDX, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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{ OP_DFDY, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
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};
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void TargetNV50::initOpInfo()
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{
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unsigned int i, j;
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static const operation commutativeList[] =
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{
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OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN,
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OP_SET_AND, OP_SET_OR, OP_SET_XOR, OP_SET, OP_SELP, OP_SLCT
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};
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static const operation shortFormList[] =
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{
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OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP,
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OP_PINTERP, OP_TEX, OP_TXF
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};
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static const operation noDestList[] =
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{
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OP_STORE, OP_EXPORT, OP_BRA, OP_CALL, OP_RET, OP_EXIT,
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OP_DISCARD, OP_CONT, OP_BREAK, OP_PRECONT, OP_PREBREAK, OP_PRERET,
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OP_JOIN, OP_JOINAT, OP_BRKPT, OP_MEMBAR, OP_EMIT, OP_RESTART,
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OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
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OP_SUREDB, OP_BAR
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};
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static const operation noPredList[] =
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{
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OP_CALL, OP_PREBREAK, OP_PRERET, OP_QUADON, OP_QUADPOP, OP_JOINAT,
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OP_EMIT, OP_RESTART
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};
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for (i = 0; i < DATA_FILE_COUNT; ++i)
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nativeFileMap[i] = (DataFile)i;
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nativeFileMap[FILE_PREDICATE] = FILE_FLAGS;
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for (i = 0; i < OP_LAST; ++i) {
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opInfo[i].variants = NULL;
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opInfo[i].op = (operation)i;
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opInfo[i].srcTypes = 1 << (int)TYPE_F32;
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opInfo[i].dstTypes = 1 << (int)TYPE_F32;
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opInfo[i].immdBits = 0xffffffff;
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opInfo[i].srcNr = operationSrcNr[i];
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for (j = 0; j < opInfo[i].srcNr; ++j) {
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opInfo[i].srcMods[j] = 0;
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opInfo[i].srcFiles[j] = 1 << (int)FILE_GPR;
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}
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opInfo[i].dstMods = 0;
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opInfo[i].dstFiles = 1 << (int)FILE_GPR;
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opInfo[i].hasDest = 1;
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opInfo[i].vector = (i >= OP_TEX && i <= OP_TEXCSAA);
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opInfo[i].commutative = false; /* set below */
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opInfo[i].pseudo = (i < OP_MOV);
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opInfo[i].predicate = !opInfo[i].pseudo;
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opInfo[i].flow = (i >= OP_BRA && i <= OP_JOIN);
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opInfo[i].minEncSize = 8; /* set below */
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}
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for (i = 0; i < ARRAY_SIZE(commutativeList); ++i)
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opInfo[commutativeList[i]].commutative = true;
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for (i = 0; i < ARRAY_SIZE(shortFormList); ++i)
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opInfo[shortFormList[i]].minEncSize = 4;
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for (i = 0; i < ARRAY_SIZE(noDestList); ++i)
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opInfo[noDestList[i]].hasDest = 0;
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for (i = 0; i < ARRAY_SIZE(noPredList); ++i)
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opInfo[noPredList[i]].predicate = 0;
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for (i = 0; i < ARRAY_SIZE(_initProps); ++i) {
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const struct nv50_opProperties *prop = &_initProps[i];
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for (int s = 0; s < 3; ++s) {
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if (prop->mNeg & (1 << s))
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opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_NEG;
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if (prop->mAbs & (1 << s))
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opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_ABS;
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if (prop->mNot & (1 << s))
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opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_NOT;
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if (prop->fConst & (1 << s))
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opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_MEMORY_CONST;
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if (prop->fShared & (1 << s))
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opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_MEMORY_SHARED;
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if (prop->fAttrib & (1 << s))
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opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_SHADER_INPUT;
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if (prop->fImm & (1 << s))
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opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_IMMEDIATE;
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}
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if (prop->mSat & 8)
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opInfo[prop->op].dstMods = NV50_IR_MOD_SAT;
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}
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if (chipset >= 0xa0)
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opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT;
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}
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unsigned int
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TargetNV50::getFileSize(DataFile file) const
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{
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switch (file) {
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case FILE_NULL: return 0;
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case FILE_GPR: return 254; // in 16-bit units **
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case FILE_PREDICATE: return 0;
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case FILE_FLAGS: return 4;
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case FILE_ADDRESS: return 4;
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case FILE_BARRIER: return 0;
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case FILE_IMMEDIATE: return 0;
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case FILE_MEMORY_CONST: return 65536;
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case FILE_SHADER_INPUT: return 0x200;
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case FILE_SHADER_OUTPUT: return 0x200;
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case FILE_MEMORY_BUFFER: return 0xffffffff;
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case FILE_MEMORY_GLOBAL: return 0xffffffff;
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case FILE_MEMORY_SHARED: return 16 << 10;
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case FILE_MEMORY_LOCAL: return 48 << 10;
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case FILE_SYSTEM_VALUE: return 16;
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default:
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assert(!"invalid file");
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return 0;
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}
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// ** only first 128 units encodable for 16-bit regs
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}
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unsigned int
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TargetNV50::getFileUnit(DataFile file) const
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{
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if (file == FILE_GPR || file == FILE_ADDRESS)
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return 1;
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if (file == FILE_SYSTEM_VALUE)
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return 2;
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return 0;
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}
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uint32_t
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TargetNV50::getSVAddress(DataFile shaderFile, const Symbol *sym) const
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{
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switch (sym->reg.data.sv.sv) {
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case SV_FACE:
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return 0x3fc;
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case SV_POSITION:
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{
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uint32_t addr = sysvalLocation[sym->reg.data.sv.sv];
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for (int c = 0; c < sym->reg.data.sv.index; ++c)
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if (wposMask & (1 << c))
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addr += 4;
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return addr;
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}
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case SV_PRIMITIVE_ID:
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return shaderFile == FILE_SHADER_INPUT ? 0x18 :
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sysvalLocation[sym->reg.data.sv.sv];
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case SV_NCTAID:
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return sym->reg.data.sv.index >= 2 ? 0x10 : 0x8 + 2 * sym->reg.data.sv.index;
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case SV_CTAID:
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return sym->reg.data.sv.index >= 2 ? 0x12 : 0xc + 2 * sym->reg.data.sv.index;
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case SV_NTID:
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return 0x2 + 2 * sym->reg.data.sv.index;
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case SV_TID:
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case SV_COMBINED_TID:
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return 0;
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case SV_SAMPLE_POS:
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return 0; /* sample position is handled differently */
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case SV_THREAD_KILL:
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return 0;
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default:
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return sysvalLocation[sym->reg.data.sv.sv];
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}
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}
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// long: rrr, arr, rcr, acr, rrc, arc, gcr, grr
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// short: rr, ar, rc, gr
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// immd: ri, gi
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bool
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TargetNV50::insnCanLoad(const Instruction *i, int s,
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const Instruction *ld) const
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{
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DataFile sf = ld->src(0).getFile();
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// immediate 0 can be represented by GPR $r63/$r127
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// this does not work with global memory ld/st/atom
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if (sf == FILE_IMMEDIATE && ld->getSrc(0)->reg.data.u64 == 0)
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return (!i->isPseudo() &&
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!i->asTex() &&
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i->op != OP_EXPORT &&
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i->op != OP_STORE &&
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((i->op != OP_ATOM && i->op != OP_LOAD) ||
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i->src(0).getFile() != FILE_MEMORY_GLOBAL));
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if (sf == FILE_IMMEDIATE && (i->predSrc >= 0 || i->flagsDef >= 0))
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return false;
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if (s >= opInfo[i->op].srcNr)
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return false;
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if (!(opInfo[i->op].srcFiles[s] & (1 << (int)sf)))
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return false;
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if (s == 2 && i->src(1).getFile() != FILE_GPR)
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return false;
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// NOTE: don't rely on flagsDef
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if (sf == FILE_IMMEDIATE)
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for (int d = 0; i->defExists(d); ++d)
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if (i->def(d).getFile() == FILE_FLAGS)
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return false;
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unsigned mode = 0;
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for (int z = 0; z < Target::operationSrcNr[i->op]; ++z) {
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DataFile zf = (z == s) ? sf : i->src(z).getFile();
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switch (zf) {
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case FILE_GPR:
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break;
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case FILE_MEMORY_SHARED:
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case FILE_SHADER_INPUT:
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mode |= 1 << (z * 2);
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break;
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case FILE_MEMORY_CONST:
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mode |= 2 << (z * 2);
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break;
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case FILE_IMMEDIATE:
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mode |= 3 << (z * 2);
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default:
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break;
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}
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}
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switch (mode) {
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case 0x00:
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case 0x01:
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case 0x03:
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case 0x08:
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case 0x0c:
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case 0x20:
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case 0x21:
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break;
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case 0x09:
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// Shader inputs get transformed to p[] in geometry shaders, and those
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// aren't allowed to be used at the same time as c[].
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if (ld->bb->getProgram()->getType() == Program::TYPE_GEOMETRY)
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return false;
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break;
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case 0x0d:
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if (ld->bb->getProgram()->getType() != Program::TYPE_GEOMETRY)
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return false;
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break;
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default:
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return false;
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}
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uint8_t ldSize;
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if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
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// 32-bit MUL will be split into 16-bit MULs
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if (ld->src(0).isIndirect(0))
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return false;
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if (sf == FILE_IMMEDIATE)
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return false;
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if (i->subOp == NV50_IR_SUBOP_MUL_HIGH && sf == FILE_MEMORY_CONST)
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return false;
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ldSize = 2;
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} else {
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ldSize = typeSizeof(ld->dType);
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}
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if (sf == FILE_IMMEDIATE) {
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if (ldSize == 2 && (i->op == OP_AND || i->op == OP_OR || i->op == OP_XOR))
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return false;
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return ldSize <= 4;
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}
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// Check if memory access is encodable:
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if (ldSize < 4 && sf == FILE_SHADER_INPUT) // no < 4-byte aligned a[] access
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return false;
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if (ld->getSrc(0)->reg.data.offset > (int32_t)(127 * ldSize))
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return false;
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if (ld->src(0).isIndirect(0)) {
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for (int z = 0; i->srcExists(z); ++z)
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if (i->src(z).isIndirect(0))
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return false;
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// s[] access only possible in CP, $aX always applies
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if (sf == FILE_MEMORY_SHARED)
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return true;
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if (!ld->bb) // can't check type ...
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return false;
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Program::Type pt = ld->bb->getProgram()->getType();
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// $aX applies to c[] only in VP, FP, GP if p[] is not accessed
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if (pt == Program::TYPE_COMPUTE)
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return false;
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if (pt == Program::TYPE_GEOMETRY) {
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if (sf == FILE_MEMORY_CONST)
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return i->src(s).getFile() != FILE_SHADER_INPUT;
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return sf == FILE_SHADER_INPUT;
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}
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return sf == FILE_MEMORY_CONST;
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}
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return true;
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}
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bool
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TargetNV50::insnCanLoadOffset(const Instruction *i, int s, int offset) const
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{
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if (!i->src(s).isIndirect(0))
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return true;
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offset += i->src(s).get()->reg.data.offset;
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if (i->op == OP_LOAD || i->op == OP_STORE || i->op == OP_ATOM) {
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// There are some restrictions in theory, but in practice they're never
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// going to be hit. However offsets on global/shared memory are just
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// plain not supported.
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return i->src(s).getFile() != FILE_MEMORY_GLOBAL &&
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i->src(s).getFile() != FILE_MEMORY_SHARED;
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}
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return offset >= 0 && offset <= (int32_t)(127 * i->src(s).get()->reg.size);
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}
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bool
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TargetNV50::isAccessSupported(DataFile file, DataType ty) const
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{
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if (ty == TYPE_B96 || ty == TYPE_NONE)
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return false;
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if (typeSizeof(ty) > 4)
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return (file == FILE_MEMORY_LOCAL) || (file == FILE_MEMORY_GLOBAL) ||
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(file == FILE_MEMORY_BUFFER);
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return true;
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}
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bool
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TargetNV50::isOpSupported(operation op, DataType ty) const
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{
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if (ty == TYPE_F64 && chipset < 0xa0)
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return false;
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switch (op) {
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case OP_PRERET:
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return chipset >= 0xa0;
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case OP_TXG:
|
|
return chipset >= 0xa3 && chipset != 0xaa && chipset != 0xac;
|
|
case OP_SQRT:
|
|
case OP_DIV:
|
|
case OP_MOD:
|
|
case OP_SET_AND:
|
|
case OP_SET_OR:
|
|
case OP_SET_XOR:
|
|
case OP_SLCT:
|
|
case OP_SELP:
|
|
case OP_POPCNT:
|
|
case OP_INSBF:
|
|
case OP_EXTBF:
|
|
case OP_EXIT: // want exit modifier instead (on NOP if required)
|
|
case OP_MEMBAR:
|
|
case OP_SHLADD:
|
|
case OP_XMAD:
|
|
return false;
|
|
case OP_SAD:
|
|
return ty == TYPE_S32;
|
|
case OP_SET:
|
|
return !isFloatType(ty);
|
|
default:
|
|
return true;
|
|
}
|
|
}
|
|
|
|
bool
|
|
TargetNV50::isModSupported(const Instruction *insn, int s, Modifier mod) const
|
|
{
|
|
if (!isFloatType(insn->dType)) {
|
|
switch (insn->op) {
|
|
case OP_ABS:
|
|
case OP_NEG:
|
|
case OP_CVT:
|
|
case OP_CEIL:
|
|
case OP_FLOOR:
|
|
case OP_TRUNC:
|
|
case OP_AND:
|
|
case OP_OR:
|
|
case OP_XOR:
|
|
break;
|
|
case OP_ADD:
|
|
if (insn->src(s ? 0 : 1).mod.neg())
|
|
return false;
|
|
break;
|
|
case OP_SUB:
|
|
if (s == 0)
|
|
return insn->src(1).mod.neg() ? false : true;
|
|
break;
|
|
case OP_SET:
|
|
if (insn->sType != TYPE_F32)
|
|
return false;
|
|
break;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
if (s >= opInfo[insn->op].srcNr || s >= 3)
|
|
return false;
|
|
return (mod & Modifier(opInfo[insn->op].srcMods[s])) == mod;
|
|
}
|
|
|
|
bool
|
|
TargetNV50::mayPredicate(const Instruction *insn, const Value *pred) const
|
|
{
|
|
if (insn->getPredicate() || insn->flagsSrc >= 0)
|
|
return false;
|
|
for (int s = 0; insn->srcExists(s); ++s)
|
|
if (insn->src(s).getFile() == FILE_IMMEDIATE)
|
|
return false;
|
|
return opInfo[insn->op].predicate;
|
|
}
|
|
|
|
bool
|
|
TargetNV50::isSatSupported(const Instruction *insn) const
|
|
{
|
|
if (insn->op == OP_CVT)
|
|
return true;
|
|
if (insn->dType != TYPE_F32)
|
|
return false;
|
|
return opInfo[insn->op].dstMods & NV50_IR_MOD_SAT;
|
|
}
|
|
|
|
int TargetNV50::getLatency(const Instruction *i) const
|
|
{
|
|
// TODO: tune these values
|
|
if (i->op == OP_LOAD) {
|
|
switch (i->src(0).getFile()) {
|
|
case FILE_MEMORY_LOCAL:
|
|
case FILE_MEMORY_GLOBAL:
|
|
case FILE_MEMORY_BUFFER:
|
|
return 100; // really 400 to 800
|
|
default:
|
|
return 22;
|
|
}
|
|
}
|
|
return 22;
|
|
}
|
|
|
|
// These are "inverse" throughput values, i.e. the number of cycles required
|
|
// to issue a specific instruction for a full warp (32 threads).
|
|
//
|
|
// Assuming we have more than 1 warp in flight, a higher issue latency results
|
|
// in a lower result latency since the MP will have spent more time with other
|
|
// warps.
|
|
// This also helps to determine the number of cycles between instructions in
|
|
// a single warp.
|
|
//
|
|
int TargetNV50::getThroughput(const Instruction *i) const
|
|
{
|
|
// TODO: tune these values
|
|
if (i->dType == TYPE_F32) {
|
|
switch (i->op) {
|
|
case OP_RCP:
|
|
case OP_RSQ:
|
|
case OP_LG2:
|
|
case OP_SIN:
|
|
case OP_COS:
|
|
case OP_PRESIN:
|
|
case OP_PREEX2:
|
|
return 16;
|
|
default:
|
|
return 4;
|
|
}
|
|
} else
|
|
if (i->dType == TYPE_U32 || i->dType == TYPE_S32) {
|
|
return 4;
|
|
} else
|
|
if (i->dType == TYPE_F64) {
|
|
return 32;
|
|
} else {
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
static void
|
|
recordLocation(uint16_t *locs, uint8_t *masks,
|
|
const struct nv50_ir_varying *var)
|
|
{
|
|
uint16_t addr = var->slot[0] * 4;
|
|
|
|
switch (var->sn) {
|
|
case TGSI_SEMANTIC_POSITION: locs[SV_POSITION] = addr; break;
|
|
case TGSI_SEMANTIC_INSTANCEID: locs[SV_INSTANCE_ID] = addr; break;
|
|
case TGSI_SEMANTIC_VERTEXID: locs[SV_VERTEX_ID] = addr; break;
|
|
case TGSI_SEMANTIC_PRIMID: locs[SV_PRIMITIVE_ID] = addr; break;
|
|
case TGSI_SEMANTIC_LAYER: locs[SV_LAYER] = addr; break;
|
|
case TGSI_SEMANTIC_VIEWPORT_INDEX: locs[SV_VIEWPORT_INDEX] = addr; break;
|
|
default:
|
|
break;
|
|
}
|
|
if (var->sn == TGSI_SEMANTIC_POSITION && masks)
|
|
masks[0] = var->mask;
|
|
}
|
|
|
|
static void
|
|
recordLocationSysVal(uint16_t *locs, uint8_t *masks,
|
|
const struct nv50_ir_sysval *var)
|
|
{
|
|
uint16_t addr = var->slot[0] * 4;
|
|
|
|
switch (var->sn) {
|
|
case SYSTEM_VALUE_FRAG_COORD: locs[SV_POSITION] = addr; break;
|
|
case SYSTEM_VALUE_INSTANCE_ID: locs[SV_INSTANCE_ID] = addr; break;
|
|
case SYSTEM_VALUE_VERTEX_ID: locs[SV_VERTEX_ID] = addr; break;
|
|
case SYSTEM_VALUE_PRIMITIVE_ID: locs[SV_PRIMITIVE_ID] = addr; break;
|
|
default:
|
|
break;
|
|
}
|
|
// TODO is this even hit?
|
|
if (var->sn == SYSTEM_VALUE_FRAG_COORD && masks)
|
|
masks[0] = 0;
|
|
}
|
|
|
|
void
|
|
TargetNV50::parseDriverInfo(const struct nv50_ir_prog_info *info,
|
|
const struct nv50_ir_prog_info_out *info_out)
|
|
{
|
|
unsigned int i;
|
|
for (i = 0; i < info_out->numOutputs; ++i)
|
|
recordLocation(sysvalLocation, NULL, &info_out->out[i]);
|
|
for (i = 0; i < info_out->numInputs; ++i)
|
|
recordLocation(sysvalLocation, &wposMask, &info_out->in[i]);
|
|
for (i = 0; i < info_out->numSysVals; ++i)
|
|
recordLocationSysVal(sysvalLocation, NULL, &info_out->sv[i]);
|
|
|
|
if (sysvalLocation[SV_POSITION] >= 0x200) {
|
|
// not assigned by driver, but we need it internally
|
|
wposMask = 0x8;
|
|
sysvalLocation[SV_POSITION] = 0;
|
|
}
|
|
|
|
Target::parseDriverInfo(info, info_out);
|
|
}
|
|
|
|
} // namespace nv50_ir
|