mirror of https://gitlab.freedesktop.org/mesa/mesa
194 lines
6.4 KiB
C
194 lines
6.4 KiB
C
/*
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* Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors:
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* Rob Clark <robclark@freedesktop.org>
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*/
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#ifndef FREEDRENO_DRAW_H_
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#define FREEDRENO_DRAW_H_
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#include "pipe/p_context.h"
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#include "pipe/p_state.h"
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#include "freedreno_context.h"
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#include "freedreno_resource.h"
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#include "freedreno_screen.h"
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#include "freedreno_util.h"
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struct fd_ringbuffer;
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void fd_draw_init(struct pipe_context *pctx);
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#ifndef __cplusplus
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static inline void
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fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
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enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
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enum pc_di_src_sel src_sel, uint32_t count, uint8_t instances,
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enum pc_di_index_size idx_type, uint32_t idx_size, uint32_t idx_offset,
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struct pipe_resource *idx_buffer)
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{
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/* for debug after a lock up, write a unique counter value
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* to scratch7 for each draw, to make it easier to match up
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* register dumps to cmdstream. The combination of IB
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* (scratch6) and DRAW is enough to "triangulate" the
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* particular draw that caused lockup.
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*/
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emit_marker(ring, 7);
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if (is_a3xx_p0(batch->ctx->screen)) {
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/* dummy-draw workaround: */
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OUT_PKT3(ring, CP_DRAW_INDX, 3);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX, INDEX_SIZE_IGN,
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USE_VISIBILITY, 0));
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OUT_RING(ring, 0); /* NumIndices */
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/* ugg, hard-code register offset to avoid pulling in the
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* a3xx register headers into something #included from a2xx
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*/
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OUT_PKT0(ring, 0x2206, 1); /* A3XX_HLSQ_CONST_VSPRESV_RANGE_REG */
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OUT_RING(ring, 0);
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}
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if (is_a20x(batch->ctx->screen)) {
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/* a20x has a different draw command for drawing with binning data
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* note: if we do patching we will have to insert a NOP
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*
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* binning data is is 1 byte/vertex (8x8x4 bin position of vertex)
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* base ptr set by the CP_SET_DRAW_INIT_FLAGS command
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*
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* TODO: investigate the faceness_cull_select parameter to see how
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* it is used with hw binning to use "faceness" bits
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*/
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uint32_t size = 2;
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if (vismode)
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size += 2;
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if (idx_buffer)
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size += 2;
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BEGIN_RING(ring, size + 1);
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if (vismode)
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util_dynarray_append(&batch->draw_patches, uint32_t *, ring->cur);
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OUT_PKT3(ring, vismode ? CP_DRAW_INDX_BIN : CP_DRAW_INDX, size);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, DRAW_A20X(primtype, DI_FACE_CULL_NONE, src_sel, idx_type,
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vismode, vismode, count));
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if (vismode == USE_VISIBILITY) {
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OUT_RING(ring, batch->num_vertices);
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OUT_RING(ring, count);
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}
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} else {
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OUT_PKT3(ring, CP_DRAW_INDX, idx_buffer ? 5 : 3);
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OUT_RING(ring, 0x00000000); /* viz query info. */
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if (vismode == USE_VISIBILITY) {
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/* leave vis mode blank for now, it will be patched up when
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* we know if we are binning or not
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*/
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OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances),
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&batch->draw_patches);
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} else {
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OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances));
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}
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OUT_RING(ring, count); /* NumIndices */
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}
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if (idx_buffer) {
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OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
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OUT_RING(ring, idx_size);
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}
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emit_marker(ring, 7);
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fd_reset_wfi(batch);
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}
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static inline enum pc_di_index_size
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size2indextype(unsigned index_size)
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{
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switch (index_size) {
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case 1:
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return INDEX_SIZE_8_BIT;
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case 2:
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return INDEX_SIZE_16_BIT;
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case 4:
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return INDEX_SIZE_32_BIT;
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}
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DBG("unsupported index size: %d", index_size);
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assert(0);
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return INDEX_SIZE_IGN;
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}
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/* this is same for a2xx/a3xx, so split into helper: */
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static inline void
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fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
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enum pc_di_primtype primtype, enum pc_di_vis_cull_mode vismode,
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const struct pipe_draw_info *info,
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const struct pipe_draw_start_count_bias *draw, unsigned index_offset)
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{
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struct pipe_resource *idx_buffer = NULL;
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enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
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enum pc_di_src_sel src_sel;
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uint32_t idx_size, idx_offset;
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if (info->index_size) {
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assert(!info->has_user_indices);
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idx_buffer = info->index.resource;
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idx_type = size2indextype(info->index_size);
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idx_size = info->index_size * draw->count;
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idx_offset = index_offset + draw->start * info->index_size;
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src_sel = DI_SRC_SEL_DMA;
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} else {
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idx_buffer = NULL;
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idx_type = INDEX_SIZE_IGN;
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idx_size = 0;
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idx_offset = 0;
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src_sel = DI_SRC_SEL_AUTO_INDEX;
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}
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fd_draw(batch, ring, primtype, vismode, src_sel, draw->count,
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info->instance_count - 1, idx_type, idx_size, idx_offset,
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idx_buffer);
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}
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#endif
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static inline void
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fd_blend_tracking(struct fd_context *ctx)
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assert_dt
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{
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if (ctx->dirty & FD_DIRTY_BLEND) {
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struct fd_batch *batch = ctx->batch;
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struct pipe_framebuffer_state *pfb = &batch->framebuffer;
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if (ctx->blend->logicop_enable)
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batch->gmem_reason |= FD_GMEM_LOGICOP_ENABLED;
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for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
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if (ctx->blend->rt[i].blend_enable)
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batch->gmem_reason |= FD_GMEM_BLEND_ENABLED;
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}
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}
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}
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#endif /* FREEDRENO_DRAW_H_ */
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