ff660dd637
agx: Track write registers more accurately
...
We may not write a full 32-bit vec4, don't be so pessimistic.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
0c82b5c99c
agx: Note that RA proceeds in dominance-order
...
This is an important invariant for SSA-based RA to work.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
81477f3809
agx: Implement some shader-db stats
...
Instructions, bytes, and registers -- this should hold us over until we
can reverse the underlying uarch and get proper cycle estimations.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268 >
2022-05-01 21:58:29 -04:00
536c8ee96d
nir/lower_tex: Make the adding a 0 LOD to nir_op_tex in the VS optional.
...
This controls the whole lowering of "make tex ops with implicit
derivatives on non-implicit-derivative stages be tex ops with an explicit
lod of 0 instead", but it's really hard to describe that in a git commit
summary.
All existing callers get it added except:
- nir_to_tgsi which didn't want it.
- nouveau, which didn't want it (fixes regressions in shadowcube and
shadow2darray with NIR, since the shading languages don't expose txl of
those sampler types and thus it's not supported in HW)
- optional lowering passes in mesa/st (lower_rect, YUV lowering, etc)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16156 >
2022-04-28 21:26:08 +00:00
64acec0ef9
nir: Fix lowering terminology of compute system values: "from"->"to".
...
This is to match other NIR terminology.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103 >
2022-03-08 17:36:31 +00:00
055c5a59f8
agx: Round and clamp array indices
...
Conforming with the GLSL spec. Fixes:
dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darray_fixed_fragment
(and probably others)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
a822b7b6cc
agx: Naturally align uniform pushes
...
Required to pack correctly, e.g if we push a 16-bit value then a 64-bit
value.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
0c2bbb470a
agx: Add agx_size_align_16 helper
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
9aeb5156bc
agx: Add typed move helper
...
Useful for u2u16 in lowering code.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
830d16e9f0
asahi: Add AGX_PUSH_ARRAY_SIZE_MINUS_1
...
Required to clamp array indices against the array sizes per the GLSL
spec. Metal also does this, implying it's required by the hardware for
correct operation.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903 >
2022-02-18 23:48:32 +00:00
786871c87e
agx: Don't kill helper threads in ld_var
...
Apparently this is yet another .kill bit. Fixes:
dEQP-GLES3.functional.shaders.derivate.dfdx.linear.*
dEQP-GLES3.functional.shaders.derivate.dfdy.linear.*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
367d93bcd4
agx: Handle texture array indices
...
These need to be converted to integers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
b459473bb9
agx: Implement nir_op_txb
...
Like explicit LODs, biases must be 16-bit, so add a lowering rule for
this. With the LOD mode selection updated for txb, we can then ingest
biases like explicit LODs and allowlist txb. Passes:
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.texture.mipmap.2d.bias.*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
e2903f66ec
agx: Translate LOD modes more generically
...
Now includes support for auto_load_bias mode.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
d5b7d629d7
agx: Add AUTO_LOD_BIAS mode
...
Automatic load with a bias.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899 >
2022-02-06 15:02:39 +00:00
f8feaee0dd
agx: Call nir_lower_discard_if
...
We still need to implement discard itself, but this means we don't need
to worry about discard_if. This compiles down to the same idiom as
the vendor compiler (Metal) generates
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14217 >
2022-02-04 19:09:23 +00:00
b4108e1d01
agx: Lower UBO loads to use per-element indexing
...
This lets us support indirect access to UBOs easily. The existing
constant special case disappears too, since the peephole optimizer can
inline the constant later. (note: this is too conservative since we can
go up to 16-bit immediates...)
Unfortunately, nir_opt_algebraic can't seem to optimize expressions like
"((a << 3) + 4) >> 2" to "(a << 1) + 1" which would be necessary for
reasonable perf out of this...
Fixes:
dEQP-GLES2.functional.shaders.indexing.uniform_array.float_dynamic_loop_read_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14581 >
2022-01-24 14:25:18 +00:00
9645fa9107
agx: Handle discard intrinsics
...
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...
Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
f248f6623c
agx: Add sample_mask instruction
...
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
dcc12656e3
asahi: Route sample mask from shader
...
Compiler-controlled bit in the cmdstream.
Some other magic bits are needed for sample mask writes to work
properly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219 >
2022-01-16 18:23:28 +00:00
f7bb68e499
glsl/nir: don't pass gl_context to the convertor routine.
...
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14433 >
2022-01-07 06:19:49 +00:00
d051854cca
treewide: drop mtypes/macros includes from main
...
These aren't required in lots of places, so remove them.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14127 >
2021-12-08 22:14:45 +00:00
a9ed4538ab
nir: add indirect loop unrolling to compiler options
...
This is where it should be rather than having to pass it into the
optimisation pass every time.
It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064 >
2021-08-03 10:54:50 +00:00
3cd6f62388
agx: Shift vertex buffer stride in the compiler
...
Required to support non-32-bit vertex formats efficiently.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:57:19 -04:00
c7ba0fb04d
agx: Add agx_format_shift routine
...
Required to calculate alignments for vertex buffers correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:45:38 -04:00
96c98e0d25
agx: Define p_extract for type converts
...
Useful for grabbing the high 32-bit word of a 64-bit value.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:25:40 -04:00
3417ecb4d7
agx: Implement instanced arrays
...
Divide by instance divisor if needed. Same strategy as ACO.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:25:11 -04:00
538e3a3100
agx: Include divisors in the vertex shader key
...
Needed to lower the divisions.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:24:47 -04:00
0c353d47be
agx: Add udiv-by-constant routine
...
Uses the ridiculousfish algorithm, will be used to lower instanced
arrays into something efficient.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:24:02 -04:00
50a4c993fd
agx: Add agx_ushr helper
...
Syntax sugar for the underlying bitfield manipulation instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 17:23:42 -04:00
3c1f754a71
agx: Handle load_instance_id
...
Preloaded into r6, as predicted.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 15:12:18 -04:00
3f5eebe5e6
agx: Drop dated /* TODO: RA */
...
We skip over vertex ID in RA now, it's fine.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 15:12:03 -04:00
465224379c
agx: Plug memory leak in register allocator
...
Fixes: 85e18deb18https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 15:00:22 -04:00
7848100f27
agx: Use consistent ncomps
...
Fixes register allocation failure in:
dEQP-GLES3.functional.ubo.single_basic_array.shared.row_major_mat4_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:55:16 -04:00
cce1a2fc19
agx: Dump register file when failing to allocate
...
Usually shows a bug.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:54:34 -04:00
5fb9159eb9
agx: Fix mismatched units in load_ubo
...
Fixes assertion failure in
dEQP-GLES3.functional.ubo.single_basic_type.shared.highp_float_fragment
Assertion failed: ((value & 1) == 0), function agx_print_sized, file
../src/asahi/compiler/agx_print.c, line 39.
Fixes: 033d4d09fchttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:39:44 -04:00
5deb7c26d6
agx: Don't set helper invocation kill bit
...
In the future we'll need data flow analysis similar to what we do in
panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053 >
2021-07-24 14:27:35 -04:00
dd98918a5a
agx: Flip point coordinates because OpenGL
...
Fixes dEQP-GLES2.functional.shaders.builtin_variable.pointcoord
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
3291779c21
asahi: Handle point coordinates
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
3d75cff7d7
asahi: Identify triangle/lines vs point varyings
...
Seems to allow skipping over point coords?
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
2468b123bb
asahi: Set bit for psiz
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818 >
2021-07-11 22:32:41 +00:00
1d0008734c
agx: Ensure we don't overallocate registers
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
7e65e47d19
agx: Pipe in nir_register
...
This is kind of lazy...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
85e18deb18
agx: Assign registers locally
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
15b49a6795
agx: Count read registers as well
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
f03cecf05f
agx: Don't choke on registers in the optimizer
...
Just skip over them.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751 >
2021-07-07 03:31:43 +00:00
0266cf86e9
asahi: Fix meson dependency on packing in compiler
...
Closes : #5030
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Fixes: 6a657b17b9https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11730 >
2021-07-06 13:44:50 +00:00
50f012542f
agx: Handle txl
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
8361e24604
agx: Legalize LOD sources to be 16-bit only
...
I'm not convinced this is /right/ but it's a step.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
4891e51bf3
agx: Fix lod_mode shift
...
Was zero before so didn't notice the bug.
Fixes: 9f55538834https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718 >
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
Emma Anholt
Timur Kristóf
Dave Airlie
Timothy Arceri