Commit Graph

169756 Commits

Author SHA1 Message Date
Mike Blumenkrantz aec938b1f8 zink: remove redundant 'blitting' check in zink_prep_fb_attachment()
this is a return conditional 2 lines above

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22423>
2023-04-12 15:43:01 +00:00
Samuel Pitoiset 4f3ddf31e0 radv: fix pipeline creation feedback with imported graphics libs
Stages imported from graphics pipeline libraries are defined as
additional entries in the order they were imported. This is similar
to raytracing libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22288>
2023-04-12 15:03:42 +00:00
Erik Faye-Lund d689a72bc5 zink: do not use sampled-image for buffers
In SPIR-V 1.6, sampled images with buffer dimensionality was disallowed.

The sampler that GLSL provides for buffer-textures is useless, and can
simply be ignored. So let's not treat them as samplers any more.

Fixes: bd816084c6 ("zink: enable spir-v 1.6 for vulkan 1.3")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8808
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22407>
2023-04-12 12:47:13 +00:00
Samuel Pitoiset 7783b7f697 radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21811>
2023-04-12 11:18:45 +00:00
José Roberto de Souza 02de31f6bb loader: Add Xe KMD support
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>
2023-04-12 10:41:21 +00:00
José Roberto de Souza 156464b67e iris: Handle Xe syncronization with syncobjs
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>
2023-04-12 10:41:21 +00:00
José Roberto de Souza 910e659e31 iris: Add function to close gem bos
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22425>
2023-04-12 10:41:21 +00:00
José Roberto de Souza b1299f42ff anv: Fix vm bind of imported buffers
Imported buffers may be created in a device with different
memory alignment and this can cause vm bind to fail because bo
size can be smaller than the calculated vm bind range using the
importer device memory alignment.

So here adding actual_size to anv_bo, this will be set with the actual
size of the bo allocated by kmd for bos allocate in the current device.
For other bo the lseek or the Vulkan API size will be used.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22219>
2023-04-12 10:05:32 +00:00
Rob Clark 87978c3933 freedreno/a6xx: Allow z24s8 format casts
Allow UBWC format casts between z24s8/x24s8/z24x8.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8816
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22427>
2023-04-12 09:26:22 +00:00
Dmitry Baryshkov fc5dd4035a freedreno/a5xx: add SP clock control register
Add GPMU_GPMU_SP_CLOCK_CONTROL register. Duplicated GPGMU is not a typo,
vendor kernel names it A5XX_GPMU_GPMU_SP_CLOCK_CONTROL.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22429>
2023-04-12 08:48:27 +00:00
Dmitry Baryshkov 05c22bdea1 freedreno/a5xx: reorder GPMU registers
Severeal GPMU registers were places out of the order. Move them to be
ordered proprely.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22429>
2023-04-12 08:48:27 +00:00
Collabora's Gfx CI Team be5db62f88 Uprev Piglit to 355ad6bcb2cb3d9e030b7c6eef2b076b0dfb4d63
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22325>
2023-04-12 08:04:55 +00:00
Samuel Pitoiset 8f76a6a26e radv/ci: remove one RT test from the expected failures on RDNA3
It does pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22413>
2023-04-12 07:33:31 +00:00
Jesse Natalie 117ace3b14 dzn: Handle mismatches in bound descriptor set vs pipeline layout
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22420>
2023-04-12 04:14:46 +00:00
Kenneth Graunke a4e13063ed iris: Hack around gbm_gralloc stride restrictions
gbm_bo_map returns a stride for the mapping, which may differ from the
stride of the underlying BO.  Drivers may implement mappings via staging
blits, returning a map of a temporary resource instead.  That temporary
may have fewer stride restrictions (i.e. it isn't used for display), and
thus be more tightly packed, saving memory.

However, gbm_gralloc has a design flaw where after calling gbm_bo_map,
it asserts that the stride exactly matches the original BO's stride:

   assert(stride == gbm_bo_get_stride(bo));

This is a bad assumption, as the GBM API returns a stride explicitly
precisely because it -can- differ.  But, this would require significant
changes to gbm_gralloc to fix.  So, to work around it, we add a driver
hack for Android-only that forces staging maps of any external BO to use
the original resource's stride.

This should fix issues with mapping cursor planes and SW media codec
uploads on Android-x86.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7974
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22156>
2023-04-11 23:45:04 +00:00
Kenneth Graunke 1452b60f35 iris: Extend resource creation helpers to allow for explicit strides
We'll want to create temporary staging images with explicit strides
in the next commit.  This extends iris_resource_create_with_modifiers
to have an explicit row_pitch_B parameter (0 continues to mean "let
ISL pick one").

Because resource_create_with_modifiers() is a driver hook, we can't
just add a parameter, so unfortunately we gain another wrapper layer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22156>
2023-04-11 23:45:04 +00:00
Mike Blumenkrantz 59bb2f1aac zink: fix GPL lib leaking
this was improperly added into the conditional for removing a prog from the
ctx hash when it had no relation to that code, leading to refcount
leaks that ended up leaking the whole thing

Fixes: 487ac6dbd6 ("zink: implement cross-program pipeline library sharing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22397>
2023-04-11 22:22:12 +00:00
Mike Blumenkrantz a81a101159 zink: free GPL input/output libs on context destroy to avoid leaking
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22397>
2023-04-11 22:22:11 +00:00
Jesse Natalie 187efd4e97 d3d12: Fix buffer reference leak for SO count staging buffer
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22417>
2023-04-11 22:08:11 +00:00
Karol Herbst 3b958f65ca rusticl: enable radeonsi
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>
2023-04-11 20:44:36 +00:00
Karol Herbst c9ab7d7525 radeonsi: use default float mode for CL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>
2023-04-11 20:44:36 +00:00
Karol Herbst e5ef95e31f radeonsi: implement get_compute_state_info
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19232>
2023-04-11 20:44:36 +00:00
Mike Blumenkrantz 0c730f98c5 zink: unroll array loop when copying vars for passthrough shaders
wildcard derefs aren't supported in ntv

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22376>
2023-04-11 20:26:22 +00:00
Sil Vilerino 26f767d524 d3d12: Video processor to only promote resources to permanent residency when there is work to be flushed
This fixes some cases where flush is called from the app without work being scheduled before, causing d3d12_promote_to_permanent_residency
to be called with garbage pointers/arguments.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22415>
2023-04-11 20:09:19 +00:00
Danylo Piliaiev 17df75d47d vulkan: Sanitize pSampleMask in CmdSetSampleMaskEXT
ms.sample_mask is only 16b, while VkSampleMask is 32b and it is allowed
to have all of them set even if maximum 16 samples are supported.

E.g. happens with Zink running supertuxkart:
 supertuxkart: ../../../source/mesa/src/vulkan/runtime/vk_graphics_state.c:2346: vk_common_CmdSetSampleMaskEXT: Assertion `(dyn)->ms.sample_mask == (*pSampleMask)' failed.

  vk_common_CmdSetSampleMaskEXT (commandBuffer=0x5556e903f0, samples=VK_SAMPLE_COUNT_1_BIT, pSampleMask=0x5556819ccc) at vk_graphics_state.c:2346
  zink_draw<(zink_multidraw)1, (zink_dynamic_state)5, true, false> (...) at zink_draw.cpp:639
  zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)5, true> (...) at zink_draw.cpp:922

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22360>
2023-04-11 19:20:50 +00:00
Mike Blumenkrantz 89aa363593 zink: block oom flushes during unordered blits
this is broken beyond space and time

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22412>
2023-04-11 18:59:13 +00:00
Timur Kristóf b51e858d68 radv/amdgpu: Place secondary CS without IB2 in non-WC GTT.
When using a secondary CS without IB2, we have to memcpy the
contents into the primary CS. Use these flags to improve perf
by preventing memcpy from VRAM.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 7c5bf91350 radv/amdgpu: Extract radv_amdgpu_cs_bo_create function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 0c1d4130ca radv/amdgpu: Add bool is_secondary argument to cs_create function.
Also save is_secondary to the CS object.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf c0fe6bbef1 radv: Allow task/mesh shaders with RADV_DEBUG=noibs.
The new submit code path should now be able to handle gang submit
even when chaining is not enabled.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf dc59a6b2ee radv/amdgpu: Respect maximum number of submitted IBs per IP type.
In a gang submit, the maximum number of IBs is per IP type,
and is different for each queue. Let's respect that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf e4a37547a5 radv/amdgpu: Clean up submission functions.
Remove a useless extra function call, and rename fallback to
internal because it is the only code path left.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 50e6b16855 radv/amdgpu: Use fallback submit for queues that can't use IBs.
This commit consolidates the queue submit code paths into one.

Now we always allocate BOs for every CS, but when IBs aren't
allowed, we simply submit every BO to the kernel.

A microbenchmark done by Bas indicated that submitting more IBs to
the kernel only adds a negligible overhead. Additionally, this
allows us to stop copying the command buffer contents in system
memory and get rid of a lot of legacy code.

In order to be able to submit every BO, we make sure to add the
last BO to the old_ib_buffers array on cs_finalize. This also
necessitates some changes in cs_execute_secondary and other
functions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 958ea2ec2a radv: Split submission in winsys instead of radv_queue.
This will still make it so that RADV_DEBUG=hang will only submit
one command buffer at a time, but otherwise let's pass all CS
objects into one submission and let the winsys split them if
necessary.

The winsys can do a better job at splitting them because
radv_queue has no knowledge of IBs and ignores chaining in the
splitting logic.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 41a9bced31 radv: Fill continue preambles and postambles properly.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 1bdc1bd36c radv/amdgpu: Split gang submissions correctly when not chained.
In a gang submit, the follower (typically ACE) and leader
(typically GFX) can have synchronization between each other.
We must ensure that these end up in the same submission,
otherwise we can deadlock the GPU.

We rely on radv_queue here to order follower before the leader
in the submitted CS array.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf 813885f682 radv/amdgpu: Add ability to submit non-chained CS to fallback.
When submitting a CS whose IP type doesn't support chaining,
let's submit all the IBs that this CS allocated.

This is going to be better than the sysmem code path because it
doesn't require the winsys to memcpy the contents of the command
buffers.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:03 +00:00
Timur Kristóf e4dd6a8eb3 radv/amdgpu: Add postambles to fallback submit.
Some new features, such as perf counters and gang submit use
postambles. Implement these properly.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf 103ebe96c0 radv/amdgpu: Add continue preambles to fallback submit.
When splitting a larger submission into several smaller ones,
the flushing at the beginning of the initial preambles is not
really necessary, so it'll be better to use the continue
preambles for this purpose.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf 6844506c3d radv/amdgpu: Allow multiple continue preambles.
For feature parity with initial preambles.
Previously, continue preambles were for GFX6 only, but this is
about to change in the next commits.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf 8cea452bda radv/amdgpu: Rewrite fallback code path so it can split submissions.
Currently, radv_queue already splits submissions but we want to
change this and be able to split them in the winsys code as well.
Necessary because we want to split based on number of actual
IBs not number of command buffers, but radv_queue is not
aware of IBs.

Note that this commit does not actually take this new split into
use yet, that will be done in a following commit when it is ready,
this is why we set the max IB count higher than radv_queue here.

This commit is the first step in making "fallback" the default and
only submission code path.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf df90102a15 radv/amdgpu: Remove hw_can_chain in favour of use_ib.
They have the same meaning, but use_ib makes more sense because it
also takes the gfx_level into account.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf ccb4b78840 radv/amdgpu: Add a few assertions during submit.
These are useful when debugging the submission code.

- Ensure correct IB alignment
- Ensure we don't submit empty IBs

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf e5201987b1 radv/amdgpu: Extract radv_amdgpu_cs_add_old_ib_buffer.
This function will be used elsewhere in a following commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf 44de40fb5f radv/amdgpu: Use correct alignment when creating CS BOs.
Shouldn't matter in practice because the kernel will likely
give us a page-aligned BO, but better to specify it just
in case.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf e214059120 radv/amdgpu: Only allow IB BOs on graphics and compute queues.
This disallows IB BOs on eg. SDMA queues which was previously
mistakenly left out.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf a7080fe4ef radv/amdgpu: Fix mismatching return type of radv_amdgpu_cs_submit.
Fixes a warning that is reported by GCC 13.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf daeb409559 ac: Add maximum number of submitted IBs.
The number of IBs per submit isn't infinite, it depends on the IP type
(ie. some initial setup needed for a submit) and the packet size.
It can be calculated according to the kernel source code as:
(ring->max_dw - emit_frame_size) / emit_ib_size

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
Timur Kristóf 87d22933ae radv: Create continue preamble on GFX6 even when no shader rings are used.
Skipping the continue preamble can allow other processes to mess
up some	registers set by the current process.

Originally, we could omit generating the continue preamble when
no shader rings were used, because the register initialization
happened at the beginning of every main cmdbuf. However, this
isn't the case anymore.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
2023-04-11 17:05:02 +00:00
xurui 0bba139767 zink: bs->dd.push_pool[1].pool should be freed
cc: mesa-stable

Signed-off-by: xurui <xurui@kylinos.cn>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22389>
2023-04-11 16:16:05 +00:00